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* MX35: Fix bogus L2 cache settingsJuergen Beisert2010-10-11
| | | | | | | | | | | | | | | | | | i.MX35 CPUs marked with "MCIMX357CJQ5C M99V CTHA0943B" are coming with bogus L2 cache settings. If these settings are kept unmodified prior enabling the L2 cache the CPU runs amok immediately when its enabled. This fix should not hurt already working CPUs, as they are using the written register value already. Its currently unknown if its possible to detect the production lot from the software to fix only affected CPUs. While at it, make sure that mxc_init_l2x0 is only executed on i.MX31/35 Signed-off-by: Juergen Beisert <jbe@pengutronix.de> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx: move gpio init after to irq initJason Wang2010-07-26
| | | | | | | | | | | | The commit 9a763bf "get rid of mxc_gpio_init" changed gpio_init and irq_init sequence. Usually we will call set_irq_chained_handler in gpio_init functions, this should be called after the irq_init called, otherwise the chained irq can't get propoer irq_chip and this irq will remain masked even we called set_irq_chained_handler. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Tested-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mx3: remove paragraphs with old address of the FSFUwe Kleine-König2010-06-30
| | | | | | | As the kernel contains a copy of the GPL anyhow just get rid of the address specification instead of fixing it. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* ARM: imx: get rid of mxc_gpio_initUwe Kleine-König2010-06-24
| | | | | | | This function is defined once for each imx family and so is in the way when compiling a kernel for more than one SoC. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* ARM: MX3: make CPU revision number detection work on all boardsWolfgang Denk2010-01-04
| | | | | | | | | | | | | | | Commit 52939c03 (ARM: MX3: fix CPU revision number detection) started using the CPU's SREV register for revision number detection. This makes it mandatory to have a valid SPBA0 mapping. Add this to the global map_io code instead of adding multiple copies for each board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Tested on Qong (EVB-Lite) Tested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* fix compilation of i.MX31 platformsGuennadi Liakhovetski2009-10-13
| | | | | | | | | mxc_iomux_v3_init() is defined in arch/arm/plat-mxc/iomux-v3.c, which is not linked for i.MX31 and produces an undefined reference error. Fix this by building the offending code only for i.MX35. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* iomux-v3: Allow for a runtime base addressSascha Hauer2009-08-14
| | | | | | | also, check for a valid pad_ctrl_ofs before changing the pad control register. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: turn to soc specific init_irq functionsSascha Hauer2009-08-07
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* system.c: runtime base addressSascha Hauer2009-08-07
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC: rename mxc_map_io to architecture specific versionsSascha Hauer2009-05-07
| | | | | | | | This allows us to have more mapping functions for more than one i.MX architecture in the kernel. As this is the earliest board specific hook we have, also use it to set the cpu type. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX31: Move static virtual mappings of AIPS1/2 to common fileSascha Hauer2009-03-13
| | | | | | | On MX31 we can't do much without mapping the AIPS1/2 register space. Move these mappings from individual boards to plat-mxc/mm.c Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX31/MX35: Add l2x0 cache supportSascha Hauer2009-03-13
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] Remove MT_NONSHARED_DEVICE aliasRussell King2008-10-01
| | | | | | Use MT_DEVICE_NONSHARED instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-07
| | | | | | This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove asm/hardware.h, use asm/arch/hardware.h insteadRussell King2008-08-07
| | | | | | | | | Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4461/1: MXC platform and i.MX31ADS core supportQuinn Jensen2007-07-22
This patch adds the foundation pieces for the Freescale MXC platforms, including i.MX2 and i.MX3 based systems. The bare-bones MX31 support in this patch boots to the rootdev panic with 8250 serial console configured "console=ttyS0,115200". It assumes that Redboot is the boot loader. Signed-off-by: Quinn Jensen <quinn.jensen@freescale.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>