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| * ARM: l2c: imx vf610: convert to generic l2c OF initialisationRussell King2014-05-29
| | | | | | | | | | | | | | | | | | Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Since the .init_irq method only calls irqchip_init(), we can remove that too as the generic code will take care of that. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: l2c: imx: convert to common l2c310 early resume functionalityRussell King2014-05-29
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: l2c: imx: remove direct write to power control registerRussell King2014-05-29
| | | | | | | | | | | | | | | | Now that we handle this in core code, we don't need platforms enabling the low power modes directly. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: l2c: fix register namingRussell King2014-05-29
| | | | | | | | | | | | | | | | | | | | | | | | | | We have a mixture of different devices with different register layouts, but we group all the bits together in an opaque mess. Split them out into those which are L2C-310 specific and ones which refer to earlier devices. Provide full auxiliary control register definitions. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: l2c: remove unnecessary UL-suffix to mask valuesRussell King2014-05-22
| | | | | | | | | | | | | | | | They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'devicetree-for-3.16' of ↵Linus Torvalds2014-06-04
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into next Pull DeviceTree updates from Rob Herring: - Another round of clean-up of FDT related code in architecture code. This removes knowledge of internal FDT details from most architectures except powerpc. - Conversion of kernel's custom FDT parsing code to use libfdt. - DT based initialization for generic serial earlycon. The introduction of generic serial earlycon support went in through the tty tree. - Improve the platform device naming for DT probed devices to ensure unique naming and use parent names instead of a global index. - Fix a race condition in of_update_property. - Unify the various linker section OF match tables and fix several function prototype errors. - Update platform_get_irq_byname to work in deferred probe cases. - 2 binding doc updates * tag 'devicetree-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (58 commits) of: handle NULL node in next_child iterators of/irq: provide more wrappers for !CONFIG_OF devicetree: bindings: Document micrel vendor prefix dt: bindings: dwc2: fix required value for the phy-names property of_pci_irq: kill useless variable in of_irq_parse_pci() of/irq: do irq resolution in platform_get_irq_byname() of: Add a testcase for of_find_node_by_path() of: Make of_find_node_by_path() handle /aliases of: Create unlocked version of for_each_child_of_node() lib: add glibc style strchrnul() variant of: Handle memory@0 node on PPC32 only pci/of: Remove dead code of: fix race between search and remove in of_update_property() of: Use NULL for pointers of: Stop naming platform_device using dcr address of: Ensure unique names without sacrificing determinism tty/serial: pl011: add DT based earlycon support of/fdt: add FDT serial scanning for earlycon of/fdt: add FDT address translation support serial: earlycon: add DT support ...
| * | ARM: imx: fix function type for CLK_OF_DECLARERob Herring2014-05-20
| |/ | | | | | | | | | | | | | | | | Adding function type checking to CLK_OF_DECLARE found a type mismatch with mx35_clocks_init_dt. The function should return void. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Shawn Guo <shawn.guo@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de>
* | Merge tag 'soc-for-3.16' of ↵Linus Torvalds2014-06-02
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull part one of ARM SoC updates from Olof Johansson: "A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 plus a large set of various smaller updates for different platforms. I'm probably missing some important one here" * tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits) ARM: exynos: don't run exynos4 l2x0 setup on other platforms ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug ARM: EXYNOS: mcpm rename the power_down_finish ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC ARM: EXYNOS: Enable multi-platform build support ARM: EXYNOS: Consolidate Kconfig entries ARM: EXYNOS: Add support for EXYNOS5410 SoC ARM: EXYNOS: Support secondary CPU boot of Exynos3250 ARM: EXYNOS: Add Exynos3250 SoC ID ARM: EXYNOS: Add 5800 SoC support ARM: EXYNOS: initial board support for exynos5260 SoC clk: exynos5410: register clocks using common clock framework ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 ARM: sunxi: allow building without reset controller Documentation: devicetree: arm: sort enable-method entries ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ...
| * | ARM: mx25: Add CLKO supportFabio Estevam2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes clk_register_clkdev() for the clocks that do not have any users from boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX1 clk: Add missing clocksAlexander Shiyan2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate, ssi2_gate and brom_gate. As an additional this fixes incorrect bit position for dma_gate clock. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: add basic imx6sx SoC supportShawn Guo2014-05-16
| | | | | | | | | | | | | | | | | | | | | Add basic suppport for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: add clock driver for imx6sxAnson Huang2014-05-16
| | | | | | | | | | | | | | | | | | | | | Add clock driver for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: mx51: Remove mach-cpuimx51sd board fileFabio Estevam2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files. This allows the conversion of mx51 to a devicetree-only platform. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Setup IRQ handler from IRQ driverAlexander Shiyan2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | This patch moves IRQ handler setup to the its corresponded IRQ driver (AVIC, TZIC). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 pca100: remove deprecated IRQF_DISABLEDJuan Solano2014-05-12
| | | | | | | | | | | | | | | | | | | | | This flag is a NOOP and can be removed now. Signed-off-by: Juan Solano <jsm@jsolano.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Fix eMMa PrP resource sizeAlexander Shiyan2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | Last address for eMMa PrP is 0x80...0x83, so increase resource size for eMMa to 256. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes clk_register_clkdev() for the clocks that do not have any users for non-DT boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 clk: Add missing clocks for MSHC and RTICAlexander Shiyan2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing clocks handling for the Memory Stick Host Controller (MSHC) and Run-Time Integrity Checker (RTIC). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx6q: add the missing esai_ahb clockShawn Guo2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The esai_ahb clock is derived from ahb and used to provide ESAI the capability of register accessing and FSYS clock source for I2S clocks dividing. The gate bits of this esai_ahb clock are shared with the esai clock -- the baud clock, so we need to call imx_clk_gate2_shared() for these two clocks. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: add shared gate clock supportShawn Guo2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's quite common on i.MX that one gate bit controls the gating of multiple clocks, i.e. this is a shared gate. The patch adds the function imx_clk_gate2_shared() for such case. The clocks controlled by the same gate bits should call this function with a pointer to a single share count variable, so that the gate bits will only be operated on the first enabling and the last disabling of these shared gate clocks. Thanks to Gerhard Sittig <gsi@denx.de> for this idea. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: lock is always valid for clk_gate2Shawn Guo2014-05-12
| | | | | | | | | | | | | | | | | | | | | The imx specific clk_gate2 always has a valid lock with the clock. So the validation on gate->lock is not really needed. Remove it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: define struct clk_gate2 on our ownShawn Guo2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx clk-gate2 driver implements an i.MX specific gate clock, which has two bits controlling the gate states. While this is a completely separate gate driver from the common clk-gate one, it reuses the common clk_gate structure. Such reusing makes the extending of clk_gate2 clumsy. Let's define struct clk_gate2 on our own to make the driver independent of the common clk-gate one, and ease the clk_gate2 extending at a later time. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Remove #ifdef CONFIG_OFAlexander Shiyan2014-05-12
| | | | | | | | | | | | | | | | | | | | | CONFIG_OF is always selected for i.MX. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clockIain Paton2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock. Handle this difference using cpu_is_imx6dl(). Signed-off-by: Iain Paton <ipaton0@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: factor device tree timer initializationGilles Chanteperdrix2014-04-30
| | | | | | | | | | | | | | | Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: Remove mx51_babbage board fileFabio Estevam2014-04-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree version for the babbage board (imx51-babbage.dtb) has a more complete support than the board file version, so remove the board file source code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX5: Remove outdated VPU clock lookupsPhilipp Zabel2014-04-30
| | | | | | | | | | | | | | | | | | | | | | | | CODA7 clock lookups are now defined in the device tree. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: mx21ads: Cleanup boardAlexander Shiyan2014-04-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove unused <asm/mach/time.h> inclusion. - Use predefined constant for CS8900A base address. - Use DEFINE_RES_MEM() macro for NOR flash resource. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: i.MX: mx21ads: Use fixed voltage regulator for LCD powerAlexander Shiyan2014-04-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using init() and exit() hooks from framebuffer driver to control power of LCD, introduce fixed voltage regulator for this purpose. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: i.MX: mx21ads: Replace direct handling of peripheral bits with GPIOsAlexander Shiyan2014-04-30
| |/ | | | | | | | | | | | | | | | | | | This patch replaces direct handling of peripheral bits with GPIOs by using basic-mmio-gpio driver. As a result this change eliminate some low-level code and removes custom io_map() from the board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | Merge tag 'cleanup-for-3.16' of ↵Linus Torvalds2014-06-02
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC cleanups from Olof Johansson: "Cleanups for 3.16. Among these are: - a bunch of misc cleanups for Broadcom platforms, mostly housekeeping - enabling Common Clock Framework on the older s3c24xx Samsung chipsets - cleanup of the Versatile Express system controller code, moving it to syscon - power management cleanups for OMAP platforms plus a handful of other cleanups across the place" * tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits) ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORM clk: samsung: fix build error ARM: vexpress: refine dependencies for new code clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata cpufreq: exynos: Fix the compile error ARM: S3C24XX: move debug-macro.S into the common space ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro ARM: S3C24XX: trim down debug uart handling ARM: compressed/head.S: remove s3c24xx special case ARM: EXYNOS: Remove unnecessary inclusion of cpu.h ARM: EXYNOS: Migrate Exynos specific macros from plat to mach ARM: EXYNOS: Remove exynos_subsys registration ARM: EXYNOS: Remove duplicate lines in Makefile ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit ARM: OMAP2+: PRCM: cleanup some header includes ...
| * | ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORMWill Deacon2014-05-29
| |/ | | | | | | | | | | | | | | | | | | | | | | | | When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with PCI-capable devices (e.g. mach-virt with virtio-pci). This patch allows PCI support to be selected for these SoCs by selecting CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the individual selections from multi-platform enabled SoCs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* / ARM: imx: fix error handling in ipu device registrationEmil Goode2014-05-22
|/ | | | | | | | | | | | | | If we fail to allocate struct platform_device pdev we dereference it after the goto label err. This bug was found using coccinelle. Fixes: afa77ef (ARM: mx3: dynamically allocate "ipu-core" devices) Signed-off-by: Emil Goode <emilgoode@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: i.MX6: ipu_di_sel clocks can set parent ratesPhilipp Zabel2014-04-14
| | | | | | | | | To obtain exact pixel clocks, allow the DI clock selectors to influence the PLLs that they are derived from. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q: clk: Parent DI clocks to video PLL via di_pre_selSascha Hauer2014-04-14
| | | | | | | | | | Route the video PLL to the display interface clocks via the di_pre_sel and di_sel muxes by default. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6q-clk: parent lvds_gate from lvds_selLucas Stach2014-04-13
| | | | | | | | | | Allows fror proper refcounting of the parent clocks when enabling the clock output on CLK1/2 pads. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* Merge tag 'soc-3.15' of ↵Linus Torvalds2014-04-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC specific changes from Arnd Bergmann: "Lots of changes specific to one of the SoC families. Some that stick out are: - mach-qcom gains new features, most importantly SMP support for the newer chips (Stephen Boyd, Rohit Vaswani) - mvebu gains support for three new SoCs: Armada 375, 380 and 385 (Thomas Petazzoni and Free-electrons team) - SMP support for Rockchips (Heiko Stübner) - Lots of i.MX changes (Shawn Guo) - Added support for BCM5301x SoC (Hauke Mehrtens) - Multiplatform support for Marvell Kirkwood and Dove (Andrew Lunn and Sebastian Hesselbarth doing the final part of a long journey) - Unify davinci platforms and remove obsolete ones (Sekhar Nori, Arnd Bergmann)" * tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (126 commits) ARM: sunxi: Select HAVE_ARM_ARCH_TIMER ARM: cache-tauros2: remove ARMv6 code ARM: mvebu: don't select CONFIG_NEON ARM: davinci: fix DT booting with default defconfig ARM: configs: bcm_defconfig: enable bcm590xx regulator support ARM: davinci: remove tnetv107x support MAINTAINERS: Update ARM STi maintainers ARM: restrict BCM_KONA_UART to ARCH_BCM_MOBILE ARM: bcm21664: Add board support. ARM: sunxi: Add the new watchog compatibles to the reboot code ARM: enable ARM_HAS_SG_CHAIN for multiplatform ARM: davinci: remove da8xx_omapl_defconfig ARM: davinci: da8xx: fix multiple watchdog device registration ARM: davinci: add da8xx specific configs to davinci_all_defconfig ARM: davinci: enable da8xx build concurrently with older devices ARM: BCM5301X: workaround suppress fault ARM: BCM5301X: add early debugging support ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU ARM: mach-bcm: Remove GENERIC_TIME ARM: shmobile: APMU: Fix warnings due to improper printk formats ...
| * ARM: imx6: drop .text.head section annotation from headsmp.SShawn Guo2014-03-04
| | | | | | | | | | | | | | | | The function v7_secondary_startup() works just fine in .text section, so there is no need to have .text.head section annotation at all. Drop it. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: build suspend-imx6.o with CONFIG_SOC_IMX6Shawn Guo2014-03-04
| | | | | | | | | | | | | | | | | | Even when CONFIG_SUSPEND is enabled, it makes no sense to build suspend-imx6.o if none of i.MX6 support is built in. Let's build suspend-imx6.o only when both CONFIG_SUSPEND and CONFIG_SOC_IMX6 are enabled. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: rename pm-imx6q.c to pm-imx6.cShawn Guo2014-03-04
| | | | | | | | | | | | | | The pm-imx6q.c works for all i.MX6 SoCs, so let's rename it to pm-imx6.c and have the build controlled by option CONFIG_SOC_IMX6. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: introduce CONFIG_SOC_IMX6 for i.MX6 common stuffShawn Guo2014-03-04
| | | | | | | | | | | | | | The i.MX6 SoCs have something in common, so let's introduce CONFIG_SOC_IMX6 for those stuff. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: do not call imx6q_suspend_init() with !CONFIG_SUSPENDShawn Guo2014-03-04
| | | | | | | | | | | | | | When CONFIG_SUSPEND is not enabled, we should reasonably skip the call to imx6q_suspend_init(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: call suspend_set_ops() from suspend routineShawn Guo2014-03-04
| | | | | | | | | | | | | | | | Rename function imx6q_ocram_suspend_init() to imx6q_suspend_init() and call suspend_set_ops() from there. Now we get a centralized function for suspend initialization. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: build headsmp.o only on CONFIG_SMPShawn Guo2014-03-04
| | | | | | | | | | | | | | | | With v7_cpu_resume() being moved out of headsmp.S, all the remaining code in the file is only needed by CONFIG_SMP build. So we can control the build of headsmp.o with only obj-$(CONFIG_SMP) now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx6: move v7_cpu_resume() into suspend-imx6.SShawn Guo2014-03-04
| | | | | | | | | | | | | | | | | | The suspend-imx6.S is introduced recently for suspend low-level assembly code. Since function v7_cpu_resume() is only used by suspend support, it makes sense to move the function into suspend-imx6.S, and control the build of the file with CONFIG_SUSPEND option. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priorityPhilipp Zabel2014-03-04
| | | | | | | | | | | | | | | | | | | | | | This is needed so that the IPU framebuffer scanout cannot be starved by VPU or GPU activity. Some boards like the SabreLite and SabreSD seem to set this in the DCD already, but the documented register reset values do not contain the necessary settings. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: mach-imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX2_WDT from SOC_IMX53Fabio Estevam2014-03-04
| | | | | | | | | | | | | | | | | | | | SOC_IMX53 is a device-tree only platform, so we don't need IMX_HAVE_PLATFORM_IMX2_WDT at all because this symbol only provides some code to help register imx2-wdt platform devices. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: mach-imx: Select CONFIG_SRAM at ARCH_MXC levelFabio Estevam2014-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting a mx6q system built with multi_v7_defconfig leads to the following error messages on boot: [ 0.037758] imx6q_ocram_suspend_init: ocram pool unavailable! [ 0.037768] imx6_pm_common_init: failed to initialize ocram suspend -19! This happens because CONFIG_SRAM is not selected by default in multi_v7_defconfig. Fix this by selecting CONFIG_SRAM at ARCH_MXC level, so that other SoCs could use the SRAM driver as well. As SRAM automatically selects GENERIC_ALLOCATOR, just drop it from the Kconfig entry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: add speed grading check for i.mx6 socAnson Huang2014-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fuse map of speed_grading[1:0] defines the max speed of ARM, see below the definition: 2b'11: 1200000000Hz; 2b'10: 996000000Hz; 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. 2b'00: 792000000Hz; Need to remove all illegal setpoints according to fuse map. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-24 16:34:41 -0400