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| * | | | ARM: clk-imx6q: refine clock tree for ESAIShengjiu Wang2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename 'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'. Make the clock for ESAI more clear and align them with imx6sx. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: clk-imx6sl: Select appropriate parents for LCDIF clocksFabio Estevam2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PLL5 is well suited for being the parent of IMX6SL_CLK_LCDIF_PIX_SEL and PLL2_PFD for IMX6SL_CLK_LCDIF_AXI_SEL. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: clk-imx6sl: Remove csi_lcdif_sels[]Fabio Estevam2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently csi_lcdif_sels[] is a shared array for the providing the possible clock parents for csi and lcdif blocks. This is not correct, as csi and lcdif do not share the same clock parents. Introduce csi_sels[] for the csi and lcdif_axi_sels[] for the lcdif clocks in order to describe the parents correctly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: imx: clk-vf610: Add USBPHY clocksStefan Agner2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds PLL7 which is required for USBPHY1. It also adds the USB PHY and USB Controller clocks and the gates to enable them. Acked-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: imx: add cpufreq support for i.mx6sxAnson Huang2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpufreq support for i.MX6SX, using common i.MX6Q cpufreq driver. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: imx: clk-vf610: introduce clks_init_onStefan Agner2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the end of the boot process, the clock framework might disable required main PLL's. So far, this was no issue since drivers requested clocks, which are descended of the main PLL's (e.g. pll1_pfd1, which provides the system clock). To archive the full 500MHz system clock, DDR clock need to be a descendant of PLL2 rather than PLL1 (DDRC_CLK_SEL set to 0). The bootloader sets up the clocks accordingly before making use of DDR at all. However, in Linux, there is no driver using PLL2, which lead to PLL2 being disabled by the clock framework. With this patch, we make sure that the main system clock and the DDR clock are initially enabled and are kept enabled. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: i.MX1: Add devicetree supportAlexander Shiyan2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic devicetree support for i.MX1 based SoCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | | ARM: i.MX6: add more chip revision supportJason Liu2014-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add more revision support for the new i.MX6DQ tape-out (TO1.5). This TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3 and TO1.4 are never revealed. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge tag 'cleanup-for-linus' of ↵Linus Torvalds2014-10-08
|\| | | | | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "This time around, the cleanup branch contains mostly code removal. A number of board files for at91, imx and msm have become obsolete because of the DT conversion and are now ready to be removed. The OMAP platform has traditionally had its own DMA engine abstraction and as this is being phased out, a lot of the original code is now unused and can be removed as well. S3C24xx can be simplified now that the restart code is a proper device driver. Finally, a number of cleanups in shmobile are done to prepare for the addition of new code in other branches" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits) ARM: at91: Remove the support for the RSI EWS board arm: mach-omap2: Convert pr_warning to pr_warn ARM: OMAP: Remove unused pieces of legacy DMA API ARM: at91: remove board file for Acme Systems Fox G20 ARM: orion5x: Convert pr_warning to pr_warn ARM: S3C24XX: remove separate restart code ARM: EXYNOS: Do not calculate boot address twice ARM: sunxi: Remove sun4i reboot code from mach directory ARM: imx: Remove mach-mxt_td60 board file ARM: shmobile: armadillo800eva legacy: Use rmobile_add_devices_to_domains() ARM: shmobile: r8a7740: Clean up pm domain table ARM: shmobile: r8a7740: Use rmobile_add_devices_to_domains() ARM: shmobile: sh7372: Make domain_devices[] static __initdata ARM: shmobile: mackerel: Make domain_devices[] static __initdata clocksource: tcb_clksrc: sanitize IRQ request ARM: at91/tclib: mask interruptions at shutdown and probe ARM: at91/tclib: move initialization from alloc to probe ARM: at91/tclib: prefer using of devm_* functions ARM: clps711x: Switch CLPS711X subarch to use clk and clocksource driver ARM: shmobile: r8a7791 is now called "R-Car M2-W" ...
| * | | ARM: imx: Remove mach-mxt_td60 board fileFabio Estevam2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the current support of mach-mxt_td60 board can be converted to devicetree. Remove the board file. Cc: Alan Carvalho de Assis <acassis@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: i.MX: Remove i.MX1 ADS board supportAlexander Shiyan2014-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx1ads.c can be replaced with devicetree equivalent: imx1-ads.dts, so remove the board file. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: imx: remove imx_scu_standby_enable()Shawn Guo2014-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit c716483c3db1 ("ARM: 8122/1: smp_scu: enable SCU standby support"), the STANDBY bit of SCU is handled by core function scu_enable(). So imx_scu_standby_enable() can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: i.MX: Remove Phytec i.MX27 PCM038/PCM970 board filesAlexander Shiyan2014-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pcm970-baseboard.c and mach-pcm038.c can be replaced with their devicetree equivalents: imx27-phytec-phycore-rdk.dts and imx27-phytec-phycore-som.dtsi respectively, so remove the board files. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: i.MX: Remove mach-cpuimx27sd board fileAlexander Shiyan2014-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eukrea_mbimx27-baseboard.c and mach-cpuimx27.c can be replaced with their devicetree equivalents: imx27-eukrea-mbimxsd27-baseboard.dts and imx27-eukrea-cpuimx27.dtsi respectively, so remove the board files. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: imx: iomux: Do not export symbol without public declarationAlexander Stein2014-09-01
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | The iomux function declarations are in headers only accessible in this directory. Thus those can't be used in any module. None of the objects in this directory is tristate. Neither can the header be included in out-of-tree modules. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* / | ARM: imx: fix .is_enabled() of shared gate clockShawn Guo2014-09-23
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 63288b721a80 ("ARM: imx: fix shared gate clock") attempted to fix an issue with particular enable/disable sequence from two shared gate clocks. But unfortunately, while it partially fixed the issue, it also did something wrong in .is_enabled() function hook. In case of shared gate, the function shouldn't really query the hardware state via share_count, because the function is trying to query the enabling state of the clock in question, not the hardware state which is shared by multiple clocks. Fix the issue by returning the enable_count of the clock itself which is maintained by clock core, in case it's a clock sharing hardware gate with others. As the result, the initialization of share_count per hardware state is not needed now. So remove it. Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Fixes: 63288b721a80 ("ARM: imx: fix shared gate clock") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: imx: correct gpu2d_axi and gpu3d_axi clock settingAnson Huang2014-08-18
| | | | | | | | | | | | | | | | | | | | | | | | On i.MX6Q, gpu2d_axi and gpu3d_axi are either from AXI or AHB clock, but on i.MX6DL, gpu2d_axi and gpu3d_axi are from mmdc_ch0_axi_podf, and they can NOT be gated by mmdc_ch0_axi 's clock gate, the mux option register field(CCM_CBCMR) is marked as "Reserved" now on i.MX6DL RM, so correct these two clks setting. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* | ARM: imx: remove unnecessary ARCH_HAS_OPP selectShawn Guo2014-08-17
| | | | | | | | | | | | | | Since ARCH_MXC already selects ARCH_HAS_OPP, it's really unnecessary for SOC_IMX27 and SOC_IMX5 to select it again. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* | ARM: imx: fix TLB missing of IOMUXC base address during suspendShawn Guo2014-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the suspend routine running in OCRAM puts DDR into self-refresh, it will access IOMUXC block to float DDR IO for power saving. A TLB missing of IOMUXC base address may happen in this case, and triggers an access to DDR, and thus hangs the system. The failure is discovered by running suspend/resume on a Cubox-i board. Though the issue is not Cubox-i specific, it can be hit the on the board quite easily with the 3.15 or 3.16 kernel. Fix the issue with a dummy access to IOMUXC block at the beginning of suspend routine, so that the address translation can be filled into TLB before DDR is put into self-refresh. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Cc: <stable@vger.kernel.org> Acked-by: Anson Huang <Anson.Huang@freescale.com>
* | ARM: imx6: fix SMP compilation againArnd Bergmann2014-08-17
|/ | | | | | | | | | | | | | | | | My earlier patch 1fc593feaf8e ("ARM: imx: build i.MX6 functions only when needed") fixed a problem with building an i.MX5 kernel, but now the problem has returned for the case where we allow ARMv6K SMP builds in multiplatform. With CONFIG_CPU_V7 disabled, but i.MX3 and SMP enabled, we get this build error: arch/arm/mach-imx/built-in.o: In function `v7_secondary_startup': :(.text+0x5124): undefined reference to `v7_invalidate_l1' This puts the code inside of an "ifdef CONFIG_SOC_IMX6" to hopefully do the right thing in all configurations. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* Merge tag 'soc-for-3.17' of ↵Linus Torvalds2014-08-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
| * Merge tag 'exynos-cpuidle' of ↵Olof Johansson2014-07-19
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim: - add callbacks exynos_suspend() and exynos_powered_up() for support cpuidle through mcpm - skip exynos_cpuidle for exynos5420 because is uses cpuidle-big-liggle generic cpuidle driver - add generic functions to calculate cpu number is used for pmu and this is required for exynos5420 multi-cluster - add of_device_id structure for big.LITTLE cpuidle and add "samsung,exynos5420" compatible string for exynos5420 * tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm ARM: EXYNOS: do not allow cpuidle registration for exynos5420 cpuidle: big.LITTLE: init driver for exynos5420 cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config ARM: EXYNOS: add generic function to calculate cpu number cpuidle: big.LITTLE: add of_device_id structure + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: imx: clk-vf610: fix FlexCAN clock gatingStefan Agner2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | Extend the clock control for FlexCAN with the second gate which enable the clocks in the Clock Divider (CCM_CSCDR2) register too. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targetsAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | This patch uses clocksource_of_init() call for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX53: globally disable supervisor protectSteffen Trumtrar2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most peripherals on the i.MX53 have an Off-Platform Peripheral Access Control Register (OPACR) in which the access rights (together with the MPROT registers) can be declared. However, this does not seem to work for example for SSI1+SDMA, because the supervisor bit is not set for the SDMA unit. It does work for SSI2, the QSB for example uses SSI2 for its audio. But SSI2 only works because it does NOT have an OPACR. The right solution would be to fix the access rights for the SDMA, but the unit responsible for this is the Central Security Unit (CSU), which of course is NOT documented. So, until documentation for this is openly available, turn off the supervisor protection because it cripples the hardware. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: allow disabling supervisor protect via DTSteffen Trumtrar2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX SoCs allow to setup fine grained access rights to peripherals on the AIPS bus. This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21 or in later SoC versions the Off-Platform Peripheral Access Control Register (OPACR), e.g. i.MX53. Under certain circumstances this leads to problems in which bus masters are not granted their access rights to peripherals. To be able to disable these restrictions on DT platforms, add a helper function that looks for AIPS nodes in the DT and disables them for every compatible node it finds. The compatible has to be declared in the mach-specific entry file, where this helper function should then be called. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gateAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | This patch adds missing 26 MHz oscillator circuit clock gate support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 clk: Remove unused definitionsAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | This patch removes definitions which not used anywhere in the driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX27 clk: Introduce DT include for clock providerAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | Use clock defines in order to make devicetrees more human readable. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board ↵Alexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | support The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27Alexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27. Instead we use SOC_IMX*. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX: Remove i.MX1 camera supportAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | i.MX1 camera driver has been removed by the commit 90b055898e. This patch removes remaining support files for this camera. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: use PTR_ERR_OR_ZEROFabian Frederick2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | replace IS_ERR/PTR_ERR Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: build cpu_is_imx6sl function conditionallyArnd Bergmann2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl based machine. However if support for imx6sl is not enabled at compile time, this prevents us from building the kernel and we get this link error instead: arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': :(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk' This makes the cpu_is_imx6sl function conditionally return false if imx6sl is disabled at compile-time, which matches what the older cpu_is_mx* macros did. We have similar inline functions for the other imx6 variants, but so far I have not run into a case where the extra #ifdef is necessary. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: imx6sx uses imx6q cpuidle codeArnd Bergmann2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building a kernel for imx6sx but without imx6q support results in this link error because of the missing cpuidle driver: arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228): undefined reference to `imx6q_cpuidle_init' This patch adds a Makefile entry so we always build support for the imx6q_cpuidle code when at least one of the 6sx or 6q variants are enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: drop PL310 errata 588369 and 727915Shawn Guo2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and 727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So let's drop them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocksFabio Estevam2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | SSI and SSI_IPG are clocks controlled by the same clock gating field, so register them with imx_clk_gate2_shared. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: mark .dt_compat as constShawn Guo2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise GCC will mark the .init.rodata section R/W, which causes a compile error once we add other real R/O data. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: mx6: Only check for 1.2GHz for mx6quadFabio Estevam2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is only the mx6quad variant that can run up to 1.2GHz, so add the check accordingly. This avoids getting the following warning on a mx6solo: failed to disable 1.2 GHz OPP Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX25 clk: Use of_clk_init() for DT caseDenis Carikli2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM i.MX25 clk: Fix gpt timer clock.Denis Carikli2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | The gpt0 timer clock has been wrong since: 6bbaec5 ARM i.MX25: implement clocks using common clock framework Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX21 clk: Add devicetree supportAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | This patch adds devicetree support CCM module for i.MX21 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX21 clk: Cleanup driverAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a cleanup for i.MX21 clk driver. This change includes: - Reduce license text. - Remove unused definitions. - Remove unused #include and sort the rest. - Remove useless comment. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX21 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes clk_register_clkdev() for the clocks that do not have any users for boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: i.MX21 clk: Clock initialization reworkAlexander Shiyan2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | This patch perform rework i.MX21 clock initialization. This includes adding missing clocks and sort clocks by register address. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: clk-imx51-imx53: Remove clk_register_clkdev()Fabio Estevam2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx51 and mx53 are device tree only platforms, so we no longer need all these calls to clk_register_clkdev(). Only keep cpu0 and gpc_dvfs clk_register_clkdev() calls. Tested on imx51-babbage and imx53-qsb boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: add standby mode support for suspendAnson Huang2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add standby mode support for suspend, to enter standby mode: echo standby > /sys/power/state; Use UART or RTC alarm to wake up system, when system enters standby mode, SOC will enter STOP mode with ARM core kept power on and 24M XTAL on. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: mem bit must be cleared before entering DSM modeAnson Huang2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | According to hardware design, mem bit must be clear before entering DSM mode, as ARM core will be power gated in DSM mode. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx6qdl: switch to use macro for clock IDShawn Guo2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | Instead of using enum for clock ID, let's switch imx6qdl clock driver to use macro. In this case, device tree can reuse these macros to improve readability. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | ARM: imx: add cpuidle support for i.mx6sxAnson Huang2014-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpuidle support for i.MX6SX, derive from i.MX6Q's cpuidle, two levels supported: 1. WFI; 2. WAIT mode. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-04 10:37:31 -0400