aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel
Commit message (Collapse)AuthorAge
...
| | | * | | | | ARM: perf: clean and update ARMv7 event numbersWill Deacon2011-12-02
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the ARMv7 perf event numbers so that: (1) A consistent naming scheme is used between different CPUs. (2) Only events actually used by Linux are described. (3) Where possible, architected events are used in preference to CPU-specific events. This results in the removal of a load of unused, hardcoded data and makes it more clear as to which events are supported on each PMU. Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | | | | Merge branch 'irqchip-consolidation' of ↵Russell King2011-11-21
| | |\ \ \ \ \ | | | |_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable Conflicts: arch/arm/mach-omap2/board-4430sdp.c arch/arm/mach-omap2/board-omap4panda.c arch/arm/mach-omap2/include/mach/omap4-common.h arch/arm/plat-omap/include/plat/irqs.h The changes to omap4-common.h were moved to arch/arm/mach-omap2/common.h and the other trivial conflicts resolved. The now empty ifdef in irqs.h was also eliminated.
| | | * | | | ARM: Make global handler and CONFIG_MULTI_IRQ_HANDLER mutually exclusiveMarc Zyngier2011-11-15
| | | | |/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code requires the arch_irq_handler_default macro to be defined as a fallback. It turns out nobody is using that particular feature as both PXA and shmobile have all their machine descriptors populated with the interrupt handler, leaving unused code (or empty macros) in their entry-macro.S file just to be able to compile entry-armv.S. Make CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default, which allows to remove one test from the hot path. Also cleanup both PXA and shmobile entry-macro.S. Cc: Paul Mundt <lethal@linux-sh.org> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Tested-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * | | | ARM: restart: only perform setup for restart when soft-restartingRussell King2011-11-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need to set the system up for a soft-restart if we're going to be doing a soft-restart. Provide a new function (soft_restart()) which does the setup and final call for this, and make platforms use it. Eliminate the call to setup_restart() from the default handler. This means that platforms arch_reset() function is no longer called with the page tables prepared for a soft-restart, and caches will still be enabled. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Krzysztof Ha■asa <khc@pm.waw.pl> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Richard Purdie <richard.purdie@linuxfoundation.org> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | ARM: restart: remove argument to setup_mm_for_reboot()Russell King2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setup_mm_for_reboot() doesn't make use of its argument, so remove it. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | ARM: restart: move reboot failure handing into machine_restart()Russell King2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the failure to reboot into machine_restart() to always catch this condition, even if a platform decides to hook the restarting via arm_pm_restart(). Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | ARM: restart: allow platforms more flexibility specifying restart modeRussell King2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 'soft_reboot' into a more generic 'restart_mode' variable, allowing the default restart mode to be specified. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | ARM: restart: add restart hook to machine_desc recordRussell King2011-11-10
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a restart hook to the machine_desc record so we don't have to populate all platforms with init_early methods to initialize the arm_pm_restart function pointer. Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branches 'fixes' and 'misc' into for-linusRussell King2012-01-05
| |\ \ \ \ | | |_|_|/ | |/| | |
| | * | | ARM: 7212/1: smp_twd: reconfigure clockevents after cpufreq changeLinus Walleij2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This break-out from Colin Cross' cpufreq-aware TWD patch will handle the case when our localtimer's clock changes with the cpu clock. A cpufreq transtion notifier will be registered only if the platform has supplied a specified clock to the TWD. After a cpufreq transition, update the clockevent's frequency by fetching the new clock rate from the clock framework and reprogram the next clock event. The necessary changes in the clockevents framework was done by Thomas Gleixner in kernel v3.0. ChangeLog v1->v2: - Replace IS_ERR_OR_NULL() with IS_ERR() in twd_clk check. - Update code to use the already existing per-cpu array of TWD clockevents instead of adding cruft. [Broke out, ifdef:ed CPUfreq stuff for non-cpufreq configs] [Rebased to newer TWD base with per-CPU clock array] Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7211/1: smp_twd: get the rate from a clockLinus Walleij2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This break-out from Colin Cross' cpufreq-aware TWD patch will optionally retrieve the clock rate of the TWD from an external clock. A variant of this patch has been proposed by Rob Herring as well. The basic idea is to avoid recalibrating the rate of the clock at boot if the platform already know what rate the clock to the TWD block has. ChangeLog v1->v2: added clk_[prepare|unprepare] calls. [Broke out of larger SMP TWD patch] Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7210/1: smp_twd: modernize clock event registrationLinus Walleij2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This break-out from Colin Cross' cpufreq-aware TWD patch will just modernize the clock event registration code to use clockevents_config_and_register(). [Broke out of larger SMP TWD patch] Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7209/1: Use generic ARM instruction set condition code checks for kprobes.Leif Lindholm2011-12-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the kprobes implementation to use the generic ARM instruction set condition code checks, rather than a dedicated implementation. Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Jon Medhurst <tixy@yxit.co.uk> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7208/1: Add condition code checking to SWP emulation handler.Leif Lindholm2011-12-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes two separate issues with the SWP emulation handler: 1: Certain processors implementing ARMv7-A can (legally) take an undef exception even when the condition code would have meant that the instruction should not have been executed. 2: Opcodes with all flags set (condition code = 0xf) have been reused in recent, and not-so-recent, versions of the ARM architecture to implement unconditional extensions to the instruction set. The existing code would still have processed any undefs triggered by executing an opcode with such a value. This patch uses the new generic ARM instruction set condition code checks to implement proper handling of these situations. Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7206/1: Add generic ARM instruction set condition code checks.Leif Lindholm2011-12-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch breaks the ARM condition checking code out of nwfpe/fpopcode.{ch} into a standalone file for opcode operations. It also modifies the code somewhat for coding style adherence, and adds some temporary variables for increased readability. Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 7199/2: only look for TCM on ARMv5 and laterLinus Walleij2011-12-13
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Integrator AP/CP can have a varying set of core modules, some (like ARM920T) are so old that trying to read the TCM status register with CP15 will make them hang. So we need to make sure that we are running on v5 or later in order to be able to activate this for the Integrator. (The Integrator with CM926EJ-S has 32+32 kb of TCM memory.) Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'core-rcu-for-linus' of ↵Linus Torvalds2012-01-06
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip * 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (64 commits) cpu: Export cpu_up() rcu: Apply ACCESS_ONCE() to rcu_boost() return value Revert "rcu: Permit rt_mutex_unlock() with irqs disabled" docs: Additional LWN links to RCU API rcu: Augment rcu_batch_end tracing for idle and callback state rcu: Add rcutorture tests for srcu_read_lock_raw() rcu: Make rcutorture test for hotpluggability before offlining CPUs driver-core/cpu: Expose hotpluggability to the rest of the kernel rcu: Remove redundant rcu_cpu_stall_suppress declaration rcu: Adaptive dyntick-idle preparation rcu: Keep invoking callbacks if CPU otherwise idle rcu: Irq nesting is always 0 on rcu_enter_idle_common rcu: Don't check irq nesting from rcu idle entry/exit rcu: Permit dyntick-idle with callbacks pending rcu: Document same-context read-side constraints rcu: Identify dyntick-idle CPUs on first force_quiescent_state() pass rcu: Remove dynticks false positives and RCU failures rcu: Reduce latency of rcu_prepare_for_idle() rcu: Eliminate RCU_FAST_NO_HZ grace-period hang rcu: Avoid needlessly IPIing CPUs at GP end ...
| * \ \ \ Merge branch 'rcu/next' of ↵Ingo Molnar2011-12-14
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcu
| | * | | | nohz: Remove tick_nohz_idle_enter_norcu() / tick_nohz_idle_exit_norcu()Frederic Weisbecker2011-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those two APIs were provided to optimize the calls of tick_nohz_idle_enter() and rcu_idle_enter() into a single irq disabled section. This way no interrupt happening in-between would needlessly process any RCU job. Now we are talking about an optimization for which benefits have yet to be measured. Let's start simple and completely decouple idle rcu and dyntick idle logics to simplify. Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Reviewed-by: Josh Triplett <josh@joshtriplett.org> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
| | * | | | nohz: Allow rcu extended quiescent state handling seperately from tick stopFrederic Weisbecker2011-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is assumed that rcu won't be used once we switch to tickless mode and until we restart the tick. However this is not always true, as in x86-64 where we dereference the idle notifiers after the tick is stopped. To prepare for fixing this, add two new APIs: tick_nohz_idle_enter_norcu() and tick_nohz_idle_exit_norcu(). If no use of RCU is made in the idle loop between tick_nohz_enter_idle() and tick_nohz_exit_idle() calls, the arch must instead call the new *_norcu() version such that the arch doesn't need to call rcu_idle_enter() and rcu_idle_exit(). Otherwise the arch must call tick_nohz_enter_idle() and tick_nohz_exit_idle() and also call explicitly: - rcu_idle_enter() after its last use of RCU before the CPU is put to sleep. - rcu_idle_exit() before the first use of RCU after the CPU is woken up. Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: David Miller <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Mackerras <paulus@samba.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
| | * | | | nohz: Separate out irq exit and idle loop dyntick logicFrederic Weisbecker2011-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tick_nohz_stop_sched_tick() function, which tries to delay the next timer tick as long as possible, can be called from two places: - From the idle loop to start the dytick idle mode - From interrupt exit if we have interrupted the dyntick idle mode, so that we reprogram the next tick event in case the irq changed some internal state that requires this action. There are only few minor differences between both that are handled by that function, driven by the ts->inidle cpu variable and the inidle parameter. The whole guarantees that we only update the dyntick mode on irq exit if we actually interrupted the dyntick idle mode, and that we enter in RCU extended quiescent state from idle loop entry only. Split this function into: - tick_nohz_idle_enter(), which sets ts->inidle to 1, enters dynticks idle mode unconditionally if it can, and enters into RCU extended quiescent state. - tick_nohz_irq_exit() which only updates the dynticks idle mode when ts->inidle is set (ie: if tick_nohz_idle_enter() has been called). To maintain symmetry, tick_nohz_restart_sched_tick() has been renamed into tick_nohz_idle_exit(). This simplifies the code and micro-optimize the irq exit path (no need for local_irq_save there). This also prepares for the split between dynticks and rcu extended quiescent state logics. We'll need this split to further fix illegal uses of RCU in extended quiescent states in the idle loop. Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: David Miller <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Mackerras <paulus@samba.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org>
* | | | | | Merge branch 'memblock-kill-early_node_map' of ↵Ingo Molnar2011-12-20
|\ \ \ \ \ \ | |_|_|/ / / |/| | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/misc into core/memblock
| * | | | | memblock: Fix include breakages caused by 24aa07882bTejun Heo2011-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 24aa07882b (memblock, x86: Replace memblock_x86_reserve/free_range() with generic ones) removed arch/x86/include/asm/memblock.h and dropped its inclusion from include/linux/memblock.h which breaks other architectures which depended on the generic memblock.h pulling in the arch specific one. However, the proper fix isn't adding back the asm inclusion. memblock doesn't have any arch dependent part and doesn't need arch specific header file and asm/memblock.h files are either practically empty or contain mostly unrelated arch specific stuff. * In microblaze, sh, powerpc, sparc and openrisc, asm/memblock.h is either empty or just contains unused MEMBLOCK_DBG() macro. Remove them. * In arm and unicore32, asm/memblock.h contains arch specific stuff. Include it directly from its users. It might be a good idea to rename the header file to avoid confusion. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: "H. Peter Anvin" <hpa@zytor.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Michal Simek <monstr@monstr.eu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
* | | | | | ARM: unwinder: fix bisection to find origin in .idx sectionUwe Kleine-König2011-12-15
| |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bisection implemented in unwind_find_origin() stopped to early. If there is only a single entry left to check the original code just took the end point as origin which might be wrong. This was introduced in commit de66a979012d ("ARM: 7187/1: fix unwinding for XIP kernels"). Reported-and-tested-by: Nick Bowler <nbowler@elliptictech.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | | ARM: 7204/1: arch/arm/kernel/setup.c: initialize arm_dma_zone_size earlierArnaud Patard2011-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm_dma_zone_size is used by arm_bootmem_free() which is called by paging_init(). Thus it needs to be set before calling it. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | ARM: 7185/1: perf: don't assign platform_device on unsupported CPUsWill Deacon2011-12-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the unlikely case that a platform registers a PMU platform_device when running on a CPU that is unsupported by perf, we will encounter a NULL dereference when trying to assign the platform_device to the cpu_pmu structure. This patch checks that the CPU is supported by perf before assigning the platform_device. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | ARM: 7187/1: fix unwinding for XIP kernelsUwe Kleine-König2011-12-06
| |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker places the unwind tables in readonly sections. So when using an XIP kernel these are located in ROM and cannot be modified. For that reason the current approach to convert the relative offsets in the unwind index to absolute addresses early in the boot process doesn't work with XIP. The offsets in the unwind index section are signed 31 bit numbers and the structs are sorted by this offset. So it first has offsets between 0x40000000 and 0x7fffffff (i.e. the negative offsets) and then offsets between 0x00000000 and 0x3fffffff. When seperating these two blocks the numbers are sorted even when interpreting the offsets as unsigned longs. So determine the first non-negative entry once and track that using the new origin pointer. The actual bisection can then use a plain unsigned long comparison. The only thing that makes the new bisection more complicated is that the offsets are relative to their position in the index section, so the key to search needs to be adapted accordingly in each step. Moreover several consts are added to catch future writes and rename the member "addr" of struct unwind_idx to "addr_offset" to better match the new semantic. (This has the additional benefit of breaking eventual users at compile time to make them aware of the change.) In my tests the new algorithm was a tad faster than the original and has the additional upside of not needing the initial conversion and so saves some boot time and it's possible to unwind even earlier. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'perf-urgent-for-linus' of ↵Linus Torvalds2011-12-05
|\ \ \ \ | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf: Fix loss of notification with multi-event perf, x86: Force IBS LVT offset assignment for family 10h perf, x86: Disable PEBS on SandyBridge chips trace_events_filter: Use rcu_assign_pointer() when setting ftrace_event_call->filter perf session: Fix crash with invalid CPU list perf python: Fix undefined symbol problem perf/x86: Enable raw event access to Intel offcore events perf: Don't use -ENOSPC for out of PMU resources perf: Do not set task_ctx pointer in cpuctx if there are no events in the context perf/x86: Fix PEBS instruction unwind oprofile, x86: Fix crash when unloading module (nmi timer mode) oprofile: Fix crash when unloading module (hr timer mode)
| * | | perf: Don't use -ENOSPC for out of PMU resourcesPeter Zijlstra2011-11-14
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | People (Linus) objected to using -ENOSPC to signal not having enough resources on the PMU to satisfy the request. Use -EINVAL. Requested-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Stephane Eranian <eranian@google.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-xv8geaz2zpbjhlx0svmpp28n@git.kernel.org [ merged to newer kernel, fixed up MIPS impact ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | ARM: 7182/1: ARM cpu topology: fix warningVincent Guittot2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel/sched.c:7354:2: warning: initialization from incompatible pointer type Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef use int cpu instead of unsigned int cpu Cc: <stable@vger.kernel.org> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and belowJon Medhurst (Tixy)2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction is deprecated on ARMv6 and with ARMv7 it will be UNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a SWP instruction will cause an oops when the kprobes emulation code executes an undefined instruction. As the SWP instruction should be rare or non-existent in kernels for ARMv6 and later, we can simply avoid these problems by not allowing probing of these. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: 7180/1: Change kprobes testcase with unpredictable STRD instructionJon Medhurst (Tixy)2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory. On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value. Fix this by changing testcase to used r5 instead of r3. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernelsJon Medhurst2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: 7170/2: fix compilation breakage in entry-armv.SGuennadi Liakhovetski2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compilation failure, when Thumb support is not enabled: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:501: Error: backward ref to unknown label "2:" arch/arm/kernel/entry-armv.S:502: Error: backward ref to unknown label "3:" make[2]: *** [arch/arm/kernel/entry-armv.o] Error 1 Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'for-rmk' of ↵Russell King2011-11-22
|\ \ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into fixes
| * | | ARM: perf: check that we have a platform device when reserving PMUWill Deacon2011-11-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attempting to use a hardware counter on a platform with a supported PMU but where the platform_device (defining the interrupts) has not been registered results in a NULL pointer dereference. This patch fixes the problem by checking that we actually have a platform device registered before attempting to grab the interrupts. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | | ARM: perf: initialise used_mask for fake PMU during validationWill Deacon2011-11-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When validating an event group, we call pmu->get_event_idx for each group member in order to check that the group can be scheduled as a unit on an empty PMU. As a result of 3fc2c830 ("ARM: perf: remove event limit from pmu_hw_events"), the used_mask member of struct cpu_hw_events must be setup explicitly, something which we don't do for the fake cpu_hw_events used for validation. This patch sets up an empty used_mask for the fake validation cpu_hw_events, preventing NULL deferences when trying to get the event index. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | | ARM: PMU: re-export release_pmu symbol to modulesWill Deacon2011-11-16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b0e89590 ("ARM: PMU: move CPU PMU platform device handling and init into perf") inadvertently removed the EXPORT_SYMBOL_GPL on release_pmu, so out-of-tree modules can no longer play nice with perf, even if they tried in the first place. This patch re-exports the symbol. Reported-by: Jon Medhurst (Tixy) <jon.medhurst@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
* | / ARM: 7161/1: errata: no automatic store buffer drainWill Deacon2011-11-21
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a workaround for PL310 erratum 769419. On revisions of the PL310 prior to r3p2, the Store Buffer does not automatically drain. This can cause normal, non-cacheable writes to be retained when the memory system is idle, leading to suboptimal I/O performance for drivers using coherent DMA. This patch adds an optional wmb() call to the cpu_idle loop. On systems with an outer cache, this causes an explicit flush of the store buffer. Cc: stable@vger.kernel.org Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: wire up process_vm_writev and process_vm_readv syscallsRussell King2011-11-17
| | | | | | | | | | | | | | These two syscalls were introduced during the last merge window. Add the entries into the ARM call tables for them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7160/1: setup: avoid overflowing {elf,arch}_name from proc_info_listWill Deacon2011-11-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setup_processor copies the arch_name and elf_name fields out of the selected proc_info_list into two fixed size buffers. Since the proc_info_list structure is defined in a proc_*.S assembly file, this can lead to subtle errors if the strings defined there are too long (for example, corrupting the machine ID). This patch uses snprintf instead of sprintf to ensure that these buffers are not overrun. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processorsCatalin Marinas2011-11-08
| | | | | | | | | | | | | | | | | | | | | | | | | | Recent gcc versions generate unaligned accesses by default on ARMv6 and later processors. This patch ensures that the SCTLR.A bit is always cleared on such processors to avoid kernel traping before alignment_init() is called. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: John Linn <John.Linn@xilinx.com> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Revert "ARM: 7098/1: kdump: copy kernel relocation code at the kexec prepare ↵Russell King2011-11-07
|/ | | | | | | | | | | | | | | | | | | | stage" This reverts commit 2b034922af2caa19df86f0c502e76cb6f6e910f9. Will Deacon reports: This is causing kexec to fail. The symptoms are that the .init.text section is not loaded as part of the new kernel image, so when we try to do the SMP/UP fixups we hit a whole sea of poison left there by the previous kernel. So my guess is that machine_kexec_prepare *is* too early for preparing the reboot_code_buffer and, unless anybody has a good reason not to, I'd like to revert the patch causing these problems. Reported-by: Will Deacon <will.deacon@arm.com>
* arm: fix implicit module.h users by adding it to arch/arm as required.Paul Gortmaker2011-10-31
| | | | | | | These files will fail to compile if we dont clean them up in advance and have them include the appropriate headers they need. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* arm: convert core files from module.h to export.hPaul Gortmaker2011-10-31
| | | | | | | | | | | | Many of the core ARM kernel files are not modules, but just including module.h for exporting symbols. Now these files can use the lighter footprint export.h for this role. There are probably lots more, but ARM files of mach-* and plat-* don't get coverage via a simple yesconfig build. They will have to be cleaned up and tested via using their respective configs. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* arm: remove several unnecessary module.h include instancesPaul Gortmaker2011-10-31
| | | | | | | | | | | | Building these files does not reveal a hidden need for any of these. Since module.h brings in the whole kitchen sink, it just needlessly adds 30k+ lines to the cpp burden. There are probably lots more, but ARM files of mach-* and plat-* don't get coverage via a simple yesconfig build. They will have to be cleaned up and tested via using their respective configs. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* arm: fix implicit memset/string.h usage in various arch/arm filesPaul Gortmaker2011-10-31
| | | | | | | | | | | | | | To fix things like this: arch/arm/mach-omap2/usb-tusb6010.c:58: error: implicit declaration of function 'memset' arch/arm/kernel/leds.c:40: error: implicit declaration of function 'strcspn' arch/arm/kernel/leds.c:40: warning: incompatible implicit declaration of built-in function 'strcspn' arch/arm/kernel/leds.c:45: error: implicit declaration of function 'strncmp' arch/arm/kernel/leds.c:55: error: implicit declaration of function 'strlen' arch/arm/kernel/leds.c:55: warning: incompatible implicit declaration of built-in function 'strlen' arch/arm/mach-omap2/clockdomain.c:52: error: implicit declaration of function 'strcmp' Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* arm: add elf.h to arch/arm/kernel/ptrace.cPaul Gortmaker2011-10-31
| | | | | | | | | | | It was implicitly getting it via an implicit presence of module.h but when we clean that up, we'll get a bunch of lines like this: arch/arm/kernel/ptrace.c:764: error: 'NT_PRSTATUS' undeclared here (not in a function) arch/arm/kernel/ptrace.c:765: error: 'ELF_NGREG' undeclared here (not in a function) arch/arm/kernel/ptrace.c:776: error: 'NT_PRFPREG' undeclared here (not in a function) Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* Merge branch 'devel-stable' of ↵Linus Torvalds2011-10-28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'devel-stable' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (178 commits) ARM: 7139/1: fix compilation with CONFIG_ARM_ATAG_DTB_COMPAT and large TEXT_OFFSET ARM: gic, local timers: use the request_percpu_irq() interface ARM: gic: consolidate PPI handling ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H ARM: mach-s5p64x0: remove mach/memory.h ARM: mach-s3c64xx: remove mach/memory.h ARM: plat-mxc: remove mach/memory.h ARM: mach-prima2: remove mach/memory.h ARM: mach-zynq: remove mach/memory.h ARM: mach-bcmring: remove mach/memory.h ARM: mach-davinci: remove mach/memory.h ARM: mach-pxa: remove mach/memory.h ARM: mach-ixp4xx: remove mach/memory.h ARM: mach-h720x: remove mach/memory.h ARM: mach-vt8500: remove mach/memory.h ARM: mach-s5pc100: remove mach/memory.h ARM: mach-tegra: remove mach/memory.h ARM: plat-tcc: remove mach/memory.h ARM: mach-mmp: remove mach/memory.h ARM: mach-cns3xxx: remove mach/memory.h ... Fix up mostly pretty trivial conflicts in: - arch/arm/Kconfig - arch/arm/include/asm/localtimer.h - arch/arm/kernel/Makefile - arch/arm/mach-shmobile/board-ap4evb.c - arch/arm/mach-u300/core.c - arch/arm/mm/dma-mapping.c - arch/arm/mm/proc-v7.S - arch/arm/plat-omap/Kconfig largely due to some CONFIG option renaming (ie CONFIG_PM_SLEEP -> CONFIG_ARM_CPU_SUSPEND for the arm-specific suspend code etc) and addition of NEED_MACH_MEMORY_H next to HAVE_IDE.
| * Merge branch 'ppi-irq-core-for-rmk' of ↵Russell King2011-10-23
| |\ | | | | | | | | | git://github.com/mzyngier/arm-platforms into devel-stable
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-06 21:33:59 -0400