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* [ARM] 3439/2: xsc3: add I/O coherency supportLennert Buytenhek2006-04-01
| | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek This patch adds support for the I/O coherent cache available on the xsc3. The approach is to provide a simple API to determine whether the chipset supports coherency by calling arch_is_coherent() and then setting the appropriate system memory PTE and PMD bits. In addition, we call this API on dma_alloc_coherent() and dma_map_single() calls. A generic version exists that will compile out all the coherency-related code that is not needed on the majority of ARM systems. Note that we do not check for coherency in the dma_alloc_writecombine() function as that still requires a special PTE setting. We also don't touch dma_mmap_coherent() as that is a special ARM-only API that is by definition only used on non-coherent system. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3437/1: Kill duplicate exports of string library functionsKomal Shah2006-04-01
| | | | | | | | | Patch from Komal Shah This patch fixes the duplicate exports of string library functions. Signed-off-by: Komal Shah <komal_shah802003@yahoo.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-04-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3424/2: ixp23xx: fix uncompress.h for recent CRLF decompressor change [ARM] 3434/1: pxa i2s amsl define [ARM] 3425/1: xsc3: need to include pgtable-hwdef.h [ARM] Allow un-muxed syscalls to be available for everyone [ARM] 3420/1: Missing clobber in example code [ARM] nommu: fixups for the exception vectors [ARM] nommu: add nommu specific Kconfig and MMUEXT variable in Makefile [ARM] nommu: start-up code [ARM] nommu: MPU support in boot/compressed/head.S
| * [ARM] 3420/1: Missing clobber in example codePaul Brook2006-03-28
| | | | | | | | | | | | | | | | | | | | Patch from Paul Brook The example code in the source documentation for __kernel_dmb clobbers r0 but doesn't list it the asm clobber list. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge nommu treeRussell King2006-03-28
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| | * [ARM] nommu: fixups for the exception vectorsHyok S. Choi2006-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | The high page vector (0xFFFF0000) does not supported in nommu mode. This patch allows the vectors to be 0x00000000 or the begining of DRAM in nommu mode. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: start-up codeHyok S. Choi2006-03-27
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [PATCH] unexport get_wchanAdrian Bunk2006-03-31
|/ / | | | | | | | | | | | | | | The only user of get_wchan is the proc fs - and proc can't be built modular. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [ARM] 3030/2: fix permission check in the obscur cmpxchg syscallNicolas Pitre2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre Quoting RMK: |pte_write() just says that the page _may_ be writable. It doesn't say |that the MMU is programmed to allow writes. If pte_dirty() doesn't |return true, that means that the page is _not_ writable from userspace. |If you write to it from kernel mode (without using put_user) you'll |bypass the MMU read-only protection and may end up writing to a page |owned by two separate processes. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge nommu treeRussell King2006-03-25
|\| | | | | | | | | | | Fix merge conflict in arch/arm/mm/proc-xscale.S Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Move read of processor ID out of lookup_processor_type()Russell King2006-03-21
| | | | | | | | | | | | | | | | | | | | Read the processor ID at boot, and save it in "processor_id" as we did before. Later, when we re-parse the CPU type in the setup.c code, re-use the value stored in "processor_id". This allows a cleaner work-around for noMMU devices without CP#15. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] noMMU: block sys_fork in nommu modeHyok S. Choi2006-03-21
| | | | | | | | | | | | | | | | | | The sys_fork is not supported in nommu mode. The other syscalls that is not supported in nommu mode are to be defined as cond_signal in kernel/sys_ni.c. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] SMP: don't set cpu_*_map in smp_prepare_boot_cpuRussell King2006-03-25
| | | | | | | | | | | | | | | | | | The recent addition of boot_cpu_init() implements the initialisation of the online, present and possible cpu maps for the boot CPU, so there is no reason to duplicate this in the architecture smp_prepare_boot_cpu() hook. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Move enable_irq and disable_irq to assembler.hRussell King2006-03-23
| | | | | | | | | | | | | | | | 5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to enable_irq not being defined as an assembly macro. Move it to assembler.h so everyone can use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Quieten spurious IRQ detectionRussell King2006-03-22
| | | | | | | | | | | | | | | | Only issue a "nobody cared" warning after 99900 spurious interrupts. This avoids the occasional spurious interrupt causing warnings, as per x86. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Convert kmalloc+memset to kzallocRussell King2006-03-21
| | | | | | | | | | | | Convert all uses of kmalloc followed by memset to use kzalloc instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 3261/2: remove phys_ram from struct machine_desc (part 3)Nicolas Pitre2006-03-21
| | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This field is redundent since it must be equal to PHYS_OFFSET anyway. There is no reference to it anymore so remove it at last. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Move IRQ enable after coprocessor number decodeRussell King2006-03-21
| | | | | | | | | | | | | | Allow the individual coprocessor handlers to decide when to enable interrupts, rather than unconditionally enabling them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Remove unnecessary asm/hardware.h includesRussell King2006-03-21
|/ | | | | | | | | asm/hardware.h is not required for the majority of processor support files, ioremap support, mm initialisation, acorn IO support, nor the debug code (which picks up its machine specific includes via debug-macros.S) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3362/1: [cleanup] - duplicate decleration of mem_fclk_21285Ben Dooks2006-03-15
| | | | | | | | | | Patch from Ben Dooks arch/arm/kernel/setup.c declares mem_fclk_21285 when this is already declared in include/asm-arm/system.h Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3365/1: [cleanup] header for compat.c exported functionsBen Dooks2006-03-15
| | | | | | | | | | | | Patch from Ben Dooks arch/arm/kernel/compat.c exports two functions, convert_to_tag_list and squash_mem_tags which are not defined in any header files, and not used outside arch/arm/kernel. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3363/1: [cleanup] process.c - fix warningsBen Dooks2006-03-15
| | | | | | | | | | | | | | | Patch from Ben Dooks Fix the following warnings from sparse: arch/arm/kernel/process.c:86:6: warning: symbol 'default_idle' was not declared. Should it be static? arch/arm/kernel/process.c:378:5: warning: symbol 'dump_fpu' was not declared. Should it be static? Include <linux/elfcore.h> for dump_fpu() decleration, and make default_idle() static as it is not used outside the file. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix "thead" typoRussell King2006-03-15
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] iwmmxt thread state alignmentRussell King2006-03-12
| | | | | | | | | This patch removes the reliance of iwmmxt on hand coded alignments. Since thread_info is always 8K aligned, specifying that fpstate is 8-byte aligned achieves the same effect without needing to resort to hand coded alignments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] fix next_timer_interrupt() for hrtimerTony Lindgren2006-03-06
| | | | | | | | | | | | | | | | | | | | | Also from Thomas Gleixner <tglx@linutronix.de> Function next_timer_interrupt() got broken with a recent patch 6ba1b91213e81aa92b5cf7539f7d2a94ff54947c as sys_nanosleep() was moved to hrtimer. This broke things as next_timer_interrupt() did not check hrtimer tree for next event. Function next_timer_interrupt() is needed with dyntick (CONFIG_NO_IDLE_HZ, VST) implementations, as the system can be in idle when next hrtimer event was supposed to happen. At least ARM and S390 currently use next_timer_interrupt(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [ARM] CONFIG_CPU_MPCORE -> CONFIG_CPU_32v6KRussell King2006-02-22
| | | | | | | CONFIG_CPU_MPCORE has never been a configuration symbol - it should be CONFIG_CPU_32v6K. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add panic-on-oops supportRussell King2006-02-22
| | | | | | | | Although you could ask the kernel for panic-on-oops, it remained non-functional because the architecture specific code fragment had not been implemented. Add it, so it works as advertised. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3338/1: old ABI compat: sys_socketcallNicolas Pitre2006-02-16
| | | | | | | | | | Patch from Nicolas Pitre Commit 99595d0237926b5aba1fe4c844a011a1ba1ee1f8 forgot to intercept sys_socketcall as well. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix SMP initialisation oopsRussell King2006-02-16
| | | | | | | | | | | | | | | | | | | | A change to the SMP initialisation caused the following oops: CPU1: Booted secondary processor CPU1: D VIPT write-back cache CPU1: I cache: 32768 bytes, associativity 4, 32 byte lines, 256 sets CPU1: D cache: 32768 bytes, associativity 4, 32 byte lines, 256 sets <7>Calibrating delay loop... 83.14 BogoMIPS (lpj=415744) <1>Unable to handle kernel NULL pointer dereference at virtual address 0000001c ... PC is at enqueue_task+0x1c/0x64 LR is at activate_task+0xcc/0xe4 SMP initialisation now requires cpu_possible_map to be initialised in setup_arch(). Move this from smp_prepare_cpus() to smp_init_cpus() and call it from our setup_arch() if CONFIG_SMP is enabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3310/1: add a comment about the possible __kuser_cmpxchg transient falseNicolas Pitre2006-02-08
| | | | | | | | | | | | | | | negative Patch from Nicolas Pitre The pre ARMv5 implementation can be aborted if an exception occurs in the middle of it. Because of that, the ARMv6 implementation doesn't re-attempt the operation on a failed strex either. Let's make this transient nature of such a false positive more explicit in the definition. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3309/1: disable the pre-ARMv5 NPTL kernel helper in the non MMU caseNicolas Pitre2006-02-08
| | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre The cmpxchg emulation on pre-ARMv5 relies on user code executed from a kernel address. If the operation cannot complete atomically, it is aborted from the usr_entry macro by clearing the Z flag. This clearing of the Z flag is done whenever the user pc is above TASK_SIZE. However this "pc >= TASK_SIZE" test cannot work in the non MMU case. Worse: the current code will corrupt the Z flag on every entry to the kernel. Let's disable it in the non MMU case for now. Using NPTL on non MMU targets needs to be worked out anyway. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3308/1: old ABI compat: struct sockaddr_unNicolas Pitre2006-02-08
| | | | | | | | | | | Patch from Nicolas Pitre struct sockaddr_un loses its padding with EABI. Since the size of the structure is used as a validation test in unix_mkname(), we need to change the length argument to 110 whenever it is 112. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] safer handling of syscall table paddingAl Viro2006-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM entry-common.S needs to know syscall table size; in itself that would not be a problem, but there's an additional constraint - some of the instructions using it want a constant that would be a multiple of 4. So we have to pad syscall table with sys_ni_syscall and that's where the trouble begins. .rept pseudo-op wants a constant expression for number of repetitions and subtraction of two labels (before and after syscall table) doesn't always get simplified to constant early enough for .rept. If labels end up in different frags, we lose. And while the frag size is large enough (slightly below 4Kb), the syscall table is about 1/3 of that. We used to get away with that, but the recent changes had been enough to trigger the breakage. Proper fix is simple: have a macro (CALL(x)) to populate the table instead of using explicit .long x and the first time we include calls.S have it defined to .equ NR_syscalls,NR_syscalls+1. Then we can find the proper amount of padding on the first inclusion simply by looking at NR_syscalls at that time. And that will be constant, no matter what. Moreover, the same trick kills the need of having an estimate of padded NR_syscalls - it will be calculated for free at the same time. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3271/1: ARM EABI: fix calling of cmpxchg syscall emulationNicolas Pitre2006-01-18
| | | | | | | | | | | Patch from Nicolas Pitre This is kernel provided user space code. Since a syscall is used, it has to be updated to work with EABI. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3270/1: ARM EABI: fix sigreturn and rt_sigreturnNicolas Pitre2006-01-18
| | | | | | | | | | | | Patch from Nicolas Pitre The signal return path consists of user code provided by the kernel. Since a syscall is used, it has to be updated to work with EABI. Noticed by Daniel Jacobowitz. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-01-14
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| * [ARM] 3262/4: allow ptraced syscalls to be overridenNicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This is needed by strace to properly handle the tracing of some system calls. It could be useful for other applications as well. Based on an earlier patch from Daniel Jacobowitz. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Daniel Jacobowitz <dan@debian.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3110/5: old ABI compat: multi-ABI syscall entry supportNicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This patch adds the required code to support both user space ABIs at the same time. A second syscall table is created to include legacy ABI syscalls that need an ABI compat wrapper. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3109/1: old ABI compat: syscall wrappers for ABI impedance matchingNicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre The difference between EABI and the legacy ABI may affect either structure member alignment and/or argument register selection. The patch has the details. Included are wrappers for the following syscalls: sys_stat64 sys_lstat64 sys_fstat64 sys_fcntl64 sys_epoll_ctl sys_epoll_wait sys_ipc sys_semop sys_semtimedop sys_pread64 sys_pwrite64 sys_truncate64 sys_ftruncate64 sys_readahead Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3108/2: old ABI compat: statfs64 and fstatfs64Nicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre struct statfs64 has extra padding with EABI growing its size from 84 to 88. This struct is now __attribute__((packed,aligned(4))) with a small assembly wrapper to force the sz argument to 84 if it is 88 to avoid copying the extra padding over user space memory unexpecting it. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3105/4: ARM EABI: new syscall entry conventionNicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre For a while we wanted to change the way syscalls were called on ARM. Instead of encoding the syscall number in the swi instruction which requires reading back the instruction from memory to extract that number and polluting the data cache, it was decided that simply storing the syscall number into r7 would be more efficient. Since this represents an ABI change then making that change at the same time as EABI support is the right thing to do. It is now expected that EABI user space binaries put the syscall number into r7 and use "swi 0" to call the kernel. Syscall register argument are also expected to have "EABI arrangement" i.e. 64-bit arguments should be put in a pair of registers from an even register number. Example with long ftruncate64(unsigned int fd, loff_t length): legacy ABI: - put fd into r0 - put length into r1-r2 - use "swi #(0x900000 + 194)" to call the kernel new ARM EABI: - put fd into r0 - put length into r2-r3 (skipping over r1) - put 194 into r7 - use "swi 0" to call the kernel Note that it is important to use 0 for the swi argument as backward compatibility with legacy ABI user space relies on this. The syscall macros in asm-arm/unistd.h were also updated to support both ABIs and implement the right call method automatically. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3104/1: ARM EABI: new helper function namesNicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre The ARM EABI defines new names for GCC helper functions. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3103/1: ARM EABI: stack pointer must be 64-bit aligned (part 2)Nicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre We must make sure that assembly code that modifies the stack pointer before calling a C function does it so it remains 64-bit aligned. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3102/1: ARM EABI: stack pointer must be 64-bit aligned after a CPU ↵Nicolas Pitre2006-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exception Patch from Nicolas Pitre The ARM EABI says that the stack pointer has to be 64-bit aligned for reasons already mentioned in patch #3101 when calling C functions. We therefore must verify and adjust sp accordingly when taking an exception from kernel mode since sp might not necessarily be 64-bit aligned if the exception occurs in the middle of a kernel function. If the exception occurs while in user mode then no sp fixup is needed as long as sizeof(struct pt_regs) as well as any additional syscall data stack space remain multiples of 8. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Support register switch in nommu modeHyok S. Choi2006-01-13
| | | | | | | | | | | | | | This patch adds register switch support in nommu mode. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3259/1: remove phys_ram from struct machine_desc (part 1)Nicolas Pitre2006-01-13
| | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This field is redundent since it must be equal to PHYS_OFFSET anyway. First, let's use PHYS_OFFSET directly instead. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] Add ecard_bus_type probe/remove/shutdown methodsRussell King2006-01-13
|/ | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-01-12
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| * [ARM] Convert some arm semaphores to mutexesArjan van de Ven2006-01-12
| | | | | | | | | | | | | | | | The arm clock semaphores are strict mutexes, convert them to the new mutex implementation Signed-off-by: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3256/1: Make the function-returning ldm's use sp as the base registerCatalin Marinas2006-01-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas If the low interrupt latency mode is enabled for the CPU (from ARMv6 onwards), the ldm/stm instructions are no longer atomic. An ldm instruction restoring the sp and pc registers can be interrupted immediately after sp was updated but before the pc. If this happens, the CPU restores the base register to the value before the ldm instruction but if the base register is not sp, the interrupt routine will corrupt the stack and the restarted ldm instruction will load garbage. Note that future ARM cores might always run in the low interrupt latency mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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