| Commit message (Collapse) | Author | Age |
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Change it from "Acer Chromebook 13" to GoogleNyanBig so it's unique and
identifiable.
With this change the card id exposed to userspace becomes GoogleNyanBig
instead of the current A13.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Replace the current incomplete pinmux setup with a proper one generated
using the tegra pinmux scripts.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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syseng has revamped the Jetson TK1 pinmux spreadsheet, basing the content
completely on correct configuration for the board/schematic, rather than
the previous version which was based on the bare minimum changes relative
to another reference board.
This content comes from Jetson_TK1_customer_pinmux.xlsm (v09) downloaded
from https://developer.nvidia.com/hardware-design-and-development.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add ARM common idle state device bindings for cpuidle support for APQ
8064.
Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add ARM common idle states device bindings for cpuidle support for APQ
8084.
Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add ARM common idle states device bindings for cpuidle support for APQ
8974/8074.
Support Standalone power collapse (SPC) idle state (power down that does
not affect any SoC idle states) for each cpu.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Update the SAW2 DT bindings to add qcom,apq8064-saw2-v1.1-cpu compatible
binding string to configure SPM registers and allow the SPM to put the
core in deeper idle states when the core is idle.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Each Krait CPU in the QCOM 8084 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Each Krait CPU in the QCOM 8074/8974 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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PMA8084 have 2 SPMI devices per physical package. Add their
configuration nodes and include them in boards which are using
AQP8084 based chipset.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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PM8841 and PM8941 have 2 SPMI devices per physical package.
Add their configuration nodes and include them in boards
which are using 8x74 based chipset.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add SPMI PMIC Arbiter configuration nodes for APQ8084 and MSM8974.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add the node for the LPASS clock controller found on a few qcom
SoCs so that the clock driver can probe.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
[sboyd@codeaurora.org: Added apq8064 and msm8960 nodes]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "wireless wl12xx and omap device tree changes for v4.1" from Tony
Lindgren:
Wireless and omap changes to make wl12xx driver to use device tree
data instead of platform data from Eliad Peller <eliad@wizery.com>:
- Add device-tree support to the wlcore (wl12xx/wl18xx) driver.
- Update the current users to use the bindings instead of pdata-quirks.
- Finally, remove the deprecated wl12xx_platform_data struct
Note that da850 board file code that still uses the platform data,
but we have da850.dtsi that can be used instead. So it was decided
that we should try to remove the wl12xx support from the da850
board file as suggested by Sekhar Nori <nsekhar@ti.com>. As it's
the last patch in the series, the last patch can be simply reverted
if needed.
As this series touches quite a bit of arch code, it was suggested
by Kalle Valo <kvalo@codeaurora.org> that the whole series should
be merged via the arm-soc tree.
* tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
wlcore: remove wl12xx_platform_data
ARM: dts: add wl12xx/wl18xx bindings
wlcore: add device-tree support
dt: bindings: add TI's wilink wireless device
wl12xx: use frequency instead of enumerations for pdata clocks
wlcore: set irq_trigger in board files instead of hiding behind a quirk
+ Linux 4.0-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
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Replace all the pdata-quirks for setting wl12xx/wl18xx
platform data with proper DT definitions.
Signed-off-by: Eliad Peller <eliad@wizery.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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http://github.com/broadcom/stblinux into next/dt
Merge "Broadcom Device Tree changes for 4.1 #3" from Brian Norris:
This pull request contains changes to the BCM7445 reference DTS files from
Brian:
- making a clock-frequency property decimal instead of hexadecimal
- adding the irq0 interrupt controller node to make the reference DTS bootable
again
* tag 'arm-soc/for-4.1/devicetree-part-3' of http://github.com/broadcom/stblinux:
ARM: dts: brcmstb: add IRQ0 controller
ARM: dts: brcmstb: un-hexify clock frequency
Signed-off-by: Olof Johansson <olof@lixom.net>
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This L2 controller handles multiplexing a few different interrupts. We
also need it for configuring the interrupt forwarding masks for the
UART.
With this, we can *now* boot BCM7445 to a prompt using the upstream
kernel + DTB.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This value makes much more sense in decimal.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 4.1 #2" from Nicolas Ferre:
Second batch of DT changes for 4.1:
- RTC nodes for at91sam9x5 boards and at91sam9n12ek
- HLCDC nodes and pin definitions for sama5d3 & sama5d4
- additional uarts for sama5d3
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sama5d4: add rgb777 LCD line configuration
ARM: at91/dt: sama5d4: fix LCD pins for RGB666 format
ARM: at91/dt: sama5d4: add hlcdc node
ARM: at91/dt: sama5d4: add lcdc pin definitions
ARM: at91/dt: sama5d3: add uart1 pinctrl definition
ARM: at91/dt: sama5d3: add uart0
ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
ARM: at91/dt: add alternative pin muxing for sama5d3 lcd pins
ARM: at91/dt: split sama5d3 lcd pin definitions to match RGB mode configs
ARM: at91/dt: at91sam9n12ek: enable RTC
ARM: at91/dt: at91sam9x5cm: enable RTC
DT: video: atmel_lcdc: Add example of fixed framebuffer memory
Signed-off-by: Olof Johansson <olof@lixom.net>
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For the SAMA5D4 SoC, some LCD lines are in conflict with useful peripherals.
Remove these lines and the lowest significant bit of a 24 bit LCD. It gives
us a RGB 777 configuration.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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The color arrangement for SAMA5D4 in RGB 666 takes the most significant bits of
each color line groups.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add HLCDC node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add LCDC pin definitions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
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Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Define alternative pin muxing for the LCDC pins.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444,
RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen
RGB mode.
Split pin definitions to be able to set pin config according to the
selected mode.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Enable RTC for all the at91sam9x5 CPU Modules: this will enable it for all the
EK boards.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Merge "ARM: mvebu: dt changes for v4.1 (round 2)" from Gregory Clement:
mvebu dt changes for v4.1 (part #2)
- add support for Performance Monitor Unit on most of mvebu SoCs
- add nas2big support
- add support for USB3 port On Armada 385 AP
* tag 'mvebu-dt-4.1-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-385-ap: Enable USB3 port
ARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs
ARM: Kirkwood: add DT description for nas2big
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Armada 385 AP board has a USB3 port exposed that uses a GPIO to drive the
VBUS line. Enable the needed drivers to support this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The Armada 380 and 385 SoCs have a Cortex-A9 CPU, so the PMU is available
to be used. This commit enables it in the devicetree.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The Armada 375 SoC has a Cortex-A9 CPU, and so the PMU is available
to be used. This commit enables it in the devicetree.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a
Performance Monitoring Unit.
Enable it so that we can have hardware-assisted perf support.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This patch adds the DT description for the LaCie "2Big NAS" (nas2big).
This NAS is an hardware upgrade of the 2Big Network v2.
Chipset and device list:
- CPU Marvell 88F6282 1600Mhz
- SDRAM memory, 256MB DDR3 (2x128MB x8) 533Mhz
- 1 Ethernet Gigabit port (PHY Marvell 88E1518)
- Flash memory, NAND 256MB TSOP48
- I2C EEPROM, 512 bytes (AT24 type)
- PCIe SATA controller JMicron JMB360 (eSATA)
- I2C fan controller GMT G762 (with a separate alarm GPIO)
- 1 USB2 host port
- 1 push button
- 1 power switch
- 2 SATA LEDs (bi-color, blue and red)
- 1 power LED (bi-color, blue and red)
- CPLD for LEDs and start-up management (Altera Max EMP3064)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap device tree changes for v4.1, part1" from Tony Lindgren:
Device tree related changes for omaps:
- Add support for ChiliSOM
- Add support for OpenPandora
- Add support for BeagleBoard NAND
- Enable crypto devices for omap3 devices
- Add bindings for omap3 camera support
- Updates for am437x and dra7x and dm816x SoCs
* tag 'v4.1-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits)
ARM: dts: Update Nanobone dts file
ARM: dts: n950, n9: Add primary camera support
ARM: dts: omap3: Add DT entries for OMAP 3 ISP
Documentation: DT: Add bindings for omap3isp
ARM: dts: Remove files omap34xx-hs.dtsi and omap36xx-hs.dtsi
ARM: dts: omap3-tao3530: Include directly omap34xx.dtsi
ARM: dts: n900: Enable omap sham and include directly omap34xx.dtsi
ARM: dts: n9/n950: Enable omap crypto support
ARM: dts: Remove PIN_INPUT for dm816x McSPI
ARM: dts: Add cppi41 support for dm816x MUSB
ARM: dts: Fix typo for dm816x usb0_pins
ARM: dts: dra7x-evm: beagle-x15: Fix USB Peripheral
ARM: dts: am57xx-beagle-x15: Do not include the atl header
ARM: dts: DRA7: Remove ti,timer-dsp and ti,timer-pwm properties
Documentation: omap-twl4030: Move ti,codec property to optional
ARM: dts: omap3: Remove all references to ti,codec property
ARM: dts: omap3-beagle: Add NAND device
ARM: dts: AM4372: update hdq compatible property
ARM: dts: omap3-pandora: add DM3730 1 GHz version
ARM: dts: omap3-pandora: add OMAP3530 600 MHz version
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Update dts file to reflect:-
* new flash memory layout
* add missing phy-mode property
* dual_emac now just a boolean
* rename mcp to microchip
* update gpio definition
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add support for the primary camera of the Nokia N950 and N9.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The resources the ISP needs are slightly different on 3[45]xx and 3[67]xx.
Especially the phy-type property is different.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[tony@atomide.com: use omap3_scm_general instead of scm_conf for now]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These files are not used by any DTS file anymore.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch just move content of file omap34xx-hs.dtsi into omap3-tao3530.dts.
There is no code change, patch is just preparation for removing -hs file.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch moves content of file omap34xx-hs.dtsi into omap3-n900.dts and enable
omap sham support (omap HW support for SHA + MD5). After testing both omap hwmod
and omap-sham.ko drivers it looks like signed Nokia X-Loader enable L3 firewall
for omap sham. There is no kernel crash with both official bootloader and crypto
enable bootloader. So we can safely enable sham code.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Harmattan system on Nokia N9 and N950 devices uses omap crypto support.
Bootloader on those devices is known that it enables HW crypto support.
This patch just include omap36xx.dtsi directly, so aes and sham is enabled.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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