| Commit message (Collapse) | Author | Age |
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Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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SMPS10 has two outputs OUT1 and OUT2. Hence SMPS10 is modeled as
two regulators. The DT node is split to reflect it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Following commit ff5c9059 and therefore other omap platforms using
the gpio-omap driver correct the #interrupt-cells property on am33xx
too. The omap gpio binding documentaion also states that
the #interrupt-cells property should be 2.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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ARM Performance Monitor Units are available on the am33xx,
add the support in the dtsi.
Tested with perf and oprofile on a regular beaglebone.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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The IGEP COM MOdule has a GPIO LED connected to OMAP
pins. Configure this pin as output GPIO.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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The IGEPv2 has a number of GPIO LED connected to OMAP
pins. Configure these pins as output GPIO.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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IGEP boards have a number of LED connected to OMAP or TWL GPIO
lines. The actual wiring is different on each board so each board
DT has need to configure the mux correctly.
Even though it works with the current DT, the kernel complains with:
[2.305023] leds-gpio leds.18: pins are not configured from the driver
Add an empty pinmux_leds_pins pinctrl child node so boards can
override with the correct mux configuration and not depend on
default values for the GPIO LEDs to work.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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This adds device tree with necessary support to boot with functional
video (on both emulator and real N900 device).
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
From Tony Lindgren:
Changes needed to prepare for making omap3 device tree only:
- Always build in board-generic, and add pdata quirks and auxdata
support for it so we have all the pdata related quirks
in the same place.
- Merge of the drivers/pinctrl changes that are needed for PM
to continue working on omap3 and also needed for other omaps
eventually. The three pinctrl related patches have been acked
by Linus Walleij and are pulled into both the pinctrl tree
and this branch.
- Few defconfig related changes for drivers needed.
* tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits)
ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies
ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig
ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it
ARM: OMAP2+: Add minimal 8250 support for GPMC
ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3
ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap
ARM: OMAP2+: Add support for auxdata
pinctrl: single: Add support for auxdata
pinctrl: single: Add support for wake-up interrupts
pinctrl: single: Prepare for supporting SoC specific features
ARM: OMAP2+: igep0020: use display init from dss-common
ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Now pinctrl-single-omap can handle the wake-up events for us now
as long as the events are configured in the .dts files.
Done in collaboration with Roger Quadros <rogerq@ti.com>.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Prakash Manjunathappa <prakash.pm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.rocketboards.org/linux-socfpga-next into next/dt
From Dinh Nguyen:
Updates to dts file structure for Altera's SOCFPGA
* Does not include any new bindings or bindings change
* Add dts file for a SOCFPGA with an Arria V FPGA
* Add a clocks property for the TWD timer
* Add support for Terasic SocKit Board which has Cyclone5 FPGA
* From Steffen Trumtrar:
"This series includes some minor cleanups (indentation and clock labels) and
reorders the socfpga dts hierarchy from:
socfpga.dtsi
-> socfpga_$board.dts
-> socfpga_$otherboard.dts
to
socfpga.dtsi
-> socfpga_cyclone5.dtsi
--> socfpga_cyclone5_$board.dts
--> socfpga_cyclone5_$otherboard.dts
"
* tag 'socfpga-dts-updates-for-v3.13' of git://git.rocketboards.org/linux-socfpga-next:
dts: socfpga: Add support for Altera's SOCFPGA Arria V board
ARM: socfpga: dts: fix s2f_* clock name
ARM: socfpga: dts: cleanup indentation
ARM: socfpga: dts: Add support for terasic SoCkit
ARM: socfpga: dts: Move common nodes to cyclone5 dtsi
arm: socfpga: Add clock for smp_twd timer
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Add support for a new SOCFPGA board that has an Arria V FPGA along with
dual ARM Cortex-A9 cores.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
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The s2f_* clocks are called h2f_* in the datasheets.
Rename them accordingly in the socfpga.dtsi.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Some of the clock nodes and the rst-/sysmgr use wrong indentation.
Fix it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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This adds basic support for the terasic SoCkit board.
The board includes an Altera Cyclone 5 SoC.
[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development
Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other
SoC+FPGA combinations.
Instead of having to describe all Cyclone5 common nodes in every board specific
dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the
Development Kit.
[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Assign a clock for the twd-timer.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
CC: linux-arm-kernel@lists.infradead.org
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From Simon Horman:
* renesas/dt2: (21 commits)
ARM: shmobile: bockw: fixup ether node naming
ARM: shmobile: r8a7779: add irqpin default status on DTSI
ARM: shmobile: marzen: fixup SMSC IRQ number on DTS
ARM: shmobile: bockw: add SMSC support on DTS
ARM: shmobile: r8a7778: add renesas_intc_irqpin support on DTSI
ARM: shmobile: r8a7791 SMP device tree node
ARM: shmobile: r8a7791 Arch timer device tree node
ARM: shmobile: r8a7791 IRQC device tree node
ARM: shmobile: armadillo800eva-reference: add SDHI and MMCIF interfaces
ARM: shmobile: armadillo-reference: Add PWM backlight node to DT
ARM: shmobile: r8a73a4: add a DT node for the DMAC
ARM: shmobile: r8a7790: add I2C DT nodes
ARM: shmobile: only enable used I2C interfaces in DT on all Renesas boards
ARM: shmobile: r8a7778: add usb phy power control function
ARM: shmobile: r8a7778: add USBHS clock
ARM: shmobile: r8a7791 CMT support
ARM: shmobile: r8a7791 SCIF support
ARM: shmobile: Initial r8a7791 SoC support
ARM: shmobile: r8a7778: add SSI/SRU clock support
ARM: shmobile: r8a7790: Add DU and LVDS clocks
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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According to the ePAPR spec,
the node name should be "ethernet", not "lan0".
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3. But it depends on platform.
This patch adds status = "disabled" on r8a7779.dtsi as default
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch fixup miss-setting of SMSC IRQ number.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch enables INTC IRQ and SMSC on BockW board via DT.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add a device node for the r8a7791 secondary CPU core.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add r8a7791 arch timer device tree information.
This needs to be used together with r8a7791 support
code that ties in the R-Car Gen2 arch timer workarounds.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Enable a r8a7791 IRQC block by adding a device tree
node for the IRQC hardware and pins IRQ0 to IRQ9.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add SDHI0 and MMCIF interfaces to armadillo800eva-reference with
regulators and pin configurations. SDHI1 is not added yet, because the
switch, that connects the interface either to an SD slot or to a WiFi
SDIO card cannot be described in DT yet.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add a DT node for the only system DMAC instance on r8a73a4. The RT DMAC
can be added later under the same multiplexer, because they can serve the
same slaves and use the same MID-RID values. Configuration data is
supplied to the driver, using a compatibility match string.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add DT nodes for the four I2C interfacces on r8a7790.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Currently all I2C interfaces in all *.dtsi files for various Renesas SoCs
are enabled by default. Switch them all off and only enable populated I2C
interfaces in board-specific *.dts files.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Renesas ARM based SoC updates for v3.13
* Add support for r8a7791 SoC
* Rename DU device in clock lookups list of r8a7779 SoC
* USB and SSI/SRU clock support for r8a7778 SoC
* USB phy power control function support for r8a7778 SoC
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From Jason Cooper:
mvebu dt changes for v3.13 (round 2)
- kirkwood
- use MBus DT binding for setting up the windows
- move crypto and nand underneath the mbus node
- ib62x0 has a u-boot env partition
- mvebu
- add the Armada XP matrix board
* tag 'dt-3.13-2' of git://git.infradead.org/linux-mvebu:
arm: mvebu: add support for the Armada XP Matrix board
ARM: kirkwood: ib62x0: add u-boot environment partition
ARM: kirkwood: Move the nand node under the mbus node
ARM: kirkwood: Move the crypto node under the mbus node
ARM: kirkwood: Remove kirkwood_setup_wins and rely on the DT binding
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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The Armada XP Matrix board is the mother board of a more complex
system. The mother board uses an Armada XP MV78460, 4 serial ports, 2
SATA ports, one Ethernet connection, a PCIe port and a USB port. All
those devices are enabled in the Device Tree added by this patch.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Also, add some trivial whitespace cleanup.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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There should be no nodes that are not children of the mbus. Move
the nand node under the mbus, and rework the board .dts files
to use an & reference to the nand node.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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There should be no nodes that are not children of the mbus. Move
the crypto node under the mbus.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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kirkwood_setup_wins is the last manual caller of mbus in kirkwood, don't
call it for DT boards and rely on the DT having a mbus node with
a proper ranges property to setup these windows.
Move all the mbus ranges properties for all boards into kirkwood.dtsi,
since they are currently all the same.
This makes the DT self consistent, since the physical address of the
NAND and CRYPTO are both referenced internally. The arbitary Linux
constants KIRKWOOD_NAND_MEM_PHYS_BASE and KIRKWOOD_SRAM_PHYS_BASE
no longer have to match the DT values.
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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From Jason Cooper:
mvebu dt changes for v3.13
- mvebu
- add MSI
- new compatible string for mv64xxx-i2c
- dove
- use the pre-processor
- define the MBus nodes
- add PCIe controllers
- add Globalscale D3Plug
- relocate internal registers nodes
* tag 'dt-3.13' of git://git.infradead.org/linux-mvebu:
ARM: dove: add initial DT file for Globalscale D3Plug
ARM: dove: add PCIe controllers to SoC DT
ARM: dove: relocate internal registers device nodes
ARM: dove: add MBus DT node
ARM: dove: add MBUS_ID macro to Dove DT
ARM: dove: use preprocessor on device tree files
ARM: mvebu: link PCIe controllers to the MSI controller
ARM: mvebu: the MPIC now provides MSI controller features
ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2c
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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This adds an initial DT file for the Globalscale D3Plug with Dove SoC.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This adds a node for the pcie controllers found on Dove SoCs to the
SoC DT include.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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With mbus node in place, now relocate all internal device nodes
to internal-regs node with proper address ranges.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This adds a MBus node including ranges and pcie apertures required later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This adds a macro used for defining address window's target ID and
attribute cells for the MBus ranges entry.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This coverts Dove DT board files to preprocessor includes instead
of dtc includes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This commit adjusts the Armada 370 and Armada XP PCIe controllers
Device Tree informations to reference their MSI controller. In the
case of this platform, the MSI controller is implemented by the MPIC.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Adds the 'msi-controller' property to the main interrupt controller
Device Tree node, to indicate that it can now behave as a MSI
controller.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The mv64xxx-i2c embedded in the Armada XP have a new feature to
offload i2c transaction. This new version of the IP come also with
some errata. This lead to the introduction to a another compatible
string.
This commit split the i2c information into armada-370.dtsi and
armada-xp.dtsi. Most of the data remains the same and stay in the
common file Armada-370-xp.dtsi. With this new feature the size of the
registers are bigger for Armada XP and the new compatible string is
used.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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