aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAge
* microblaze: Remove saving and restoring before calling signal codeMichal Simek2009-12-14
| | | | | | | | | | Saving is done in SAVE_STATE macros that's why another save discard previous saved value. This change has no effect to normal programs because they ends in any exception and they are killed. On the other side has effect on debugging. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix pfn_valid() for noMMUsteve@digidescorp.com2009-12-14
| | | | | | | | | Configuring DEBUG_SLAB causes a noMMU kernel to die during initialization with an invalid virtual address panic in kfree_debugcheck(). The panic is due to an improper definition of pfn_valid(). Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: ftrace: Add dynamic function graph tracerMichal Simek2009-12-14
| | | | | | | | | | | | This patch add support for dynamic function graph tracer. There is one my expactation that I can do flush_icache after all code modification. On microblaze is this safer than do flush for every entry. For icache is used name flush but correct should be invalidation - this will be fix in upcomming new cache implementaion and WB support. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: ftrace: add function graph supportMichal Simek2009-12-14
| | | | | | For more information look at Documentation/trace folder. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: ftrace: Add dynamic trace supportMichal Simek2009-12-14
| | | | | | | | | | | | | | | | | | | | | | With dynamic function tracer, by default, _mcount is defined as an "empty" function, it returns directly without any more action. When enabling it in user-space, it will jump to a real tracing function(ftrace_caller), and do the real job for us. Differ from the static function tracer, dynamic function tracer provides two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the tracing of some indicated kernel functions(set_ftrace_filter). In the kernel version, there is only one "_mcount" string for every kernel function, so, we just need to match this one in mcount_regex of scripts/recordmcount.pl. For more information please look at code and Documentation/trace folder. Steven ACK that scripts/recordmcount.pl part. Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: ftrace: enable HAVE_FUNCTION_TRACE_MCOUNT_TESTMichal Simek2009-12-14
| | | | | | | Implement MCOUNT_TEST in asm code - it is faster than use generic code Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: ftrace: add static function tracerMichal Simek2009-12-14
| | | | | | | | | | | | | | | | If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to _mcount will be inserted into each kernel function. so, there is a possibility to trace the kernel functions in _mcount. This patch add the specific _mcount support for static function tracing. by default, ftrace_trace_function is initialized as ftrace_stub(an empty function), so, the default _mcount will introduce very little overhead. after enabling ftrace in user-space, it will jump to a real tracing function and do static function tracing for us. Commit message from Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Add TRACE_IRQFLAGS_SUPPORTMichal Simek2009-12-14
| | | | | | | | | | There are just two major changes Renamed local_irq functions to raw_local_irq in irq.c. Added TRACE_IRQFLAGS_SUPPORT to Kconfig.debug. Look at Documentation/irqflags-tracing.txt Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: preliminary enabling for LATENCYTOP support in KconfigMichal Simek2009-12-14
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Lockdep supportMichal Simek2009-12-14
| | | | | | | | | | | | | | | | | | | | | | | Microblaze needs to do lock_init very soon because MMU init calls lock functions. Here is the explanation from Peter Zijlstra why we have to enable __ARCH_WANTS_INTERRUPTS_ON_CTSW. "So we schedule while holding rq->lock (for obvious reasons), but since lockdep tracks held locks per tasks, we need to transfer the held state from the prev to the next task. We do this by explicity calling spin_release(&rq->lock) in context_switch() right before switch_to(), and calling spin_acquire(&rq->lock) in finish_task_switch()->finish_lock_switch(). Now, for some reason lockdep thinks that interrupts got enabled over the context switch (git grep __ARCH_WANTS_INTERRUPTS_ON_CTSW arch/microblaze doesn't seem to turn up anything). Clearly trying to acquire the rq->lock with interrupts enabled is a bad idea and lockdep warns you about this." Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Register timecounter/cyclecounterMichal Simek2009-12-14
| | | | | | | It is the same counter as we use as free running one. I would like to use it for ftrace. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Stack trace supportMichal Simek2009-12-14
| | | | | | | | | | | | | This is working implemetation but the problem is that Microblaze misses frame pointer that's why is there big loop which trace and show all addresses which are in text. It shows addresses which are in registers, etc. This is problem and this is the reason why all Microblaze traces are wrong. There is an option to do hacks and trace the kernel code but this is too complicated. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Add IRQENTRY_TEXT to ldsMichal Simek2009-12-14
| | | | | | It is important for ftrace irqsoff support Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: __init_begin symbol must be alignedMichal Simek2009-12-14
| | | | | | | | | | | | | | | | | The problem was that free_initmem pass to free_initrd_mem got bad aligned __init_begin symbol and free_initrd_mem don't care about __init_end but take PAGE_SIZE instead. Here is behavior in kernel bootlog. ramdisk_execute_command from (init/main.c) was rewrite Freeing unused kernel memory: 6224k freed Failed to execute ��������������{��� Failed to execute ��������������{����. Attempting defaults... Mounting proc: Mounting var: Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: GPIO reset supportMichal Simek2009-12-14
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'ixp4xx' of ↵Linus Torvalds2009-12-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6 * 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6: IXP4xx: GTWX5715 platform only has two PCI IRQ lines, not four. IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files. IXP4xx: move Gemtek GTWX5715 platform macros to the platform code. IXP4xx: Remove unused Motorola PrPMC1100 platform macros. IXP4xx: move FSG platform macros to the platform code. IXP4xx: move DSM G600 platform macros to the platform code. IXP4xx: move NAS100D platform macros to the platform code. IXP4xx: move NSLU2 platform macros to the platform code. IXP4xx: move Coyote platform macros to the platform code. IXP4xx: move AVILA platform macros to the platform code. IXP4xx: move IXDP425 platform macros to the platform code. IXP4xx: Extend PCI MMIO indirect address space to 1 GB. IXP4xx: Fix compilation failure with CONFIG_IXP4XX_INDIRECT_PCI. IXP4xx: Drop "__ixp4xx_" prefix from in/out/ioread/iowrite functions for clarity. IXP4xx: Rename indirect MMIO primitives from __ixp4xx_* to __indirect_*. IXP4xx: Ensure index is positive in irq_to_gpio() and npe_request(). ARM: fix insl() and outsl() endianness on IXP4xx architecture. IXP4xx: Fix normally-disabled debugging text in drivers/net/arm/ixp4xx_eth.c. IXP4xx: change the timer base frequency to 66.666000 MHz.
| * IXP4xx: GTWX5715 platform only has two PCI IRQ lines, not four.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move Gemtek GTWX5715 platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Remove unused Motorola PrPMC1100 platform macros.Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | | | PrPMC1100 is handled by IXDP425 platform code, there is no need for duplicate set of macros. Remove them. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move FSG platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move DSM G600 platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move NAS100D platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move NSLU2 platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move Coyote platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move AVILA platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: move IXDP425 platform macros to the platform code.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Extend PCI MMIO indirect address space to 1 GB.Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | | | | | | | IXP4xx CPUs can indirectly access the whole 4 GB PCI MMIO address space (using the non-prefetch registers). Previously the available space depended on the CPU variant, since one of the IXP43x platforms needed more than the usual 128 MB. 1 GB should be enough for everyone, and if not, we can trivially increase it. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Fix compilation failure with CONFIG_IXP4XX_INDIRECT_PCI.Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | | | | | Instead of including the heavy linux/mm.h for VMALLOC_START, test the addresses against PCI MIN and MAX addresses. Indirect PCI uses 1:1 mapping for MMIO space making this change possible. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Drop "__ixp4xx_" prefix from in/out/ioread/iowrite functions for ↵Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | clarity. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Rename indirect MMIO primitives from __ixp4xx_* to __indirect_*.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Ensure index is positive in irq_to_gpio() and npe_request().Roel Kluin2009-12-05
| | | | | | | | | | | | | | The indexes were signed, so negatives were possible. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * ARM: fix insl() and outsl() endianness on IXP4xx architecture.Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | The repetitive in/out functions must preserve order, not value. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: Fix normally-disabled debugging text in drivers/net/arm/ixp4xx_eth.c.Krzysztof Hałasa2009-12-05
| | | | | | | | Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
| * IXP4xx: change the timer base frequency to 66.666000 MHz.Krzysztof Hałasa2009-12-05
| | | | | | | | | | | | | | | | | | Clock generators used by IXP4xx processors are usually 33.333 MHz, sometimes 33.33 MHz and few platforms use 33 MHz. The timers tick twice as fast, that means 66.666, 66.66 or 66 MHz. Current 66.666666 MHz means 10 ppm offset from the usual 66.666 MHz. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
* | [BKL] add 'might_sleep()' to the outermost lock takerLinus Torvalds2009-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As shown by the previous patch (6698e3472: "tty: Fix BKL taken under a spinlock bug introduced in the BKL split") the BKL removal is prone to some subtle issues, where removing the BKL in one place may in fact make a previously nested BKL call the new outer call, and then prone to nasty deadlocks with other spinlocks. In general, we should never take the BKL while we're holding a spinlock, so let's just add a "might_sleep()" to it (even though the BKL doesn't technically sleep - at least not yet), and we'll get nice warnings the next time this kind of problem happens during BKL removal. Acked-and-Tested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | tty: Fix BKL taken under a spinlock bug introduced in the BKL splitAlan Cox2009-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The fasync path takes the BKL (it probably doesn't need to in fact) while holding the file_list spinlock. You can't do that with the kernel lock: it causes lock inversions and deadlocks. Leave the BKL over that bit for the moment. Identified by AKPM. Signed-off-by: Alan Cox <alan@linux.intel.com> Acked-and-Tested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'next' of ↵Linus Torvalds2009-12-12
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (151 commits) powerpc: Fix usage of 64-bit instruction in 32-bit altivec code MAINTAINERS: Add PowerPC patterns powerpc/pseries: Track previous CPPR values to correctly EOI interrupts powerpc/pseries: Correct pseries/dlpar.c build break without CONFIG_SMP powerpc: Make "intspec" pointers in irq_host->xlate() const powerpc/8xx: DTLB Miss cleanup powerpc/8xx: Remove DIRTY pte handling in DTLB Error. powerpc/8xx: Start using dcbX instructions in various copy routines powerpc/8xx: Restore _PAGE_WRITETHRU powerpc/8xx: Add missing Guarded setting in DTLB Error. powerpc/8xx: Fixup DAR from buggy dcbX instructions. powerpc/8xx: Tag DAR with 0x00f0 to catch buggy instructions. powerpc/8xx: Update TLB asm so it behaves as linux mm expects. powerpc/8xx: Invalidate non present TLBs powerpc/pseries: Serialize cpu hotplug operations during deactivate Vs deallocate pseries/pseries: Add code to online/offline CPUs of a DLPAR node powerpc: stop_this_cpu: remove the cpu from the online map. powerpc/pseries: Add kernel based CPU DLPAR handling sysfs/cpu: Add probe/release files powerpc/pseries: Kernel DLPAR Infrastructure ...
| * | powerpc: Fix usage of 64-bit instruction in 32-bit altivec codeBenjamin Herrenschmidt2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e821ea70f3b4873b50056a1e0f74befed1014c09 introduced a bug by copying some 64-bit originated code as-is to be used by both 32 and 64-bit but this code contains a 64-bit ony "cmpdi" instruction. This changes it to cmpwi, which is fine since VRSAVE can only contains a 32-bit value anyway. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: <stable@kernel.org>
| * | Merge commit 'origin/master' into nextBenjamin Herrenschmidt2009-12-09
| |\ \ | | | | | | | | | | | | | | | | Conflicts: include/linux/kvm.h
| * | | MAINTAINERS: Add PowerPC patternsJoe Perches2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Fri, 2009-12-04 at 20:59 +1100, Benjamin Herrenschmidt wrote: > On Fri, 2009-12-04 at 10:34 +0100, Jean Delvare wrote: > > I've sent it to linuxppc-dev@ozlabs.org on October 14th. This is the > > address which is listed 22 times in MAINTAINERS. If it isn't correct, > > then please update MAINTAINERS. > No it's fine both shoul work. Your patches are there, just waiting for > me to pick them up, I was just firing a reminder to the rest of the CC > list :-) (and I do remember fwd'ing a couple of your patches to the > list, for some reason they didn't make it to patchwork back then, that > was a few month ago). > Anyways, I've been stretched thin with all sort of stuff lately, so bear > with me if I'm a bit slow at taking or testing stuff, I'm doing my best. Adding patterns to the PowerPC sections of MAINTAINERS is useful. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/pseries: Track previous CPPR values to correctly EOI interruptsMark Nelson2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment when we EOI an interrupt we set the CPPR back to 0xFF regardless of its previous value. This could lead to problems if we take an interrupt with a priority of 5, but before EOIing it we get an IPI which has a priority of 4. The problem is that at the moment when we EOI the IPI we will set the CPPR to 0xFF, but it should really be set back to 5 (the previous priority). To keep track of the previous CPPR values we create the xics_cppr structure that has an array for CPPR values and an index pointing to the current priority. This can easily grow if new priorities get added in the future. This will also be useful because the partition adjunct option of upcoming machines will update the H_XIRR hcall to accept the CPPR as a parameter. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/pseries: Correct pseries/dlpar.c build break without CONFIG_SMPNathan Fontenot2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent patch to add cpu offline/online as part of the DLPAR process for pseries causes a build break if CONFIG_SMP is not defined. Original patch here; http://lists.ozlabs.org/pipermail/linuxppc-dev/2009-November/078299.html This corrects the build break by moving the online_node_cpus and offline_node_cpus under the #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE portions of dlpar.c. This patch also slightly modifies the online_node_cpus and offline_node_cpus routines to prepend dlpar_ to the them and make them static. These two routine are only used in the dlpar add/remove of cpus and these changes should help clarify that. Signed-off-by: Nathan Fontenot <nfont@austin.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc: Make "intspec" pointers in irq_host->xlate() constRoman Fietze2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing a driver using SCLPC on the MPC5200B I detected, that the intspec arrays to map irqs to Linux virq cannot be const, because the mapping and xlate functions only take non const pointers. All those functions do not modify the intspec, so a const pointer could be used. Signed-off-by: Roman Fietze <roman.fietze@telemotive.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: DTLB Miss cleanupJoakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use symbolic constant for PRESENT and avoid branching. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: Remove DIRTY pte handling in DTLB Error.Joakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to do set the DIRTY bit directly in DTLB Error. Trap to do_page_fault() and let the generic MM code do the work. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: Start using dcbX instructions in various copy routinesJoakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that 8xx can fixup dcbX instructions, start using them where possible like every other PowerPc arch do. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: Restore _PAGE_WRITETHRUJoakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 8xx has not had WRITETHRU due to lack of bits in the pte. After the recent rewrite of the 8xx TLB code, there are two bits left. Use one of them to WRITETHRU. Perhaps use the last SW bit to PAGE_SPECIAL or PAGE_FILE? Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: Add missing Guarded setting in DTLB Error.Joakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | only DTLB Miss did set this bit, DTLB Error needs too otherwise the setting is lost when the page becomes dirty. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/8xx: Fixup DAR from buggy dcbX instructions.Joakim Tjernlund2009-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an assembler version to fixup DAR not being set by dcbX, icbi instructions. There are two versions, one uses selfmodifing code, the other uses a jump table but is much bigger(default). Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 05:11:10 -0500