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* [ARM] mm: move validation of membanks to one placeRussell King2008-09-30
| | | | | | | | The newly introduced sanity_check_meminfo() function should be used to collect all validation of the meminfo array, which we have in bootmem_init(). Move it there. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5272/1: remove conditional compilation in show_pte()Nicolas Pitre2008-09-30
| | | | | | | | The PTRS_PER_PMD != 1 condition can be evaluated with C code and optimized at compile time. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5271/1: get rid of pages_to_mb()Nicolas Pitre2008-09-30
| | | | | | | There is no use of this in the whole tree. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5269/1: ARMv7: Use -march=armv7-a as compiler flagCatalin Marinas2008-09-30
| | | | | | | | | The current -march=armv7a is not supported by mainline gcc. Cc: Paul Brook <paul@codesourcery.com> Cc: Wei Zhong <weizhong@broadcom.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: fix some comments in dma-mapping.hRussell King2008-09-30
| | | | | | ... to prevent people being mislead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: don't touch cache on dma_*_for_cpu()Russell King2008-09-30
| | | | | | | | | | As per the dma_unmap_* calls, we don't touch the cache when a DMA buffer transitions from device to CPU ownership. Presently, no problems have been identified with speculative cache prefetching which in itself is a new feature in later architectures. We may have to revisit the DMA API later for these architectures anyway. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: add validation of DMA paramsRussell King2008-09-29
| | | | | | | | Validate the direction argument like x86 does. In addition, validate the dma_unmap_* parameters against those passed to dma_map_* when using the DMA bounce code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: coding style cleanupsRussell King2008-09-29
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: fix dmabounce dma_sync_xxx() implementationsRussell King2008-09-29
| | | | | | | | | | | | | | | | | The dmabounce dma_sync_xxx() implementation have been broken for quite some time; they all copy data between the DMA buffer and the CPU visible buffer no irrespective of the change of ownership. (IOW, a DMA_FROM_DEVICE mapping copies data from the DMA buffer to the CPU buffer during a call to dma_sync_single_for_device().) Fix it by getting rid of sync_single(), moving the contents into the recently created dmabounce_sync_for_xxx() functions and adjusting appropriately. This also makes it possible to properly support the DMA range sync functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: use new dmabounce_sync_for_xxx() for dma_sync_single_xxx()Russell King2008-09-29
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: Reduce to one dma_sync_sg_* implementationRussell King2008-09-29
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: Reduce to one dma_map_sg()/dma_unmap_sg() implementationRussell King2008-09-25
| | | | | | | No point having two of these; dma_map_page() can do all the work for us. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: provide a better dma_map_page() implementationRussell King2008-09-25
| | | | | | | | We can translate a struct page directly to a DMA address using page_to_dma(). No need to use page_address() followed by virt_to_dma(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Update dma_map_sg()/dma_unmap_sg() APIRussell King2008-09-25
| | | | | | Update the ARM DMA scatter gather APIs for the scatterlist changes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] dma: rename consistent.c to dma-mapping.cRussell King2008-09-25
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Print details relevant to how we handle the cacheRussell King2008-09-25
| | | | | | | | This replaces the original cache type decoding printks. We now indicate how we're treating the cache which we found, rather than what we found. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Introduce new bitmask based cache type macrosRussell King2008-09-25
| | | | | | | | | | | | | | | Rather than trying to (inaccurately) decode the cache type from the registers each time we need to decide what type of cache we have, use a bitmask initialized early during boot. Since the setup is a one-off initialization, we can be a little more clever and take account of the CPU architecture as well. Note that we continue to achieve the compactness on optimised kernels by forcing tests to always-false or always-true as appropriate, thereby allowing the compiler to do build-time code elimination. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove cache type printksRussell King2008-09-25
| | | | | | | | | | | | | | | | | | | | | | The cache type register found in ARMv5 and later CPUs changes format and meaning depending on the CPU architecture version. Currently, this code: a) doesn't work for everything - Xscale's are identified as 'unknown 5'. b) is not able to tell whether the caches are VIVT or VIPT from the cache type. c) prints rubbish on some ARMv6 and ARMv7+ CPUs. The two solutions to this are: 1. Add yet more code to decode and print the various different register formats. 2. Remove the code altogther. The code only exists to decode and print the cache parameters. Increasing the complexity of it just for the sake of a few prinks isn't worth it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix IOP13xx build warningsRussell King2008-09-17
| | | | | | | | | | | http://armlinux.simtec.co.uk/kautobuild/2.6.27-rc5/iop13xx_defconfig/zimage.log Occurrences Warning text 339 arch/arm/include/asm/dma-mapping.h:40: warning: return makes pointer from integer without a cast 203 arch/arm/include/asm/dma-mapping.h:45: warning: return makes integer from pointer without a cast Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Add -march=all to assembly file build in arch/arm/boot/compressedRussell King2008-09-09
| | | | | | | | | This allows assembly files to be crafted to cover all ARM CPU types rather than erroring out on instructions only in later CPUs. We are careful in these files to only execute CPU specific code when the CPU ID says we can. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Convert asm/bitops.h to linux/bitops.hRussell King2008-09-06
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Convert asm/delay.h to linux/delay.hRussell King2008-09-06
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Convert asm/io.h to linux/io.hRussell King2008-09-06
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Convert asm/uaccess.h to linux/uaccess.hRussell King2008-09-06
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] clean up a load of old declarationsRussell King2008-09-06
| | | | | | ... some of which are now in linux/*.h headers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] move initrd code from kernel/setup.c to mm/init.cRussell King2008-09-06
| | | | | | | This quietens some sparse warnings about phys_initrd_start and phys_initrd_size. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] sparse: quieten arch/arm/kernel/irq.cRussell King2008-09-06
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] remove pc_pointer()Russell King2008-09-06
| | | | | | | pc_pointer() was a function to mask the PC for 26-bit ARMs, which we no longer support. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] sparse: fix several warningsRussell King2008-09-05
| | | | | | | | | | | | | | | | | | | | | | | | arch/arm/kernel/process.c:270:6: warning: symbol 'show_fpregs' was not declared. Should it be static? This function isn't used, so can be removed. arch/arm/kernel/setup.c:532:9: warning: symbol 'len' shadows an earlier one arch/arm/kernel/setup.c:524:6: originally declared here A function containing two 'len's. arch/arm/mm/fault-armv.c:188:13: warning: symbol 'check_writebuffer_bugs' was not declared. Should it be static? arch/arm/mm/mmap.c:122:5: warning: symbol 'valid_phys_addr_range' was not declared. Should it be static? arch/arm/mm/mmap.c:137:5: warning: symbol 'valid_mmap_phys_addr_range' was not declared. Should it be static? Missing includes. arch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer arch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces) Sillies. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5231/1: Do not save the frame pointer in the csum_partial_copy_* functionsCatalin Marinas2008-09-01
| | | | | | | | | Since the other assembly functions do not seem to save the frame pointer onto the stack, this patch changes the csum_partial_copy_* functions to behave in the same way. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5230/1: Replace post-indexed LDRT/STRT in uaccess.hCatalin Marinas2008-09-01
| | | | | | | | | The post-index immediate value is optional if it is 0 and this patch removes it. The reason is to allow such instructions to compile to Thumb-2 where only pre-indexed LDRT/STRT instructions are allowed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5232/1: Do not post-index STRT instruction in clear_user.SCatalin Marinas2008-09-01
| | | | | | | | | The last strnebt instruction has a post-index of 1 but the address register is set to 0 in the next instruction, so no need for post-indexing. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5227/1: Add the ENDPROC declarations to the .S filesCatalin Marinas2008-09-01
| | | | | | | | | This declaration specifies the "function" type and size for various assembly functions, mainly needed for generating the correct branch instructions in Thumb-2. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5222/1: Allow configuring user:kernel split via KconfigLennert Buytenhek2008-09-01
| | | | | | | | | This patch adds a config option (CONFIG_VMSPLIT_*) to allow choosing between 3:1, 2:2 and 1:3 user:kernel memory splits. Tested-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5221/1: fix ldm/stm emulation for kprobesNicolas Pitre2008-09-01
| | | | | | | Logic for the p bit was reversed. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5211/2: fix a couple warnings from BUG() usageNicolas Pitre2008-09-01
| | | | | | | | | | | | | | | | | | When CONFIG_DEBUG_BUGVERBOSE is not set, we get warnings such as: arch/arm/mm/ioremap.c: In function ‘remap_area_pte’: arch/arm/mm/ioremap.c:67: warning: control reaches end of non-void function mm/bootmem.c: In function ‘mark_bootmem’: mm/bootmem.c:321: warning: control reaches end of non-void function fs/dcache.c: In function ‘d_materialise_unique’: fs/dcache.c:1875: warning: control reaches end of non-void function fs/nfs/client.c: In function ‘nfs_sockaddr_match_ipaddr’: fs/nfs/client.c:251: warning: control reaches end of non-void function block/cfq-iosched.c: In function ‘cfq_async_queue_prio’: block/cfq-iosched.c:1501: warning: control reaches end of non-void function Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5218/1: arm: improved futex supportMikael Pettersson2008-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux/ARM currently doesn't support robust or PI futexes. The problem is that the kernel wants to perform certain ops (cmpxchg, set, add, or, andn, xor) atomically on user-space addresses, and ARM's futex.h doesn't support that. This patch adds that support, but only for uniprocessor machines. For UP it's enough to disable preemption to ensure mutual exclusion with other software agents (futexes don't need to care about other hardware agents, fortunately). This patch is based on one posted by Khem Raj on 2007-08-01 <http://marc.info/?l=linux-arm-kernel&m=118599407413016&w=2>. (That patch is included in the -RT kernel patches.) My changes since that version include: * corrected implementation of FUTEX_OP_ANDN (must complement oparg) * added missing memory clobber to futex_atomic_cmpxchg_inatomic() * removed spinlock because it's unnecessary for UP and insufficient for SMP, instead the code is restricted to UP and relies on the fact that pagefault_disable() also disables preemption * coding style cleanups Tested on ARMv5 XScales with the glibc-2.6 nptl test suite. Tested-by: Bruce Ashfield <bruce.ashfield@windriver.com> Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5206/1: remove kprobe_trap_handler() hackNicolas Pitre2008-09-01
| | | | | | | | | As mentioned in commit 796969104cab0d454dbc792ad0d12a4f365a8564, and because of commit b03a5b7559563dafdbe52f8b5d8e453a914db941, the direct calling of kprobe_trap_handler() can be removed. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Update arch/arm/Kconfig for drivers/Kconfig changes, add cpuidleRussell King2008-09-01
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5195/1: ARMv7 Oprofile supportJean PIHET2008-09-01
| | | | | | | | Add Oprofile kernel support for ARMv7. Tested on OMAP3430 and OMAP3530 chipsets (Cortex-A8). Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] cachetype: move definitions to separate headerRussell King2008-09-01
| | | | | | | | Rather than pollute asm/cacheflush.h with the cache type definitions, move them to asm/cachetype.h, and include this new header where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] cputype: separate definitions, use themRussell King2008-09-01
| | | | | | | | Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6Linus Torvalds2008-08-25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: bnx2x: Version update bnx2x: Multi Queue bnx2x: NAPI and interrupts enable/disable bnx2x: NIC load failure cleanup bnx2x: Initialization structure bnx2x: HW lock timeout bnx2x: Minimize lock time bnx2x: Fan failure mechanism on additional design bnx2x: Rx work check ipv6: sysctl fixes ipv4: sysctl fixes sctp: add verification checks to SCTP_AUTH_KEY option
| * bnx2x: Version updateEilon Greenstein2008-08-25
| | | | | | | | | | | | | | Version update Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: Multi QueueYitchak Gertner2008-08-25
| | | | | | | | | | | | | | | | | | | | The multi queue support is still disabled by default for the bnx2x (needs some more testing and validation), but there are 2 obvious bug in it which are fixed in this patch Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: NAPI and interrupts enable/disableYitchak Gertner2008-08-25
| | | | | | | | | | | | | | | | Fixing the order of enabling and disabling NAPI and the interrupts Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: NIC load failure cleanupYitchak Gertner2008-08-25
| | | | | | | | | | | | | | | | Load failures were not handled correctly Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: Initialization structureYitchak Gertner2008-08-25
| | | | | | | | | | | | | | | | | | The TPA initialization is part of the FW internal memory initialization and so it is moved to the appropriate function Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: HW lock timeoutEilon Greenstein2008-08-25
| | | | | | | | | | | | | | | | Increasing the lock timeout to 5 seconds instead of 1 second to minimize the chance of failures due to timeout Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * bnx2x: Minimize lock timeEilon Greenstein2008-08-25
| | | | | | | | | | | | | | | | | | After iSCSI boot, the HW lock should only protect the flag so only the first function will reset the chip and not then entire chip reset process Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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