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* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-09-28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits) [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms [ARM] 3855/1: Add generic time support [ARM] 3873/1: S3C24XX: Add irq_chip names [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23 [ARM] nommu: confirms the CR_V bit in nommu mode [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. [ARM] 3870/1: AT91: Start removing static memory mappings [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards [ARM] 3868/1: AT91 hardware header update [ARM] 3867/1: AT91 GPIO update [ARM] 3866/1: AT91 clock update [ARM] 3865/1: AT91RM9200 header updates [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series [ARM] kthread: switch arch/arm/kernel/apm.c [ARM] Off-by-one in arch/arm/common/icst* [ARM] 3864/1: Refactore sharpsl_pm [ARM] 3863/1: Add Locomo SPI Device [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h ...
| * Merge nommu branchRussell King2006-09-28
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| | * [ARM] nommu: confirms the CR_V bit in nommu modeHyok S. Choi2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In nommu mode, the exception vector location depends on the platforms. Some of the implementations may have some special exception control forwarding method in their ROM/flash and for some of them has its own re-mapping mechanism by the h/w. This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default. This feature depends on CP15 and does not supported by ARM740. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.Hyok S. Choi2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a dummy abort handler which returns zero for the base restored Data Abort model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up for the base updated Data Abort model cores. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.hRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | Three of the generic cache method options were using explicit CPU types, whereas they could use the CPU_CACHE_* definitions instead. Switch them over to use the CPU_CACHE_* definitions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Make !MMU CPUs depend on !MMURussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | Don't offer non-MMU based CPUs for selection when CONFIG_MMU is set. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: add ARM946E-S core supportHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARM946E-S core support which has typically 8KB I&D cache. It has a MPU and supports ARMv5TE instruction set. Because the ARM946E-S core can be synthesizable with various cache size, CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: add ARM940T core supportHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache and a MPU. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: add ARM9TDMI core supportHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: add ARM740T core supportHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: add ARM7TDMI core supportHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARM7TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: manage the CP15 thingsHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPUHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By merging of uClinux/ARM, we need to treat various CPU cores which have MMU, MPU or even none for memory management. The memory management coprocessors are controlled by CP15 register set and the ARM core family can be categorized by 5 groups by the register ; G-a. CP15 is MMU : 610, 710, 720, 920, 922, 925, 926, 1020, 1020e, 1022, v6 and the derivations sa1100, sa110, xscale, xsc3. G-b. CP15 is MPU : 740, 940, 946, 996, 1156. G-c. CP15 is MPU or MMU : 1026 (selectable by schematic design) G-d. CP15 is exist, but nothing for memory managemnt : 966, 968. G-e. no-CP15 : 7tdmi, 9tdmi, 9e, 9ej This patch defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPU. Thus the family can be defined as : - CPU_CP15 only : G-d - CPU_CP15_MMU(implies CPU_CP15) : G-a, G-c(selectable) - CPU_CP15_MPU(implies CPU_CP15) : G-b, G-c(selectable) - !CPU_CP15 : G-e Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] nommu: allows to support module in nommuHyok S. Choi2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | A simple patch to support module in nommu mode. The vmalloc is used instead of __vmalloc_area which depends on CONFIG_MMU. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] do_bad_area() always takes current and current->active_mmRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since do_bad_area() always takes the currently active task and (supposed to) take the currently active MM, there's no point passing them to this function. Instead, obtain references to them inside do_bad_area(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Add setup_mm_for_reboot() for nommuRussell King2006-09-27
| | | | | | | | | | | | | | | | | | Add an empty setup_mm_for_reboot() function for nommu machines. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Rename mm-armv.c to pgd.cRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | mm-armv.c now only contains the pgd allocation/freeing code, so rename it to have a more sensible filename. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Move rest of MMU setup code from mm-armv.c to mmu.cRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we're going to have mmu.c for code which is specific to the MMU machines, we might as well move the other MMU initialisation specific code from mm-armv.c into this new file. This also allows us to make some functions static. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Split ARM MM initialisation for !mmuRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | Move the MMU specific code from init.c into mmu.c, and add nommu fixups to nommu.c Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] Separate page table manipulation code from bootmem initialisationRussell King2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | nommu does not require the page table manipulation code in the bootmem initialisation paths. Move this into separate inline functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3856/1: Add clocksource for Intel IXP4xx platformsKevin Hilman2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enables the ixp4xx platforms to use Generic time-of-day. Signed-off-by: Kevin Hilman <khilman@mvista.com> Acked-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3855/1: Add generic time supportKevin Hilman2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds Generic time-of-day support for the ARM architecture. The support is currently added using #ifdef's so that it can support sub-arches that do not (yet) have a clocksource added. As sub-arches add clocksource support, they should 'select GENERIC_TIME' Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Daniel Walker <dwalker@mvista.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Acked-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3873/1: S3C24XX: Add irq_chip namesBen Dooks2006-09-28
| | | | | | | | | | | | | | | | | | | | | Add names to all the irq_chip structes Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chipsBen Dooks2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | Apply consistant tabbing to the IRQ chip structures in arch/arm/mach-s3c2410/irq.c Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23Ben Dooks2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The demux code for the IRQ EINTs above 3 was using find last set instead of finding first set. Also fix it so that we only check EINT4..7 when the parent EINT4t7 goes off, and the 8..23 when EINT8t23 goes off. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3870/1: AT91: Start removing static memory mappingsAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the static memory mapping for the currently-unused peripherals [Synchronous Serial, Timer/Counter unit], and for those drivers that already ioremap() their registers [UART]. Also, the Ethernet driver now uses the platform_device resources but doesn't yet use ioremap() so we need to pass it the virtual address instead of the physical address. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3869/1: AT91: NAND support for DK and KB9202 boardsAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the NAND flash on the Atmel AT91RM9200-DK and KwikByte KB920x boards. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3868/1: AT91 hardware header updateAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the hardware register definitions for the TWI (I2C) controller found on the AT91RM9200 and AT91SAM9xx processors. It also defines the AIC Fast-Forcing registers added to the AT91SAM9's. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3867/1: AT91 GPIO updateAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the AT91 gpio.c support processor-generic (AT91RM9200 and AT91SAM9xxx). The GPIO controllers supported by a particular AT91 processor are defined in the processor-specific file and are registered with gpio.c at startup. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3866/1: AT91 clock updateAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the AT91 clock.c support processor-generic (AT91RM9200 and AT91SAM9xxx). The clocks supported by a particular AT91 processor are defined in the processor-specific file and are registered with clock.c at startup. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3865/1: AT91RM9200 header updatesAndrew Victor2006-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is more preparation for adding support for the new Atmel AT91SAM9 processors. Changes include: - Replace AT91_BASE_* with AT91RM9200_BASE_* - Replace AT91_ID_* with AT91RM9200_ID_* - ROM, SRAM and UHP address definitions moved to at91rm9200.h. - The raw AT91_P[ABCD]_* definitions are now depreciated in favour of the GPIO API. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 seriesDavid Anders2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch registers the wakeup irq, sets a gpio pin to indicate the status of system for suspend/resume operations, and adds the machine to the supported machines for use with the simtec-pm Signed-off-by: David Anders <danders@amltd.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] kthread: switch arch/arm/kernel/apm.cSerge E. Hallyn2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | Switch arch/arm/kernel/apm.c from using kernel_thread - whose export is deprecated - to kthread. Signed-off-by: Serge E. Hallyn <serue@us.ibm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] Off-by-one in arch/arm/common/icst*Eric Sesterhenn2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hi, a quick find -iname \*.[ch] | xargs grep "> ARRAY_SIZE(", revealed these in the icst drivers. If i == ARRAY_SIZE, we get past the idx2s array. Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3864/1: Refactore sharpsl_pmDirk Opfer2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds another hook into sharpsl_pm to notify the machine specific driver immediately after resume. This is needed to support the Sharp SL-6000 (Tosa). Signed-off-by: Dirk Opfer <Dirk@Opfer-Online.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3863/1: Add Locomo SPI DeviceDirk Opfer2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | The Locomo chip has a SPI interface which is used for SD/MMC cards (only collie). This patch adds the definition for the SPI device inside the Locomo chip. Signed-off-by: Dirk Opfer <Dirk@Opfer-Online.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOsRichard Purdie2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert LOMOMO to use struct device * for GPIOs instead of struct locomo_dev. This enables access to the GPIOs from code which is not a locomo device itself (such as audio). Access for gpio 31 is removed for error handling (no such hardware exists). Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-upstream ↵Russell King2006-09-27
| |\ \ | | |/ | |/| | | | into devel
| | * ARM: OMAP: Remove common pm.cTony Lindgren2006-09-25
| | | | | | | | | | | | | | | | | | There is now separate pm.c for OMAP1 and OMAP2. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Sync clocks with linux-omap treeTony Lindgren2006-09-25
| | | | | | | | | | | | | | | | | | | | | Mostly clean up CONFIG_OMAP_RESET_CLOCKS. Also includes a patch from Imre Deak to make McSPI clocks use id. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * [PATCH] ARM: OMAP: Check gpio_fck not gpio_ickKomal Shah2006-09-25
| | | | | | | | | | | | | | | | | | | | | Check gpio_fck not gpio_ick. Signed-off-by: Komal Shah <komal_shah802003@yahoo.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Sync DMA with linux-omap treeTony Lindgren2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | This patch syncs OMAP DMA code with linux-omap tree. Mostly allow changing DMA callback function and set OMAP2 specific transfer mode. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2: Make sure peripherals can be accessed after clk_enableJuha Yrjola2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | Some peripherals seem to need additional delay until they can actually be accessed after enabling their FCLK and ICLK. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2: Keep both APLLs active during bootupJuha Yrjola2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling and disabling the 54 MHz and 96 MHz APLLs can happen unnecessarily often during bootup. Make sure they're kept enabled during init. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Add sanity check to clk_disableJuha Yrjola2006-09-25
| | | | | | | | | | | | | | | | | | | | | BUG() if the clock use count is already zero. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: GPIO: IRQSTATUS2 workaround for retention stateHiroshi DOYU2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In OMAP2420, an incoming GPIO interrupt always sets both GPIO_IRQSTATUS1 and GPIO_IRQSTATUS2, even if the relevant bit is disabled in GPIO_IRQENABLE1/2 and DSP doesn't use GPIO at all. GPIO_IRQSTATUS1 is for MPU and GPIO_IRQSTATUS2 is for DSP. If IRQSTATUS is set, this will prevent the system from going to idle state. This patch also clears IRQSTATUS2 to avoid the above situation. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Fix typo for 24xx GPIO resumeTony Lindgren2006-09-25
| | | | | | | | | | | | | | | | | | Fix typo for 24xx GPIO resume Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: OMAP2 dmtimer power management supportJuha Yrjola2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | GPT1 will be set into non-posted mode, and the wakeup register is set for all timers. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Add support for forcing osc_ck onJuha Yrjola2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards might use the oscillator clock for powering external peripherals. Add support for making sure osc_ck stays active even when trying to go to sleep. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Add enable/disable functions for dmtimerTimo Teras2006-09-25
| | | | | | | | | | | | | | | | | | | | | | | | Add enable/disable functions which effectively control the GPT iclk and fclk. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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