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* Merge tag 'at91-fixes-non-critical' of git://github.com/at91linux/linux-at91 ↵Olof Johansson2013-11-15
|\ | | | | | | | | | | | | | | | | | | | | | | | | into fixes From Nicolas Ferre, fixes for early boot hangs on at91: Fixes for RTT & RTC interrupts that can fire early during boot process and kill the system. * tag 'at91-fixes-non-critical' of git://github.com/at91linux/linux-at91: ARM: at91: fix hanged boot due to early rtt-interrupt ARM: at91: fix hanged boot due to early rtc-interrupt
| * ARM: at91: fix hanged boot due to early rtt-interruptJohan Hovold2013-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the RTT-interrupts are masked at boot by adding a new helper function to be used at SOC-init. This fixes hanged boot on all AT91 SOCs with an RTT, for example, if an RTT-alarm goes off after a non-clean shutdown (e.g. when using RTC wakeup). The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or software reset. This means that their interrupts may be enabled during early boot if, for example, they where not disabled during a previous shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a user reset). Furthermore, an RTC or RTT-alarm may also be active. The RTC and RTT-interrupts use the shared system-interrupt line, which is also used by the PIT, and if an interrupt occurs before a handler (e.g. RTC-driver) has been installed this leads to the system interrupt being disabled and prevents the system from booting. Note that when boot hangs due to an early RTC or RTT-interrupt, the only way to get the system to start again is to remove the backup power (e.g. battery) or to disable the interrupt manually from the bootloader. In particular, a user reset is not sufficient. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable@vger.kernel.org # 3.11.x
| * ARM: at91: fix hanged boot due to early rtc-interruptJohan Hovold2013-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the RTC-interrupts are masked at boot by adding a new helper function to be used at SOC-init. This fixes hanged boot on all AT91 SOCs with an RTC (but RM9200), for example, after a reset during an RTC-update or if an RTC-alarm goes off after shutdown (e.g. when using RTC wakeup). The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or software reset. This means that their interrupts may be enabled during early boot if, for example, they where not disabled during a previous shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a user reset). Furthermore, an RTC or RTT-alarm may also be active. The RTC and RTT-interrupts use the shared system-interrupt line, which is also used by the PIT, and if an interrupt occurs before a handler (e.g. RTC-driver) has been installed this leads to the system interrupt being disabled and prevents the system from booting. Note that when boot hangs due to an early RTC or RTT-interrupt, the only way to get the system to start again is to remove the backup power (e.g. battery) or to disable the interrupt manually from the bootloader. In particular, a user reset is not sufficient. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable@vger.kernel.org # 3.11.x
* | video: exynos_mipi_dsim: Remove unused variableOlof Johansson2013-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 7e0be9f9f7cba3356f75b86737dbe3a005da067e ('video: exynos_mipi_dsim: Use the generic PHY driver') resulted in a warning about an unused variable: drivers/video/exynos/exynos_mipi_dsi.c:144:26: warning: unused variable 'pdev' [-Wunused-variable] It is indeed unused; remove it. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com>
* | ARM: highbank: only select errata 764369 if SMPOlof Johansson2013-11-14
| | | | | | | | | | | | | | 764369 depends on SMP, so don't select it on !SMP configs. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: sti: only select errata 764369 if SMPOlof Johansson2013-11-14
| | | | | | | | | | | | | | | | 764369 depends on SMP, so don't select it on !SMP configs. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Cc: Stuart Menefy <stuart.menefy@st.com>
* | ARM: tegra: init fuse before setting reset handlerAlexandre Courbot2013-11-14
| | | | | | | | | | | | | | | | | | | | | | CPU reset handler was set before fuse is initialized, but tegra_cpu_reset_handler_enable() uses tegra_chip_id, which is set by tegra_init_fuse(). This patch reorders the calls so the CPU reset handler code does not read an uninitialized variable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: vt8500: add defconfig for v6/v7 chipsOlof Johansson2013-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a single-vendor config for vt8500. We can't enable WM8750 in multi_v7_defconfig since it's a v6-based device, but it's still valuable to have an in-tree defconfig that is suitable for the hardware. This is based on multi_v7_defconfig and can be tweaked over time. It gets us off the ground for now. Naming it vt8500_v6_v7 similar to i.MX since there are v5-based vt8500 chips as well. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Tony Prisk <linux@prisktech.co.nz>
* | ARM: integrator_cp: Set LCD{0,1} enable lines when turning on CLCDJonathan Austin2013-11-14
| | | | | | | | | | | | | | | | | | | | This turns on the internal integrator LCD display(s). It seems that the code to do this got lost in refactoring of the CLCD driver. Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'imx-fixes-3.13' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Olof Johansson2013-11-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes From Shawn Guo, imx fixes for 3.13: - A couple of imx5 and imx6 clock fixes - Two follow-up patches for improving/fixing the commit "ARM: imx: replace imx6q_restart()with mxc_restart()" - One compile fix for imx6sl with randconfig - Commits to fix pllv3 relock/power issues found in IPU/HDMI testing * tag 'imx-fixes-3.13' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: i.MX51: Fix OTG PHY clock ARM: imx: set up pllv3 POWER and BYPASS sequentially ARM: imx: pllv3 needs relock in .set_rate() call ARM: imx: add sleep for pllv3 relock ARM: imx6q: add missing sentinel to divider table ARM: imx: v7_cpu_resume() is needed by imx6sl build ARM: imx: improve mxc_restart() on the SRC bit writes ARM: imx: remove imx_src_prepare_restart() call ARM: i.MX6q: fix the wrong parent of can_root clock
| * | ARM: dts: i.MX51: Fix OTG PHY clockAlexander Shiyan2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | Proper clock ID for USB OTG PHY is "usb_phy_gate". The patch changes this mismatch. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: set up pllv3 POWER and BYPASS sequentiallyShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, POWER and BYPASS bits are set up in a single write to pllv3 register. This causes problem occasionally from the IPU/HDMI testing. Let's follow FSL BSP code to set up POWER bit, relock, and then BYPASS sequentially. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: pllv3 needs relock in .set_rate() callShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pllv3 nees relock not only when powering up but also when rate changes. The patch creates a helper function clk_pllv3_wait_lock() and moves the relock code from clk_pllv3_prepare() into there, so that both .prepare() and .set_rate() hooks of pllv3 can call into the helper for relocking. Since relock is only needed when PLL is powered up while clk_set_rate() could be called before clk is prepared, we need to add a check in clk_pllv3_wait_lock() to skip the relock if PLL is not powered. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: add sleep for pllv3 relockShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The pllv3 relock time varies in the range of 50us ~ 500us, depending on the specific PLL type, e.g. 50us for ARM PLL and 450us for Audio/Video PLL. Let's add a usleep_range() call instead of doing busy wait during relock. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: add missing sentinel to divider tableLothar Waßmann2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | The clk_enet_ref_table[] is missing a final empty entry as end of list marker. Also make the existing markers more obvious. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: v7_cpu_resume() is needed by imx6sl buildShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building a kernel with the following options, CONFIG_SMP=n CONFIG_PM=y CONFIG_SOC_IMX6SL=y CONFIG_SOC_IMX6Q=n we will see the build error below. arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': platform-spi_imx.c:(.text+0x2648): undefined reference to `v7_cpu_resume' make[1]: *** [vmlinux] Error 1 This is because that v7_cpu_resume() implemented in headsmp.S is also needed by imx6sl build. Let's build headsmp.S for CONFIG_SOC_IMX6SL as well. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: improve mxc_restart() on the SRC bit writesShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current comment in the code does not make it clear why the double writes on SRC bit is needed. Let's quote the errata to get it clear. Also, to ensure there are at least 2 writes happen in the same one 32kHz period, we actually need 3 writes. Let's add the third one. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: remove imx_src_prepare_restart() callShawn Guo2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is ~10% possibility that the following emergency restart command fails to reboot imx6q. $ echo b > /proc/sysrq-trigger The IMX restart routine mxc_restart() assumes that it will always run on primary core, and will call imx_src_prepare_restart() to disable secondary cores in order to get them come to online in the following boot. However, the assumption is only true for normal kernel_restart() case where migrate_to_reboot_cpu() will be called to migrate to primary core, but not necessarily true for emergency_restart() case. So when emergency_restart() calls into mxc_restart() on any secondary core, system will hang immediately once imx_src_prepare_restart() is called to disabled secondary cores. Since emergency_restart() is defined as a function that is safe to call in interrupt context, we cannot just call migrate_to_reboot_cpu() to fix the issue. Fortunately, we just found that the issue can be fixed at imx6q platform level. We used to call imx_src_prepare_restart() to disable all secondary cores before resetting hardware. Otherwise, the secondary will fail come to online in the reboot. However, we recently found that after commit 6050d18 (ARM: imx: reset core along with enable/disable operation) comes to play, we do not need to reset the secondary cores any more. That said, mxc_restart() now can run on any core to reboot the system, as long as we remove the imx_src_prepare_restart() call from mxc_restart(). So let's simply remove imx_src_prepare_restart() call to fix the above emergency restart failure. Reported-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: i.MX6q: fix the wrong parent of can_root clockJiada Wang2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | instead of pll3_usb_otg the parent of can_root clock should be pll3_60m. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | | MAINTAINERS: drop discontinued mailing listLinus Walleij2013-11-11
|/ / | | | | | | | | | | | | | | | | The ST-internal Nomadik mailing list is going down. Remove it from the MAINTAINERS file. Cc: Olivier CLERGEAUD <olivier.clergeaud@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'arc-v3.13-rc1-part1' of ↵Linus Torvalds2013-11-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC changes from Vineet Gupta: - Towards a working SMP setup (ASID allocation, TLB Flush,...) - Support for TRACE_IRQFLAGS, LOCKDEP - cacheflush backend consolidation for I/D - Lots of allmodconfig fixlets from Chen - Other improvements/fixes * tag 'arc-v3.13-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (25 commits) ARC: [plat-arcfpga] defconfig update smp, ARC: kill SMP single function call interrupt ARC: [SMP] Disallow RTSC ARC: [SMP] Fix build failures for large NR_CPUS ARC: [SMP] enlarge possible NR_CPUS ARC: [SMP] TLB flush ARC: [SMP] ASID allocation arc: export symbol for pm_power_off in reset.c arc: export symbol for save_stack_trace() in stacktrace.c arc: remove '__init' for get_hw_config_num_irq() arc: remove '__init' for first_lines_of_secondary() arc: remove '__init' for setup_processor() and arc_init_IRQ() arc: kgdb: add default implementation for kgdb_roundup_cpus() ARC: Fix bogus gcc warning and micro-optimise TLB iteration loop ARC: Add support for irqflags tracing and lockdep ARC: Reset the value of Interrupt Priority Register ARC: Reduce #ifdef'ery for unaligned access emulation ARC: Change calling convention of do_page_fault() ARC: cacheflush optim - PTAG can be loop invariant if V-P is const ARC: cacheflush refactor #3: Unify the {d,i}cache flush leaf helpers ...
| * | ARC: [plat-arcfpga] defconfig updateVineet Gupta2013-11-07
| | | | | | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | smp, ARC: kill SMP single function call interruptJiang Liu2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9a46ad6d6df3b54 "smp: make smp_call_function_many() use logic similar to smp_call_function_single()" has unified the way to handle single and multiple cross-CPU function calls. Now only one interrupt is needed for architecture specific code to support generic SMP function call interfaces, so kill the redundant single function call interrupt. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Cc: Jiang Liu <liuj97@gmail.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [SMP] Disallow RTSCVineet Gupta2013-11-07
| | | | | | | | | | | | | | | | | | RTSC is strictly incore and must not be allowed in SMP configs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [SMP] Fix build failures for large NR_CPUSVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ST.as only takes S9 (255) for offset. This was going out of range when accessing a task_struct field with 4k NR_CPUS (due to 128b of coumaks itself in there). Workaround by using an intermediate register to do the address scaling. There is some duplication of fix for ctx_sw.c and ctx_sw_asm.S however given that C version will go away soon I'm not bothering to factor out the common code. Reported-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [SMP] enlarge possible NR_CPUSNoam Camus2013-11-06
| | | | | | | | | | | | | | | Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [SMP] TLB flushVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add mm_cpumask setting (aggregating only, unlike some other arches) used to restrict the TLB flush cross-calling - cross-calling versions of TLB flush routines (thanks to Noam) Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [SMP] ASID allocationVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | -Track a Per CPU ASID counter -mm-per-cpu ASID (multiple threads, or mm migrated around) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | arc: export symbol for pm_power_off in reset.cChen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need export symbol for it, or can not pass compiling, the related error with allmodconfig: MODPOST 2994 modules ERROR: "pm_power_off" [drivers/mfd/retu-mfd.ko] undefined! ERROR: "pm_power_off" [drivers/char/ipmi/ipmi_poweroff.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | arc: export symbol for save_stack_trace() in stacktrace.cChen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need export its symbol just like other architectures done, or can not pass compiling with allmodconfig, the related error: MODPOST 2994 modules ERROR: "save_stack_trace" [kernel/backtracetest.ko] undefined! ERROR: "save_stack_trace" [drivers/md/persistent-data/dm-persistent-data.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | arc: remove '__init' for get_hw_config_num_irq()Chen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_hw_config_num_irq() may be called by normal iss_model_init_smp() which is a function pointer for 'init_smp' which may be called by first_lines_of_secondary() which also need be normal too. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x5814): Section mismatch in reference from the function iss_model_init_smp() to the function .init.text:get_hw_config_num_irq() The function iss_model_init_smp() references the function __init get_hw_config_num_irq(). This is often because iss_model_init_smp lacks a __init annotation or the annotation of get_hw_config_num_irq is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
| * | arc: remove '__init' for first_lines_of_secondary()Chen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | first_lines_of_secondary() is a '__init' function, but it may be called by __cpu_up() by _cpu_up() by cpu_up() which is a normal export symbol function. So recommend to remove '__init'. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x315c): Section mismatch in reference from the function __cpu_up() to the function .init.text:first_lines_of_secondary() The function __cpu_up() references the function __init first_lines_of_secondary(). This is often because __cpu_up lacks a __init annotation or the annotation of first_lines_of_secondary is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
| * | arc: remove '__init' for setup_processor() and arc_init_IRQ()Chen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | They haven't '__init' in definition, but has '__init' in declaration. And normal function start_kernel_secondary() may call setup_processor() which will call arc_init_IRQ(). So need remove '__init' for both of them. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x3084): Section mismatch in reference from the function start_kernel_secondary() to the function .init.text:setup_processor() The function start_kernel_secondary() references the function __init setup_processor(). This is often because start_kernel_secondary lacks a __init annotation or the annotation of setup_processor is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
| * | arc: kgdb: add default implementation for kgdb_roundup_cpus()Chen Gang2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arc supports kgdb, but need update -- add function kgdb_roundup_cpus(), or can not pass compiling. At present, add the simple generic one just like other architectures(e.g. tile, mips ...). The related error (with allmodconfig): kernel/built-in.o: In function `kgdb_cpu_enter': kernel/debug/debug_core.c:580: undefined reference to `kgdb_roundup_cpus' Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Fix bogus gcc warning and micro-optimise TLB iteration loopVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------>8---------------------- arch/arc/mm/tlb.c: In function ‘do_tlb_overlap_fault’: arch/arc/mm/tlb.c:688:13: warning: array subscript is above array bounds [-Warray-bounds] (pd0[n] & PAGE_MASK)) { ^ ------------------>8---------------------- While at it, remove the usless last iteration of outer loop when reading a TLB SET for duplicate entries. Suggested-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Add support for irqflags tracing and lockdepVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | Lockdep required a small fix to stacktrace API which was incorrectly unwindign out of __switch_to for the current call frame. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Reset the value of Interrupt Priority RegisterVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | In case bootloader has changed the priority of one/more IRQ lines Reported-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Reduce #ifdef'ery for unaligned access emulationVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | Emulation not enabled is treated as if the fixup failed, so no need for special #ifdef checks. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Change calling convention of do_page_fault()Vineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | switch the args (address, pt_regs) to match with all the other "C" exception handlers. This removes the awkwardness in EV_ProtV for page fault vs. unaligned access. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: cacheflush optim - PTAG can be loop invariant if V-P is constVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Line op needs vaddr (indexing) and paddr (tag match). For page sized flushes (V-P const), each line op will need a different index, but the tag bits wil remain constant, hence paddr can be setup once outside the loop. This improves select LMBench numbers for Aliasing dcache where we have more "preventive" cache flushing. Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 3.11-rc7- Linux 3.11.0- 80 4.66 8.88 69.7 112. 268. 8.60 28.0 3489 13.K 27.K # Non alias ARC700 3.11-rc7- Linux 3.11.0- 80 4.64 8.51 68.6 98.5 271. 8.58 28.1 4160 15.K 32.K # Aliasing 3.11-rc7- Linux 3.11.0- 80 4.64 8.51 69.8 99.4 270. 8.73 27.5 3880 15.K 31.K # PTAG loop Inv Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: cacheflush refactor #3: Unify the {d,i}cache flush leaf helpersVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | With Line length being constant now, we can fold the 2 helpers into 1. This allows applying any optimizations (forthcoming) to single place. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: cacheflush refactor #2: I and D caches lines to have same sizeVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | Having them be different seems an obscure configuration. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routineVineet Gupta2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC dcache supports 3 ops - Inv, Flush, Flush-n-Inv. The programming model however provides 2 commands FLUSH, INV. INV will either discard or flush-n-discard (based on DT_CTRL bit) The leaf helper __dc_line_loop() used to take the AUX register (corresponding to the 2 commands). Now we push that to within the helper, paving way for code consolidations to follow. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: use __weak instead of __attribute__((weak))Vineet Gupta2013-11-06
| | | | | | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Annotate some functions as staticVineet Gupta2013-11-06
| | | | | | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | arc: Replace __get_cpu_var usesChristoph Lameter2013-11-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calcualtions are avoided and less registers are used when code is generated. At the end of the patchset all uses of __get_cpu_var have been removed so the macro is removed too. The patchset includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, u); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(this_cpu_ptr(&x), y, sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to this_cpu_inc(y) Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Christoph Lameter <cl@linux.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2013-11-11
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k Pull m68k updates from Geert Uytterhoeven: "Summary: - __put_user_unaligned may/will be used by btrfs - m68k part of a global cleanup" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Remove deprecated IRQF_DISABLED m68k/m68knommu: Implement __get_user_unaligned/__put_user_unaligned()
| * | | m68k: Remove deprecated IRQF_DISABLEDMichael Opdenacker2013-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch proposes to remove the IRQF_DISABLED flag from m68k architecture code. It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * | | m68k/m68knommu: Implement __get_user_unaligned/__put_user_unaligned()Geert Uytterhoeven2013-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | fs/btrfs/ioctl.c: In function ‘btrfs_ioctl_file_extent_same’: fs/btrfs/ioctl.c:2802: error: implicit declaration of function ‘__put_user_unaligned’ Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | | | Merge branch 'parisc-3.13' of ↵Linus Torvalds2013-11-11
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc update from Helge Deller: - a bugfix for sticon (parisc text console driver) to not crash the 64bit kernel on machines with more than 4GB RAM - added kernel audit support - made udelay() implementation SMP-safe - "make install" now does not depend on vmlinux - added defconfigs for 32- and 64-kernels * 'parisc-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: add generic 32- and 64-bit defconfigs parisc: sticon - unbreak on 64bit kernel parisc: signal fixup - SIGBUS vs. SIGSEGV parisc: implement full version of access_ok() parisc: correctly display number of active CPUs parisc: do not count IPI calls twice parisc: make udelay() SMP-safe parisc: remove duplicate define parisc: make "make install" not depend on vmlinux parisc: add kernel audit feature parisc: provide macro to create exception table entries
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