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* Merge tag 'sti-soc-for-v3.20-1' of ↵Olof Johansson2015-01-21
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.stlinux.com/devel/kernel/linux-sti into next/soc Merge "ARM: STi: SoC changes for v3.20, round 1" from Maxime Coquelin: Highlights: ----------- - Add support for STiH418 SoC * tag 'sti-soc-for-v3.20-1' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: Add STiH418 SoC support Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: STi: Add STiH418 SoC supportMaxime COQUELIN2015-01-16
| | | | | | | | | | | | This patch adds support to STiH418 SoC. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
* | Merge tag 'at91-cleanup2' of ↵Olof Johansson2015-01-21
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc Merge "at91: cleanup for 3.20 #2" from Nicolas Ferre: Second batch of cleanup for 3.20: - By reworking the PM code, we can remove the AT91 more specific initialization - We are using DT for SRAM initialization now, so we can remove its explicit mapping - The PMC clock driver now hosts IDLE function for at91rm9200 with other SoCs ones. * tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (37 commits) ARM: at91: move at91rm9200_idle() to clk/at91/pmc.c ARM: at91: remove unused at91_init_sram ARM: at91: sama5d4: remove useless call to at91_init_sram ARM: at91: remove useless map_io ARM: at91: pm: prepare for multiplatform ARM: at91: pm: add UDP and UHP checks to newer SoCs ARM: at91: pm: use the mmio-sram pool to access SRAM ARM: at91: pm: rework cpu detection ARM: at91: dts: sama5d3: add ov2640 camera sensor support ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset} ARM: at91: dts: sama5d3: move the isi mck pin to mb ARM: at91: dts: sama5d3: add missing pins of isi ARM: at91: dts: sama5d3: split isi pinctrl ARM: at91: dts: sama5d3: add isi clock ARM: at91/dt: ethernut5: use at91sam9xe.dtsi ARM: at91/dt: Add a dtsi for at91sam9xe ARM: at91/dt: add SRAM nodes ARM: at91/dt: at91rm9200ek: enable RTC ARM: at91/dt: rm9200: add RTC node ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: at91: move at91rm9200_idle() to clk/at91/pmc.cAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | Move at91rm9200_idle() along with at91sam9_idle() in clk/at91/pmc.c. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: remove unused at91_init_sramAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | SRAM initialization is now done through the mmio-sram driver and at91_init_sram() is not called anymore, remove it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: sama5d4: remove useless call to at91_init_sramAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: remove useless map_ioAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | Now that the SRAM is initialized by the mmio-sram driver, .map_io is useless. remove it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: pm: prepare for multiplatformAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Split at91_pm_init() in three variants that are called by the respective SoCs .init_machine. This allows to remove the of_machine_is_compatible() calls and move at91_pm_init() out of arch_initcall() which is required for multiplatform. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: pm: add UDP and UHP checks to newer SoCsAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | Check UDP and UHP on sam9x5, sam9n12 and the sama5 series. Check UHP on the sam9g45. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: pm: use the mmio-sram pool to access SRAMAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | | | | Now that the SRAM is part of a genpool, use it to allocate memory to use for the slowclock implementation. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | ARM: at91: pm: rework cpu detectionAlexandre Belloni2015-01-16
| | | | | | | | | | | | | | | | | | | | | Store SoC differences in a struct to remove cpu_is_* usage. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | Merge tag 'at91-dt' into at91-3.20-cleanupNicolas Ferre2015-01-16
| |\ \
| | * | ARM: at91: dts: sama5d3: add ov2640 camera sensor supportJosh Wu2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to v4l2 dt document, we add: a camera host: ISI port. a i2c camera sensor: ov2640 port. to sama5d3xmb.dtsi. The ov2640 node defines the pinctrls, clocks and refer to isi port. The ISI node also has a reference to the ov2640 port. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCKJosh Wu2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For sama5d3xmb board, the pins: pinctrl_isi_pck_as_mck is pck1, and used to provide MCK for camera sensor. We change its name to: pinctrl_pck1_as_isi_mck. As we want camera sensor instead of ISI to configure the pck1 (ISI_MCK) pin. So we remove this pinctrl from ISI DT node. It will be added in sensor's DT node. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}Josh Wu2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For sama5d3xmb board, the pins: pinctrl_isi_{power,reset} is used to power-down or reset camera sensor. So we should let camera sensor instead of ISI to configure the pins. This patch will change pinctrl name from pinctrl_isi_{power,reset} to pinctrl_sensor_{power,reset}. And remove these two pinctrl from ISI's DT node. We will add these two pinctrl to sensor's DT node. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: move the isi mck pin to mbBo Shen2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mck is decided by the board design, move it to mb related dtsi file. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: add missing pins of isiBo Shen2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ISI has 12 data lines, add the missing two data lines. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: split isi pinctrlBo Shen2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the ISI has 12 data lines, however we only use 8 data lines with sensor module. So, split the data line into two groups which make it can be choosed depends on the hardware design. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: dts: sama5d3: add isi clockJosh Wu2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ISI peripheral clock in sama5d3.dtsi. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: ethernut5: use at91sam9xe.dtsiAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethernut5 is actually based on an at91sam9xe, use the correct dts include. Cc: Martin Reimann <martin.reimann@egnite.de> Cc: Tim Schendekehl <tim.schendekehl@egnite.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: Add a dtsi for at91sam9xeAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at91sam9xe is slightly different from at91sam9260, in particular it has a different SRAM size and location. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: add SRAM nodesAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add nodes for the SRAM available on atmel SoCs For the at91sam9260 and the at91sam9g20, address mirroring is used to create a single contiguous SRAM range instead of declaring two separate banks. Also remove leftover TODOs in the sam9g45 file Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: correct at91sam9rl sram size => 0x10000] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: at91rm9200ek: enable RTCAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the RTC on the at91rm9200ek. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: rm9200: add RTC nodeAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a node for the RTC available on at91rm9200. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: at91sam9n12: Add RTC nodeAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add node for the RTC available on the at91sam9n12. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: sama5d4: Add SFRAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sama4d4 has Special Function Registers that allow to manage DDR, OHCI, EBI and AIC interrupt redirection. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: reg size: 0x60] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: sama5d3: Add SFRAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sama5d3 has Special Function Registers that allow to manage OHCI, EBI and the UTMI clock. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: reg size: 0x60] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: Add Special Function Registers binding documentationAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The special function registers gather some registers that allow to tweak features provided by IPs controlled through another register range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: reg size: 0x60] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: sam9263: Fix typo: ac91_clk -> ac97_clkAlexander Stein2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | That clock should be called ac97_clk. Signed-off-by: Alexander Stein <alexanders83@web.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: sama5d3: enable D2 as the heartbeat LEDJosh Wu2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This D2 led is available for all sama5d3x-ek board. So make it a heartbeat LED. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless at91rm9200_set_type()Alexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since all rm9200 board files have been removed, there is no user of at91rm9200_set_type() left. Remove it Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless at91rm9200_dt_initialize()Alexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at91rm9200_dt_initialize() is doing the same as at91_dt_initialize(), use that one instead. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: move debug-macro.S into the common spaceAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move debug-macro.S from include/mach/ to include/debug where all other common debug macros are. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless at91_sysirq_mask_rtxAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq fixup from at91_sysirq_mask_rtc and at91_sysirq_mask_rtt is now handled by aic_common_rtc_irq_fixup and aic_common_rtt_irq_fixup. Remove those useless functions. Also remove the now unused mach/at91_rtt.h header. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless config MACH_AT91SAM9_DTAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that at91sam9 SoCs are only supported through DT, remove CONFIG_MACH_AT91SAM9_DT and use CONFIG_SOC_AT91SAM9 instead. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless config MACH_AT91RM9200_DTAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that rm9200 is only supported through DT, remove CONFIG_MACH_AT91RM9200_DT and use CONFIG_SOC_AT91RM9200 instead. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove unused mach/memory.hAlexandre Belloni2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_NEED_MACH_MEMORY_H is not set by any at91 platform, remove mach/memory.h Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove useless header file includesBoris Brezillon2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since removal of !DT boards, asm/irq.h inclusion is not needed in these product files. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91: remove unneeded header fileNicolas Ferre2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These GPIO pin descriptions are now moved with the pinctrl driver. We can safely remove this useless header file. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | rtc: at91/Kconfig: remove useless optionsNicolas Ferre2015-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we removed all the !DT boards during 3.19 cycle, we can now remove these options. Reported-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | ARM: at91/Documentation: add a README for Atmel SoCsNicolas Ferre2015-01-15
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a README file to describe Atmel SoCs (aka AT91) support in Mainline Linux: - SoC list + datasheet web links - Basic but useful information - Device Tree conventions and Work In Progress statement. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Olof Johansson <olof@lixom.net>
* | | ARM: hisi: enable smp for HiP01Wang Long2015-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable smp for HiP01 board. Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> [olof: split off the dts change to a separate commit] Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: hisi: rename secondary_startup functionWang Long2015-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As hix5hd2 and hip01 has the same secondary_startup so rename hix5hd2_secondary_startup to to hisi_secondary_startup. the hip01 will use hisi_secondary_startup for the secondary core boot. Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: hisi: rename smp_prepares_cpus functionWang Long2015-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As hix5hd2 and hip01 has the same .smp_prepare_cpus in struct smp_operations, so rename hix5hd2_smp_prepare_cpus to hisi_common_smp_prepare_cpus. the hip01 will use hisi_common_smp_prepare_cpus in its struct smp_operations. Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: hisi: enable HiP01 SoCWang Long2015-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable Hisilicon HiP01 SoC. This HiP01 SoC series support both one core or dual cores and quad cores. The core is Cortex A9. Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: debug: add HiP01 debug uartWang Long2015-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support of Hisilicon HiP01 debug uart. The uart of hip01 is 8250 compatible. Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | Merge tag 'new-atlas7mach-for-3.20' of ↵Olof Johansson2015-01-21
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/soc Merge "CSR new atlas7 machine, and delete old marco machine for 3.20" from Barry Song: drop CSR Marco machine and add Atlas7 new machine This is the init support for CSR Atlas7 new SoC. Old Marco has never shipped to customers and been dropped. * tag 'new-atlas7mach-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux: ARM: sirf: add Atlas7 machine support ARM: sirf: move to debug_ll_io_init and drop map_io ARM: sirf: move platsmp to support Atlas7 SoC ARM: sirf: drop Marco machine ARM: sirf: drop Marco support in reset controller module Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: sirf: add Atlas7 machine supportZhiwu Song2015-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CSRatlas7 is next-gen auto SoC from CSR. It could bring to customers most integrated SoC solution: - World leading Bluetooth 4.0 and GNSS baseband - Audio processing, analog CODEC and ADC by DSP - Analog video input - SDR accelerators - CAN bus support by Cortex-M3 Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: sirf: move to debug_ll_io_init and drop map_ioBarry Song2015-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves to debug_ll_io_init(), then finally drops CSR map_io() machine callbacks. Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: sirf: move platsmp to support Atlas7 SoCZhiwu Song2015-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch breaks Marco SMP support, but Marco project has been dropped. So it corrects cpu1 jump/flag address for Atlas7 and removes scu related logic as scu doesn't expose in cortex-a7. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 17:21:56 -0500