aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAge
* ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 coresWill Deacon2011-10-08
| | | | | | | | | | ARMv6 cores do not implement the DBGOSLAR register, so we don't need to try and clear it on boot. Furthermore, the VCR is zeroed out of reset, so we don't need to zero it explicitly when a CPU comes online. Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for_3_2/for-rmk/arm_cpu_pm' of ↵Russell King2011-09-26
|\ | | | | | | git://gitorious.org/omap-sw-develoment/linux-omap-dev into devel-stable
| * ARM: mm: Add strongly ordered descriptor support.Santosh Shilimkar2011-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On certain architectures, there might be a need to mark certain addresses with strongly ordered memory attributes to avoid ordering issues at the interconnect level. On OMAP4, the asynchronous bridge buffers can only be drained with strongly ordered accesses and hence the need to mark the memory strongly ordered. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Woodruff Richard <r-woodruff2@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * ARM: vfp: Fix the comment to make it consistent with the code.Santosh Shilimkar2011-09-23
| | | | | | | | | | | | | | Function vfp_force_reload() clears vfp_current_hw_state, so update the comment accordingly. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * ARM: gic: Allow gic arch extensions to provide irqchip flagsColin Cross2011-09-23
| | | | | | | | | | | | | | | | | | | | | | Tegra can benefit from the IRQCHIP_MASK_ON_SUSPEND flag, allow it to be passed to the gic irq chip. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * ARM: vfp: Use cpu pm notifiers to save vfp stateColin Cross2011-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the cpu is powered down in a low power mode, the vfp registers may be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the cpu's vfp registers. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * ARM: gic: Use cpu pm notifiers to save gic stateColin Cross2011-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the cpu is powered down in a low power mode, the gic cpu interface may be reset, and when the cpu cluster is powered down, the gic distributor may also be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the gic cpu interface registers, and the CPU_CLUSTER_PM_ENTER and CPU_CLUSTER_PM_EXIT notifiers to save and restore the gic distributor registers. Original-author: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * ARM: Enable CPU_PM notifiers on ARM machines.Santosh Shilimkar2011-09-23
| | | | | | | | | | | | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * cpu_pm: call notifiers during suspendColin Cross2011-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Implements syscore_ops in cpu_pm to call the cpu and cpu cluster notifiers during suspend and resume, allowing drivers receiving the notifications to avoid implementing syscore_ops. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * cpu_pm: Add cpu power management notifiersColin Cross2011-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During some CPU power modes entered during idle, hotplug and suspend, peripherals located in the CPU power domain, such as the GIC, localtimers, and VFP, may be powered down. Add a notifier chain that allows drivers for those peripherals to be notified before and after they may be reset. Notified drivers can include VFP co-processor, interrupt controller and it's PM extensions, local CPU timers context save/restore which shouldn't be interrupted. Hence CPU PM event APIs must be called with interrupts disabled. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
* | Merge branch 'pm' into devel-stableRussell King2011-09-22
|\ \
| * | ARM: pm: add L2 cache cleaning for suspendRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to ensure that state is pushed out from the L2 cache when suspending so that the resume paths can access their data before the MMU and caches have been re-initialized. Add the necessary calls to __cpu_suspend_save(). Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: convert some assembly to CRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert some of the sleep.S guts to C code, which makes it easier to use our macros and to add L2 cache handling. We provide a helper function, __cpu_suspend_save(), which deals with saving the common state, setting up for resume, and flushing caches. The remainder left as assembly code is the saving of the CPU general purpose registers, and allocating space on the stack to save the CPU specific registers and resume state. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: get rid of cpu_resume_turn_mmu_onRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't require cpu_resume_turn_mmu_on as we can combine the ldr instruction with the following code provided we ensure that cpu_resume_mmu is aligned for older CPUs. Note that we also align to a 32-byte boundary to ensure that the code can't cross a section boundary. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: no need to save/restore context ID registerRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to save and restore the context ID register on ARMv6 and ARMv7 with a temporary page table as we write the context ID register when we switch back to the real page tables for the thread. Moreover, the temporary page tables do not contain any non-global mappings, so the context ID value should not be used. To be safe, initialize the register to a reserved context ID value. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: only use preallocated page table during resumeRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only use the preallocated page table during the resume, not while suspending. This avoids the overhead of having to switch unnecessarily to the resume page table in the suspend path. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: preallocate a page table for suspend/resumeRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Preallocate a page table and setup an identity mapping for the MMU enable code. This means we don't have to "borrow" a page table to do this, avoiding complexities with L2 cache coherency. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: pm: force non-zero return value from __cpu_suspend when abortingRussell King2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that the return value from __cpu_suspend is non-zero when aborting. Zero indicates a successful suspend occurred. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'kprobes-test' of git://git.yxit.co.uk/linux into devel-stableRussell King2011-09-21
|\ \ \
| * | | ARM: kprobes: Add introductory comment to test codeJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add some benchmarking to test moduleJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These benchmarks show the basic speed of kprobes and verify the success of optimisations done to the emulation of typical function entry instructions (i.e. push/stmdb). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add decoding table test coverage analysisJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is used to verify that all combinations of CPU instructions described by the kprobes decoding tables have a test case. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add decoding table self-consistency testsJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These check that the bitmask and match value used in the decoding tables are self consistent. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add exports for test codeJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The test code will be using kprobes' internal decoding tables so we need to export these for when then the tests are compiled as a module. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add ARM instruction simulation test casesJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add Thumb instruction simulation test casesJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Framework for instruction set test casesJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM we have to simulate/emulate CPU instructions in order to singlestep them. This patch adds a framework which can be used to construct test cases for different instruction forms. It is described in detail in the in-source comments of kprobes-test.c Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add basic API testsJon Medhurst2011-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These test that the different kinds of probes can be successfully placed into ARM and Thumb code and that the handlers are called correctly when this code is executed. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | ARM: kprobes: Add config option for selecting the ARM kprobes testsJon Medhurst2011-09-20
| | |/ | |/| | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | Linux 3.1-rc6Linus Torvalds2011-09-12
| | |
| * | Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2011-09-12
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm: Remove duplicate "return" statement drm/nv04/crtc: Bail out if FB is not bound to crtc drm/nouveau: fix nv04_sgdma_bind on non-"4kB pages" archs drm/nouveau: properly handle allocation failure in nouveau_sgdma_populate drm/nouveau: fix oops on pre-semaphore hardware drm/nv50/crtc: Bail out if FB is not bound to crtc drm/radeon/kms: fix DP detect and EDID fetch for DP bridges
| | * | drm: Remove duplicate "return" statementLin Ming2011-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the duplicate "return" statement in drm_fb_helper_panic(). Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| | * | Merge branch 'drm-nouveau-fixes' of ↵Dave Airlie2011-09-09
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-test * 'drm-nouveau-fixes' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nv04/crtc: Bail out if FB is not bound to crtc drm/nouveau: fix nv04_sgdma_bind on non-"4kB pages" archs drm/nouveau: properly handle allocation failure in nouveau_sgdma_populate drm/nouveau: fix oops on pre-semaphore hardware drm/nv50/crtc: Bail out if FB is not bound to crtc
| | | * | drm/nv04/crtc: Bail out if FB is not bound to crtcEmil Velikov2011-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit resolves a possible 'NULL pointer dereference' It uses the same approach as radeon, intel and nouveau/nv50 Fixes bug 'Nouveau: Kernel oops when unplugging external monitor' https://bugs.freedesktop.org/show_bug.cgi?id=40336 Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | | * | drm/nouveau: fix nv04_sgdma_bind on non-"4kB pages" archsMarcin Slusarz2011-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nv04_sgdma_bind binds the same page multiple times on architectures where PAGE_SIZE != 4096. Let's fix it. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | | * | drm/nouveau: properly handle allocation failure in nouveau_sgdma_populateMarcin Slusarz2011-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not cleaning after alloc failure would result in crash on destroy, because nouveau_sgdma_clear assumes "ttm_alloced" to be not null when "pages" is not null. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Cc: stable@kernel.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | | * | drm/nouveau: fix oops on pre-semaphore hardwareBen Skeggs2011-09-09
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | | * | drm/nv50/crtc: Bail out if FB is not bound to crtcEmil Velikov2011-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes possbile NULL pointer dereference Resolves 'kernel crash in nv50_crtc_do_mode_set_base during shutdown' https://bugs.freedesktop.org/show_bug.cgi?id=40005 Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/radeon/kms: fix DP detect and EDID fetch for DP bridgesAlex Deucher2011-09-06
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sink type is always DP for DP bridges and EDID fetch on DP bridges is always i2c over aux rather than plain i2c. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2011-09-12
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of git://git.linaro.org/people/arnd/arm-soc: ARM: CSR: add missing sentinels to of_device_id tables ARM: cns3xxx: Fix newly introduced warnings in the PCIe code ARM: cns3xxx: Fix compile error caused by hardware.h removed ARM: davinci: fix cache flush build error ARM: davinci: correct MDSTAT_STATE_MASK ARM: davinci: da850 EVM: read mac address from SPI flash OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlers OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[] OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomain OMAP4: clock: fix compile warning OMAP4: clock: re-enable previous clockdomain enable/disable sequence OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain force wakeup OMAP: powerdomains: Make all powerdomain target states as ON at init
| | * \ \ Merge branch 'for_3.1/pm-fixes-2' of ↵Arnd Bergmann2011-09-12
| | |\ \ \ | | | | | | | | | | | | | | | | | | git://gitorious.org/khilman/linux-omap-pm into fixes
| | | * | | OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlersKevin Hilman2011-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The suspend/resume _noirq handlers were #ifdef'd out in the !CONFIG_SUSPEND case, but were still assigned to the dev_pm_ops struct. Fix by defining them to NULL in the !CONFIG_SUSPEND case. Reported-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | Merge branch 'sirf/fixes' into fixesArnd Bergmann2011-09-12
| | |\ \ \ \
| | | * | | | ARM: CSR: add missing sentinels to of_device_id tablesJamie Iles2011-09-10
| | | | |/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The of_device_id tables used for matching should be terminated with empty sentinel values. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Barry Song <baohua.song@csr.com>
| | | | | |
| | | \ \ \
| | *-. \ \ \ Merge branches 'cns3xxx/fixes', 'omap/fixes' and 'davinci/fixes' into fixesArnd Bergmann2011-09-10
| | |\ \ \ \ \
| | | | * | | | ARM: davinci: fix cache flush build errorLinus Walleij2011-09-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TNET variant of DaVinci compiles some code that it shares with other DaVinci variants, however it has a V6 CPU rather than an ARM926T, thus the hardcoded call to arm926_flush_kern_cache_all() in sleep.S will obviously fail, and we need to build with the v6_flush_kern_cache_all() call instead. This was triggered by manually altering the DaVinci config to build the TNET version. Cc: Dave Martin <dave.martin@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
| | | | * | | | ARM: davinci: correct MDSTAT_STATE_MASKSergei Shtylyov2011-09-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the #define MDSTAT_STATE_MASK at last. Using the wrong value seems to have been harmless though... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | | | * | | | ARM: davinci: da850 EVM: read mac address from SPI flashRajashekhara, Sudhakar2011-09-07
| | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DA850/OMAP-L138 EMAC driver uses random mac address instead of a fixed one because the mac address is not stuffed into EMAC platform data. This patch provides a function which reads the mac address stored in SPI flash (registered as MTD device) and populates the EMAC platform data. The function which reads the mac address is registered as a callback which gets called upon addition of MTD device. NOTE: In case the MAC address stored in SPI flash is erased, follow the instructions at [1] to restore it. [1] http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Restoring_MAC_address_on_SPI_Flash Modifications in v2: Guarded registering the mtd_notifier only when MTD is enabled. Earlier this was handled using mtd_has_partitions() call, but this has been removed in Linux v3.0. Modifications in v3: a. Guarded da850_evm_m25p80_notify_add() function and da850evm_spi_notifier structure with CONFIG_MTD macros. b. Renamed da850_evm_register_mtd_user() function to da850_evm_setup_mac_addr() and removed the struct mtd_notifier argument to this function. c. Passed the da850evm_spi_notifier structure to register_mtd_user() function. Modifications in v4: Moved the da850_evm_setup_mac_addr() function within the first CONFIG_MTD ifdef construct. Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
| | | | | | |
| | | | \ \ \
| | | | \ \ \
| | | | \ \ \
| | | | \ \ \
| | | | \ \ \
| | | *-----. \ \ \ Merge branches 'non_hwmod_compliant_fix_3.1rc', 'omap3_clock_fixes_3.1rc', ↵Paul Walmsley2011-09-04
| | | |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'omap4_clock_fixes_3.1rc', 'missing_2430_musb_adds_terminator_fix_3.1rc' and 'pwrdm_clkdm_fixes_3.1rc' into prcm-fixes-a-3.1rc
| | | | | | | * | | | OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain ↵Santosh Shilimkar2011-08-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | force wakeup While using clockdomain force wakeup method, not waiting for powerdomain to be effectively ON may end up locking the clockdomain FSM until a next wakeup event occurs. One such issue was seen on OMAP4430, where L4_PER was periodically getting stuck in in-transition state when transitioning from from OSWR to ON. This issue was reported and investigated by Patrick Titiano <p-titiano@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reported-by: Patrick Titiano <p-titiano@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: updated to apply; added transition wait on clkdm_deny_idle(); remove two superfluous pwrdm_wait_transition() calls] Signed-off-by: Paul Walmsley <paul@pwsan.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 03:36:01 -0500