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* NVMe: Update BAR structure to match the current specMatthew Wilcox2011-11-04
| | | | | | | | | | Add two reserved registers in the middle of the BAR to match the 1.0 spec plus ECN 0002. Also rename IMC and ISC to INTMC and INTSC to conform with the spec. We still don't need to use them :-) Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Handle physical merging of bvec entriesMatthew Wilcox2011-11-04
| | | | | | | In order to not overrun the sg array, we have to merge physically contiguous pages into a single sg entry. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Check for DMA mapping failureMatthew Wilcox2011-11-04
| | | | | | If dma_map_sg returns 0 (failure), we need to fail the I/O. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Pass the nvme_dev to nvme_free_prps and nvme_setup_prpsMatthew Wilcox2011-11-04
| | | | | | | | We were passing the nvme_queue to access the q_dmadev for the dma_alloc_coherent calls, but since we moved to the dma pool API, we really only need the nvme_dev. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Optimise memory usage for I/Os between 4k and 128kMatthew Wilcox2011-11-04
| | | | | | | Add a second memory pool for smaller I/Os. We can pack 16 of these on a single page instead of using an entire page for each one. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Switch to use DMA Pool APIMatthew Wilcox2011-11-04
| | | | | | | | Calling dma_free_coherent from interrupt context causes warnings. Using the DMA pools delays freeing until pool destruction, so avoids the problem. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Rename nvme_req_info to nvme_bioMatthew Wilcox2011-11-04
| | | | | | | | There are too many things called 'info' in this driver. This data structure is auxiliary information for a struct bio, so call it nvme_bio, or nbio when used as a variable. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Initial PRP List supportShane Michael Matthews2011-11-04
| | | | | | | | | | | | | Add a pointer to the nvme_req_info to hold a new data structure (nvme_prps) which contains a list of the pages allocated to this particular request for holding PRP list entries. nvme_setup_prps() now returns this pointer. To allocate and free the memory used for PRP lists, we need a struct device, so we need to pass the nvme_queue pointer to many functions which didn't use to need it. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Advance the sg pointer when filling in an sg listMatthew Wilcox2011-11-04
| | | | | | | For multipage BIOs, we were always using sg[0] instead of advancing through the list. Oops :-) Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Renumber the special context valuesMatthew Wilcox2011-11-04
| | | | | | | If POISON_POINTER_DELTA isn't defined, ensure they're in page 0 which should never be mapped. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Handle the congestion list a little betterMatthew Wilcox2011-11-04
| | | | | | | | In the bio completion handler, check for bios on the congestion list for this NVM queue. Also, lock the congestion list in the make_request function as the queue may end up being shared between multiple CPUs. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Record the timeout for each commandMatthew Wilcox2011-11-04
| | | | | | | | In addition to recording the completion data for each command, record the anticipated completion time. Choose a timeout of 5 seconds for normal I/Os and 60 seconds for admin I/Os. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Need to lock queue during interrupt handlingMatthew Wilcox2011-11-04
| | | | | | | | | If we're sharing a queue between multiple CPUs and we cancel a sync I/O, we must have the queue locked to avoid corrupting the stack of the thread that submitted the I/O. It turns out this is the same locking that's needed for the threaded irq handler, so share that code. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Detect command IDs completing that are out of rangeMatthew Wilcox2011-11-04
| | | | | | | | | If the adapter completes a command ID that is outside the bounds of the array, return CMD_CTX_INVALID instead of random data, and print a message in the sync_completion handler (which is rapidly becoming the misc completion handler :-) Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Detect commands that are completed twiceMatthew Wilcox2011-11-04
| | | | | | | Set the context value to CMD_CTX_COMPLETED, and print a message in the sync_completion handler if we see it. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Use a symbolic name to represent cancelled commands instead of 0Matthew Wilcox2011-11-04
| | | | | | | I have plans for other special values in sync_completion. Plus, this is more self-documenting, and lets us detect bogus usages. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Add a module parameter to use a threaded interruptMatthew Wilcox2011-11-04
| | | | | | | | | | | We're currently calling bio_endio from hard interrupt context. This is not a good idea for preemptible kernels as it will cause longer latencies. Using a threaded interrupt will run the entire queue processing mechanism (including bio_endio) in a thread, which can be preempted. Unfortuantely, it also adds about 7us of latency to the single-I/O case, so make it a module parameter for the moment. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Call put_nvmeq() before calling nvme_submit_sync_cmd()Matthew Wilcox2011-11-04
| | | | | | | | We can't have preemption disabled when we call schedule(). Accept the possibility that we'll get preempted, and it'll cost us some cacheline bounces. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Allow fatal signals to interrupt I/OMatthew Wilcox2011-11-04
| | | | | | | | | | | | | If the user sends a fatal signal, sleeping in the TASK_KILLABLE state permits the task to be aborted. The only wrinkle is making sure that if/when the command completes later that it doesn't upset anything. Handle this by setting the data pointer to 0, and checking the value isn't NULL in the sync completion path. Eventually, bios can be cancelled through this path too. Note that the cmdid isn't freed to prevent reuse. We should also abort the command in the future, but this is a good start. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Release 0.2Matthew Wilcox2011-11-04
| | | | Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Add download / activate firmware ioctlsMatthew Wilcox2011-11-04
| | | | Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Add remaining status codesMatthew Wilcox2011-11-04
| | | | Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Move sysfs entries to the right placeMatthew Wilcox2011-11-04
| | | | | | | | Because I wasn't setting driverfs_dev, the devices were showing up under /sys/devices/virtual/block. Now they appear underneath the PCI device which they belong to. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Disable the device before we write the admin queuesShane Michael Matthews2011-11-04
| | | | | | | | In case the card has been left in a partially-configured state, write 0 to the Enable bit. Signed-off-by: Shane Michael Matthews <shane.matthews@intel.com> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Request I/O regionsMatthew Wilcox2011-11-04
| | | | | | Calling pci_request_selected_regions() reserves these regions for our use. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Allow queues to be allocated above 4GBMatthew Wilcox2011-11-04
| | | | | | | Need to call dma_set_coherent_mask() to allow queues to be allocated above 4GB. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Enable device DMAMatthew Wilcox2011-11-04
| | | | | | Need to call pci_set_master() to enable device DMA Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Enable and disable the PCI deviceShane Michael Matthews2011-11-04
| | | | | | | | Call pci_enable_device_mem() at initialisation and pci_disable_device at exit. Signed-off-by: Shane Michael Matthews <shane.matthews@intel.com> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Check returns from nvme_alloc_queue()Matthew Wilcox2011-11-04
| | | | | | It can return NULL, so handle that. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Remove 'node' from nvme_devMatthew Wilcox2011-11-04
| | | | | | We don't keep a list of nvme_dev any more Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Read the model, serial & firmware rev from the controllerMatthew Wilcox2011-11-04
| | | | Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Add NVME_IOCTL_SUBMIT_IOMatthew Wilcox2011-11-04
| | | | | | Allow userspace to submit synchronous I/O like the SCSI sg interface does. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Create nvme_map_user_pages() and nvme_unmap_user_pages()Matthew Wilcox2011-11-04
| | | | | | | These are generalisations of the code that was in nvme_submit_user_admin_command(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Change NVME_IOCTL_GET_RANGE_TYPE to return all the rangesMatthew Wilcox2011-11-04
| | | | | | | | Factor out most of nvme_identify() into a new nvme_submit_user_admin_command() function. Change nvme_get_range_type() to call it and change nvme_ioctl to realise that it's getting back all 64 ranges. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Zero the command before we send itMatthew Wilcox2011-11-04
| | | | | | | Make sure there's no left-over bits set from previous commands that used this slot. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Add nvme_setup_prps()Matthew Wilcox2011-11-04
| | | | | | | Generalise the code from nvme_identify() that sets PRP1 & PRP2 so that it's usable for commands sent by nvme_submit_bio_queue(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Make nvme_common_command more featurefulMatthew Wilcox2011-11-04
| | | | | | | Add prp1, prp2 and the metadata prp to the common command, since the fields are generally used this way. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Use PRP2 for the nvme_identify ioctlMatthew Wilcox2011-11-04
| | | | | | | DMA the result straight to userspace instead of bounce-buffering in the kernel. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Fix admin IRQ claim on real hardwareMatthew Wilcox2011-11-04
| | | | | | | | The admin IRQ is supposed to use the pin-based (or single message MSI) interrupt. Accomplish this by filling in entry[0]'s vector with the INTx irq number. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Rename 'cycle' to 'phase'Matthew Wilcox2011-11-04
| | | | | | It's called the phase bit in the current draft Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Implement per-CPU queuesMatthew Wilcox2011-11-04
| | | | Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Reduce set_queue_count arguments by oneMatthew Wilcox2011-11-04
| | | | | | sq_count and cq_count are always the same, so just call it 'count'. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: Factor out queue_request_irq()Matthew Wilcox2011-11-04
| | | | | | | Two callers with an almost identical long string of arguments, and introducing a third soon. Time to factor out the commonalities. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* NVMe: New driverMatthew Wilcox2011-11-04
| | | | | | This driver is for devices that follow the NVM Express standard Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* Xen: Export xen_biovec_phys_mergeableMatthew Wilcox2011-11-04
| | | | | | | | | When Xen is enabled, using BIOVEC_PHYS_MERGEABLE in a module causes xen_biovec_phys_mergeable to be referenced, so it needs to be exported. Acked-by: Jens Axboe <axboe@kernel.dk> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
* Linux 3.1Linus Torvalds2011-10-24
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* Merge git://git.infradead.org/iommu-2.6Linus Torvalds2011-10-24
|\ | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/iommu-2.6: intel-iommu: fix superpage support in pfn_to_dma_pte() intel-iommu: set iommu_superpage on VM domains to lowest common denominator intel-iommu: fix return value of iommu_unmap() API MAINTAINERS: Update VT-d entry for drivers/pci -> drivers/iommu move intel-iommu: Export a flag indicating that the IOMMU is used for iGFX. intel-iommu: Workaround IOTLB hang on Ironlake GPU intel-iommu: Fix AB-BA lockdep report
| * intel-iommu: fix superpage support in pfn_to_dma_pte()Allen Kay2011-10-19
| | | | | | | | | | | | | | | | | | | | If target_level == 0, current code breaks out of the while-loop if SUPERPAGE bit is set. We should also break out if PTE is not present. If we don't do this, KVM calls to iommu_iova_to_phys() will cause pfn_to_dma_pte() to create mapping for 4KiB pages. Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * intel-iommu: set iommu_superpage on VM domains to lowest common denominatorAllen Kay2011-10-19
| | | | | | | | | | | | | | | | | | | | | | set dmar->iommu_superpage field to the smallest common denominator of super page sizes supported by all active VT-d engines. Initialize this field in intel_iommu_domain_init() API so intel_iommu_map() API will be able to use iommu_superpage field to determine the appropriate super page size to use. Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * intel-iommu: fix return value of iommu_unmap() APIAllen Kay2011-10-19
| | | | | | | | | | | | | | | | | | iommu_unmap() API expects IOMMU drivers to return the actual page order of the address being unmapped. Previous code was just returning page order passed in from the caller. This patch fixes this problem. Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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