| Commit message (Collapse) | Author | Age |
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This is apparently a dependency for the STi reset controller driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/drivers
Merge "mvebu drivers for v3.15" from Jason Cooper:
pull request #1:
- mvebu mbus
- use of_find_matching_node_and_match
- rtc
- use PTR_ERR_OR_ZERO in isl12057
- work around issue in mv where date returned is 2038
- kirkwood -> mach-mvebu
- various Kconfig oneliners to allow building kirkwood in -mvebu/
pull request #2:
- reset
- re-use qnap-poweroff driver for Synology NASs
* tag 'mvebu-drivers-3.15-2' of git://git.infradead.org/linux-mvebu:
Power: Reset: Generalize qnap-poweroff to work on Synology devices.
drivers: Enable building of Kirkwood drivers for mach-mvebu
rtc: mv: reset date if after year 2038
rtc: isl12057: use PTR_ERR_OR_ZERO to fix coccinelle warnings
bus: mvebu-mbus: make use of of_find_matching_node_and_match
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The Synology NAS devices use a very similar mechanism to QNAP NAS
devices to power off. Both send a single charactor command to a PIC,
over the second serial port. However the baud rate and the command
differ. Generalize the driver to support this.
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Anton Vorontsov <anton@enomsg.org>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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With the move of kirkwood into mach-mvebu, drivers Kconfig need
tweeking to allow the kirkwood specific drivers to be built.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Dates after January, 19th 2038 are badly handled by userspace due to
the time being stored on 32 bits. This causes issues on some Marvell
platform on which the RTC is initialized by default to a date that's
beyond 2038, causing a really weird behavior of the RTC.
In order to avoid that, reset the date to a sane value if the RTC is
beyond 2038.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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drivers/rtc/rtc-isl12057.c:278:1-3: WARNING: PTR_RET can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
CC: Arnaud Ebalard <arno@natisbad.org>
CC: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Instead of the of_find_matching_node()/of_match_node() pair, which requires two
iterations through the match table, make use of of_find_matching_node_and_match(),
which only iterates through the table once.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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git://git.rocketboards.org/linux-socfpga-next into next/drivers
Merge "SOCFPGA updates for 3.15 version 2" from Dinh Nguyen:
*Update SOCFPGA DTS to include ethernet, sd/mmc, and clock fixes
*Add stmmac ethernet glue layer
*Update socfpga_defconfig to include sd/mmc, and micrel_phy
* tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next:
dts: socfpga: Add sysmgr node so the gmac can use to reference
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
dts: socfpga: Update clock entry to support multiple parents
ARM: socfpga: Update socfpga_defconfig
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
net: stmmac: Add SOCFPGA glue driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit[7e0b4cd dts: socfpga: Add DTS entry for adding the stmmac glue
layer for stmmac.] references the sysmgr through its phandle. This patch
adds the appropriate sysmgr node for the gmac to use.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.
Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Finally, fix an indentation error for the sysmgr node.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>
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The periph_pll and sdram_pll can have multiple parents. Update the device tree
to list all the possible parents for the PLLs. Add an entry for the the
f2s_sdram_ref_clk, which is a possible parent for the sdram_pll.
Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this
property should be placed in dts file.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
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CONFIG_MICREL_PHY=y
CONFIG_EXT3_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: David S. Miller <davem@davemloft.net>
---
v3: Remove stray empty line at end of socfpga_cyclone5_socdk.dts
v2: Use the dwmac-sti as an example for a glue layer and split patch up
to have dts as a separate patch. Also cc dts maintainers since there is
a new binding.
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Like the STi series SOCs, Altera's SOCFPGA also needs a glue layer on top of the
Synopsys gmac IP.
This patch adds the platform driver for the glue layer which configures the IP
before the generic STMMAC driver takes over.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: David S. Miller <davem@davemloft.net>
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v3: Remove stray empty line at end of dwmac-socfpga.c.
v2: Use the dwmac-sti as an example for a glue layer and split patch up
to have dts as a separate patch. Also cc dts maintainers since there is
a new binding.
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Fourth Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:
r8a7791 (R-Car M2) SoC
* Correct SCIFA3-5 clocks
* tag 'renesas-clock4-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
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The MSTP clocks for SCIFA3-5 are MSTP1106-1108, not MSTP1105-1107
Also reinsert them at the correct position to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon
Horman:
r7s72100 (RZ/A1H) SoC
* Correct bus clock calculation
* tag 'renesas-clock3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r7s72100: fix bus clock calculation
Signed-off-by: Olof Johansson <olof@lixom.net>
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The picture in the datasheet is a little misleading, yet the divider of
the bus_clk is 1/3 and not 2/3.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:
r8a7790 (R-Car H2) SoC
- Add sound SCU clock support
r8a7791 (R-Car M2) SoC
- Remove legacy clock aliases for DT devices
* tag 'renesas-clock2-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: add sound SCU clock support
ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devices
Signed-off-by: Olof Johansson <olof@lixom.net>
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This is needed to use SRC (= Sampling Rate Converter).
MSTP1017 is defined top of MSTPxxx list to avoid runtime error,
since it is parent clock of MSTP1031 - MSTP1022
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Now that the r8a7791 DT platforms use the common clock framework,
there's no need to manually create clock aliases for devices
instantiated through DT, as those devices will reference their clocks
directly in the device tree. Remove those aliases.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman:
* r7s72100 SoC (RZ/A1H)
- Add clock for SH Ethernet
- Add RSPI clocks
* r8a7791 (R-Car M2)
- Add QSPI and SDHI clocks
* r8a7790 (R-Car H2)
- Add audio clock
- Remove legacy DT clocks
- Correct SYS DMAC clock defines
* tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove legacy r8a7790 DT clocks
ARM: shmobile: Add r8a7791 legacy SDHI clocks
ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
ARM: shmobile: r7s72100: Add clock for r7s72100-ether
ARM: shmobile: r8a7791 clock: add QSPI clocks
ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
ARM: shmobile: r7s72100 clock: Add RSPI clocks
ARM: shmobile: r8a7790: add audio clock
ARM: shmobile: r8a7778: add audio clock in new style
Signed-off-by: Olof Johansson <olof@lixom.net>
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The DT device case is handled by CCF these days, so get
rid of DT devices from the legacy clocks for r8a7790.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add legacy r8a7791 SDHI clocks. This to allow the SDHI devices
to be used by legacy Koelsch board support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This brings the implementation into line with the documentation.
This problem was introduced when SYS DMAC clock defines were added by
ac991dce6498b5fc ("ARM: shmobile: r8a7790: Add clock index macros for DT
sources") in v3.13-rc2. I do not believe this results in any problems as
these defines do not appear to be used anywhere yet.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add old/new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Current audio clock doesn't have dependency to device/driver,
but, it is not good design for DT support.
To avoid branch merge conflict issue,
it uses this load map, and this patch is 1) part.
1) add new style clock in platform
2) add new style clock method in driver
3) remove old tyle clock from platform
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge OMAP crossbar support from Tony Lindgren:
Add support for GIC crossbar that routes interrupts on newer omaps.
Looks like people wanted these merged via the omap tree as it's
the only user for the GIC crossbar.
* tag 'omap-for-v3.15/crossbar-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA: Enable Crossbar IP support for DRA7XX
ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number
DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP
DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
Signed-off-by: Olof Johansson <olof@lixom.net>
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into omap-for-v3.15/crossbar
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Enable the crossbar IP support for DRA7xx soc.
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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The wakeup gen mask/unmask callback uses the irq element of the
irq_data to setup. The irq is the linux virtual irq number and
is same as the hardware irq number only when the parent irqchip
is setup as a legacy domain. When it is used as a linear domain,
the virtual irqs are allocated dynamically and wakeup gen code
cannot rely on these numbers to access the irq registers. Instead
use the hwirq element of the irq_data which represent the physical
irq number.
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the
interrupt lines from the subsystems are not needed at the same
time, so they have to be muxed to the irq-controller appropriately.
In such places a interrupt controllers are preceded by an CROSSBAR
that provides flexibility in muxing the device requests to the controller
inputs.
This driver takes care a allocating a free irq and then configuring the
crossbar IP as a part of the mpu's irqchip callbacks. crossbar_init should
be called right before the irqchip_init, so that it is setup to handle the
irqchip callbacks.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Kumar Gala <galak@codeaurora.org> (for DT binding portion)
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input line.
The DT entries for peripherals provides the fixed crossbar input line
as its interrupt number and the mapping code should associate this with
a free gic input line. This patch adds the support inside the gic irqchip
to handle such routable irqs. The routable irqs are registered in a linear
domain. The registered routable domain's callback should be implemented
to get a free irq and to configure the IP to route it.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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into next/drivers
mvebu watchdog driver changes for v3.15 (incremental #2)
- remove warnings by using %pa for phys_addr_t
* tag 'mvebu-watchdog-3.15-2' of git://git.infradead.org/linux-mvebu:
watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
Signed-off-by: Olof Johansson <olof@lixom.net>
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When building an ARM multi_v7_defconfig with LPAE option selected we get the
following build warning:
drivers/watchdog/orion_wdt.c:272:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'phys_addr_t' [-Wformat=]
Fix it by using %pa to print 'phys_addr_t'.
Reported-by: Olof's autobuilder <build@lixom.net>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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into next/drivers
Merge "ARM: mach-bcm: bcm281xx clock driver" from Matt Porter:
This pull request contains the Broadcom bcm281xx
clock driver series. This series is being merged
through the arm-soc tree because there is an
ordering dependency where the driver *must* be
merged before the related dts changes. This is
a result of the bcm281xx dts already containing
dummy fixed clock nodes that must be updated.
* tag 'armsoc/for-3.15/drivers' of git://github.com/broadcom/mach-bcm:
clk: bcm281xx: don't disable unused peripheral clocks
clk: bcm281xx: add initial clock framework support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the CLK_IGNORE_UNUSED flag when setting up a peripheral clock.
This prevents unused clocks from getting disabled, and by doing
this we can use the common clock code even before we've resolved
all the spots that need to get a reference to their clock.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
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Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)
A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.
If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.
The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)
The source code is divided into three general portions:
drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).
drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.
drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.
include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
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The event numbering changed between revision r0 and r1 of the CCI
PMU. Expose this to userspace to allow tooling to handle the
differences in event numbers.
Suggested-by: Drew Richardson <Drew.Richardson@arm.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The driver queries the CCI IP revision to distinguish between r0 and r1
scheme for event numbers and currently supports upto version r1p2. To
minimise code churn every time there's a new version of the IP, assume
that event numbering doesn't change for revisions > r1p0 (which is
the case).
The driver will still need an update for future revisions that change
the event numbers.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/drivers
Merge "qcom driver changes for v3.15" from Kumar Gala:
We've split Qualcomm MSM support into legacy and multiplatform. These
drivers are only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
* tag 'qcom-drivers-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
gpio: msm: switch Kconfig to ARCH_QCOM depends
hwrng: msm: switch Kconfig to ARCH_QCOM depends
power: reset: msm - switch Kconfig to ARCH_QCOM depends
drm/msm: drop ARCH_MSM Kconfig depend
tty: serial: msm: Enable building msm_serial for ARCH_QCOM
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We've split Qualcomm MSM support into legacy and multiplatform. The gpio
msm-v2 driver is only relevant on the multiplatform supported SoCs so
switch the Kconfig depends to ARCH_QCOM.
CC: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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We've split Qualcomm MSM support into legacy and multiplatform. The RNG
driver is only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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We've split Qualcomm MSM support into legacy and multiplatform. The reset
driver is only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
Acked-by: Dmitry Eremin-Solenikov
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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The ARCH_MSM depend is redundant with ARCH_MSM8960, so we can remove it.
Additionally, we are splitting Qualcomm MSM support into legacy (ARCH_MSM)
and multiplatform (ARCH_QCOM). The MSM8960 with be ARCH_QCOM going forward
so dropping ARCH_MSM will work properly for the new ARCH_QCOM multiplatform
build.
Acked-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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We've split Qualcomm MSM support into legacy and multiplatform. So add
the ability to build the serial driver on the newer ARCH_QCOM
multiplatform.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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