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* powerpc: Remove swiotlb_pci_dma_opsFUJITA Tomonori2009-08-28
| | | | | | | | | Now swiotlb_pci_dma_ops is identical to swiotlb_dma_ops; we can use swiotlb_dma_ops with any devices. This removes swiotlb_pci_dma_ops. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Remove addr_needs_map in struct dma_mapping_opsFUJITA Tomonori2009-08-28
| | | | | | | | | | | | | | | | This patch adds max_direct_dma_addr to struct dev_archdata to remove addr_needs_map in struct dma_mapping_ops. It also converts dma_capable() to use max_direct_dma_addr. max_direct_dma_addr is initialized in pci_dma_dev_setup_swiotlb(), called via ppc_md.pci_dma_dev_setup hook. For further information: http://marc.info/?t=124719060200001&r=1&w=2 Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge commit 'tip/iommu-for-powerpc' into nextBenjamin Herrenschmidt2009-08-28
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| * lib/swiotlb.c: Fix strange panic message selection logic when swiotlb fills upCasey Dahlin2009-08-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | swiotlb_full() in lib/swiotlb.c throws one of two panic messages based on whether the direction of transfer is from the device or to the device. The logic around this is somewhat weird in the case of bidirectional transfers. It appears to want to throw both in succession, but since its a panic only the first makes it. This patch adds a third, separate error for DMA_BIDIRECTIONAL to make things a bit clearer. Signed-off-by: Casey Dahlin <cdahlin@redhat.com> Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Becky Bruce <beckyb@kernel.crashing.org> [ further fixed the error message ] Signed-off-by: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <200908202327.n7KNRuqK001504@imap1.linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Add CONFIG_DMA_API_DEBUG supportFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All we need to do for CONFIG_DMA_API_DEBUG support is call dma_debug_init() in DMA code common for SPARC32 and SPARC64. Now SPARC32 uses two dma_map_ops structures for pci and sbus so there is not much dma stuff for SPARC32 in kernel/dma.c. kernel/ioport.c also includes dma stuff for SPARC32. So let's put all the dma stuff for SPARC32 in kernel/ioport.c and make kernel/dma.c common for SPARC32 and SPARC64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-9-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use asm-generic/pci-dma-compatFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Replace sbus_map_single and sbus_unmap_single with sbus_map_page and ↵FUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sbus_unmap_page This is a preparation for using asm-generic/pci-dma-compat.h; SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-7-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Remove no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpuFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now sparc uses include/asm-generic/dma-mapping-common.h. pci_sun4v.c doesn't need to have no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpu (dma-mapping-common.h does nothing if sync_{single|sg}_for_cpu hook is not defined). So we can remove them safely. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-6-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use asm-generic/dma-mapping-common.hFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-5-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * sparc: Use dma_map_ops structFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-4-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * IA64: Remove NULL flush_write_buffersFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | flush_write_buffers() in dma-mapping-common.h was removed so we can remove NULL flush_write_buffers() in IA64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: davem@davemloft.net LKML-Reference: <1249872797-1314-3-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * dma-ops: Remove flush_write_buffers() in dma-mapping-common.hArnd Bergmann2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The purpose of this patch is that, we can avoid defining NULL flush_write_buffers() on IA64 and SPARC. dma-mapping-common.h is used by X86 and IA64 (and SPARC soon) but only X86 with CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE actually uses flush_write_buffers(). CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE is usable with only kernel/pci-nommu.c (that is, not usable with other X86 IOMMU implementations such as SWIOTLB, VT-d, etc) so we can safely move flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The further discussion is: http://lkml.org/lkml/2009/6/28/104 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: davem@davemloft.net Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-2-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: remove unused swiotlb_phys_to_bus() and swiotlb_bus_to_phys()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | phys_to_dma() and dma_to_phys() are used instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * powerpc: remove unused swiotlb_phys_to_bus() and swiotlb_bus_to_phys()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | phys_to_dma() and dma_to_phys() are used instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: use phys_to_dma and dma_to_physFUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | | | This converts swiotlb to use phys_to_dma and dma_to_phys instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). swiotlb_phys_to_bus() and swiotlb_bus_to_phys() are not necessary so this patch also removes them. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * x86, IA64, powerpc: add phys_to_dma() and dma_to_phys()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | This adds two functions, phys_to_dma() and dma_to_phys() to x86, IA64 and powerpc. swiotlb uses them. phys_to_dma() converts a physical address to a dma address. dma_to_phys() does the opposite. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * remove is_buffer_dma_capable()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | | | is_buffer_dma_capable() was replaced with dma_capable(). is_buffer_dma_capable() tells if a buffer is dma-capable or not. However, it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * powerpc: remove unncesary swiotlb_arch_address_needs_mappingFUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | swiotlb doesn't use swiotlb_arch_address_needs_mapping(); it uses dma_capalbe(). We can remove unnecessary swiotlb_arch_address_needs_mapping(). We can remove swiotlb_addr_needs_map() and is_buffer_dma_capable() in swiotlb_pci_addr_needs_map() too; dma_capable() handles the features that both provide. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: use dma_capable()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | This converts swiotlb to use dma_capable() instead of swiotlb_arch_address_needs_mapping() and is_buffer_dma_capable(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * powerpc: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * ia64: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * x86: replace is_buffer_dma_capable() with dma_capableFUJITA Tomonori2009-07-28
| | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * x86: add dma_capable() to replace is_buffer_dma_capable()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | dma_capable() eventually replaces is_buffer_dma_capable(), which tells if a memory area is dma-capable or not. The problem of is_buffer_dma_capable() is that it doesn't take a pointer to struct device so it doesn't work for POWERPC. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
| * swiotlb: remove unnecessary swiotlb_bus_to_virtFUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | swiotlb_bus_to_virt is unncessary; we can use swiotlb_bus_to_phys and phys_to_virt instead. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove swiotlb_arch_range_needs_mappingFUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | Nobody uses swiotlb_arch_range_needs_mapping(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove unused swiotlb_alloc()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | Nobody uses swiotlb_alloc(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
| * swiotlb: remove unused swiotlb_alloc_boot()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | Nobody uses swiotlb_alloc_boot(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
* | Merge commit 'kumar/next' into nextBenjamin Herrenschmidt2009-08-26
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| * | powerpc/qe_lib: Set gpio data before changing the direction to outputMichael Barkowski2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids having a short glitch if the desired initial value is not the same as what was previously in the data register. Signed-off-by: Michael Barkowski <michaelbarkowski@ruggedcom.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add QE USB support for MPC8569E-MDS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add gpio-controller node for BCSR17, it is used to control USB speed and VBUS; - Add timer node for QE GTM, needed for USB host; - Add usb node itself; - Add some probing code for BCSR GPIOs. NOTE: QE USB doesn't work on prototype boards, but should work on pilot boards if specs and schematics are correct, though we don't have the pilot boards to actually test it. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/82xx: Add CPM USB Gadget support for MPC8272ADS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add usb node; - Configure pins and clocks; - Enable USB function in BCSR. The support was successfully tested using serial and ethernet gadget drivers. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/82xx: Fix BCSR bits for MPC8272ADS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpc8272_ads.c is using BCSR bits definitions from pq2ads.h, but according to User's Guide the bits are wrong for MPC8272ADS boards (I guess definitions from pq2ads should only be used for PQ2FADS boards). So, let's introduce our own definitions for MPC8272ADS, and don't include pq2ads.h. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add eSDHC support for MPC8536DS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simply adds sdhci node to the device tree. We specify clock-frequency manually, so that eSDHC will work without upgrading U-Boot. Though, that'll only work for default setup (1500 MHz) on new board revisions. For non-default setups, it's recommended to upgrade U-Boot, since it will fixup clock-frequency automatically. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities blockPaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0 in the GUTS. The generic reboot code uses this tag to determine if it should be using the RSTCR for reboot, so remove it from the board definition. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: issue fsl_soc reboot warning only when applicablePaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPU, like the MPC8560 don't have a RSTCR in the Global Utilities Block. These boards will implement their own reboot call, and not use this code, so we should only warn about the absence of the GUTS RSTCR when the default reboot code is used. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: sbc8560 - Fix warm reboot with board specific reset functionLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing fsl_rstcr_restart function is not applicable to the mpc8560. The Global Utilities Block on this earlier CPU doesn't have the control/reset register at 0xe00b0. This implements a board specific reset function that uses the RCR(Reset Control Register) of the sbc8560's EPLD to do a reset. Signed-off-by: Liang Li <Liang.Li@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/83xx: sbc8349 - update defconfig, enable MTD, USB storagePaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With flash partition entries in the DTS file, MTD might as well be enabled in the defconfig. In a similar vein, enable USB and enough related options (SCSI/ext2/ext3) so that a user can read and write to a generic USB flash drive as well. Also, this board only has the two default SOC UARTs, so adjust the UART config accordingly. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTSLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows interrupts to occur on the sbc834x. Currently PCI devices get assigned an incorrect IRQ and so the interrupt count never increases. This was tested with the 82546GB based dual port E1000 PCI-X NIC which uses two distinct IRQ lines on the one card. root@localhost:/root> cat /proc/interrupts | grep eth 17: 78 IPIC Level eth1 48: 27121 IPIC Level eth0 Signed-off-by: Liang Li <liang.li@windriver.com> Signed-off-by: Yang Shi <yang.shi@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/83xx: Add localbus node and MTD partitions for SBC834xLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is 8MB flash, 8kB EEPROM and 128MB SDRAM on the sbc834x local bus, so add a localbus node in DTS with MTD partitions. The recent U-boot commit fe613cdd4eb moves u-boot to the beginning of flash, hence the legacy label on the partition at the end of flash. Signed-off-by: Liang Li <liang.li@windriver.com> Signed-off-by: Yang Shi <yang.shi@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/83xx: Remove second USB node from SBC834x DTSLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since only one of the SoC USB devices is brought out to a physical connector on the board, remove the 2nd (USB-DR) node from the DTS. Having it present and USB enabled will cause a hang at boot. Signed-off-by: Liang Li <liang.li@windriver.com> Signed-off-by: Yang Shi <yang.shi@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the P2020RDB reference board from Freescale. Overview of P2020RDB platform - DDR DDR2 1G - NOR Flash 16MByte - NAND Flash 32MByte - 3 Ethernet interfaces 1) etSEC1 - RGMII - connected to a 5 port Vitesse Switch(VSC7385) - Switch is memory mapped through eLBC interface(CS#2) - IRQ1 2) etSEC2 - SGMII - connected to VSC8221 - IRQ2 3) etSEC3 - RGMII - connected to VSC8641 - IRQ3 - 2 1X PCIe interfaces - SD/MMC ,USB - SPI EEPROM - Serial I2C EEPROM Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/booke: Move MMUCSR definition into mmu-book3e.hKumar Gala2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | The MMUCSR is now defined as part of the Book-3E architecture so we can move it into mmu-book3e.h and add some of the additional bits defined by the architecture specs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/82xx: mgcoge - updated defconfigHeiko Schocher2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | - add I2C support - add FCC1 and FCC2 support Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | powerpc/pseries: Reduce the polling interval in __cpu_up()Gautham R Shenoy2009-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Time time taken for a single cpu online operation on a pseries machine is as follows: Dedicated LPAR (POWER6): ~220ms. Shared LPAR (POWER5) : ~240ms. Of this time, approximately 200ms is taken up by __cpu_up(). This is because we poll every 200ms to check if the new cpu has notified it's presence through the cpu_callin_map. We repeat this operation until the new cpu sets the value in cpu_callin_map or 5 seconds elapse, whichever comes earlier. However, using completion_structs instead of polling loops, the time taken by the new processor to indicate it's presence has found to be less than 1ms on pseries. This method however may not work on all powerpc platforms due to the time-base synchronization code. Keeping this in mind, we could reduce msleep polling interval from 200ms to 1ms while retaining the 5 second timeout. With this, the time taken for a cpu online operation changes as follows: Dedicated LPAR (POWER6): 20-25ms. Shared LPAR (POWER5) : 60-80ms. In both these cases, it was found that the code polls through the loop only once indicating that 1ms is a reasonable value, atleast on pseries. The code needs testing on other powerpc platforms. Signed-off-by: Gautham R Shenoy <ego@in.ibm.com> Acked-by: Joel Schopp <jschopp@austin.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc: Remove SMP warning from PowerMac cpufreqBastian Blank2009-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Thu, Aug 13, 2009 at 04:14:58PM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2009-08-11 at 11:39 +0200, Bastian Blank wrote: > > This patch just disables this driver on SMP kernels, as it is obviously > > not supported. > Why not remove the #error instead ? :-) I don't think it's still > meaningful, especially since we use the timebase for delays nowadays > which doesn't depend on the CPU frequency... Your call. Take this one: The build of a PowerMac 32bit kernel currently fails with error: #warning "WARNING, CPUFREQ not recommended on SMP kernels" Thie patch removes the not longer applicable SMP warning from the PowerMac cpufreq code. Signed-off-by: Bastian Blank <waldi@debian.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc: Fix __flush_icache_range on 44xJosh Boyer2009-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ptrace POKETEXT interface allows a process to modify the text pages of a child process being ptraced, usually to insert breakpoints via trap instructions. The kernel eventually calls copy_to_user_page, which in turn calls __flush_icache_range to invalidate the icache lines for the child process. However, this function does not work on 44x due to the icache being virtually indexed. This was noticed by a breakpoint being triggered after it had been cleared by ltrace on a 440EPx board. The convenient solution is to do a flash invalidate of the icache in the __flush_icache_range function. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc/mm: Cleanup handling of execute permissionBenjamin Herrenschmidt2009-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an attempt at cleaning up a bit the way we handle execute permission on powerpc. _PAGE_HWEXEC is gone, _PAGE_EXEC is now only defined by CPUs that can do something with it, and the myriad of #ifdef's in the I$/D$ coherency code is reduced to 2 cases that hopefully should cover everything. The logic on BookE is a little bit different than what it was though not by much. Since now, _PAGE_EXEC will be set by the generic code for executable pages, we need to filter out if they are unclean and recover it. However, I don't expect the code to be more bloated than it already was in that area due to that change. I could boast that this brings proper enforcing of per-page execute permissions to all BookE and 40x but in fact, we've had that now for some time as a side effect of my previous rework in that area (and I didn't even know it :-) We would only enable execute permission if the page was cache clean and we would only cache clean it if we took and exec fault. Since we now enforce that the later only work if VM_EXEC is part of the VMA flags, we de-fact already enforce per-page execute permissions... Unless I missed something Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | Merge commit 'origin/master' into nextBenjamin Herrenschmidt2009-08-26
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| * | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6Linus Torvalds2009-08-26
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: irda/sa1100_ir: fix broken netdev_ops conversion irda/au1k_ir: fix broken netdev_ops conversion pkt_sched: Fix bogon in tasklet_hrtimer changes.
| | * | irda/sa1100_ir: fix broken netdev_ops conversionAlexander Beregalov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is based on commit d2f3ad4 (pxaficp-ir: remove incorrect net_device_ops). Do the same for sa1100_ir. Untested. Signed-off-by: Alexander Beregalov <a.beregalov@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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