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* [POWERPC] re-enable OProfile for iSeries, using timer interruptKelly Daly2006-06-21
| | | | | | | | | | | This patch removes the changes from an earlier patch that disables oProfile for iSeries within the oProfile KConfig (submitted Feb 23, 2006). Checks within the arch init for iSeries, still allowing profiling for timer interrupts (using firmware_has_feature). Signed-off-by: Kelly Daly <kelly@au.ibm.com> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] support ibm,extended-*-frequency propertiesAnton Blanchard2006-06-21
| | | | | | | | | | | | | | | | | Support the ibm,extended-*-frequency properties found in recent POWER5 firmware: cpus/PowerPC,POWER5@0/clock-frequency 59aa5880 (1504336000) cpus/PowerPC,POWER5@0/ibm,extended-clock-frequency 00000000 59aa5880 cpus/PowerPC,POWER5@0/timebase-frequency 0b354b10 (188042000) cpus/PowerPC,POWER5@0/ibm,extended-timebase-frequency 00000000 0b354b10 Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Extra sanity check in EEH codeNathan Lynch2006-06-21
| | | | | | | | | | Don't dereference a device node that isn't there. A "shouldn't happen" case, but someone ran into it with a possibly misconfigured device tree. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Dont look for class-code in pci childrenAnton Blanchard2006-06-21
| | | | | | | | | Looking for class-code in PCI children breaks with direct slots. Lets just count all children. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix mdelay badness on shared processor partitionsAnton Blanchard2006-06-21
| | | | | | | | | | | | | | | | | | | | On partitioned PPC64 systems where a partition is given 1/10 of a processor, we have seen mdelay() delaying for 10 times longer than it should. The reason is that the generic mdelay(n) does n delays of 1 millisecond each. However, with 1/10 of a processor, we only get a one-millisecond timeslice every 10ms. Thus each 1 millisecond delay loop ends up taking 10ms elapsed time. The solution is just to use the PPC64 udelay function, which uses the timebase to ensure that the delay is based on elapsed time rather than how much processing time the partition has been given. (Yes, the generic mdelay uses the PPC64 udelay, but the problem is that the start time gets reset every millisecond, and each time it gets reset we lose another 9ms.) Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Andrew Morton <akpm@osdl.org>
* [POWERPC] disable floating point exceptions for initArnd Bergmann2006-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Floating point exceptions should not be enabled by default, as this setting impacts the performance on some CPUs, in particular the Cell BE. Since the bits are inherited from parent processes, the place to change the default is the thread struct used for init. glibc sets this up correctly per thread in its fesetenv function, so user space should not be impacted by this setting. None of the other common libc implementations (uClibc, dietlibc, newlib, klibc) has support for fp exceptions, so they are unlikely to be hit by this either. There is a small risk that somebody wrote their own application that manually sets the fpscr bits instead of calling fesetenv, without changing the MSR bits as well. Those programs will break with this change. It probably makes sense to change glibc in the future to be more clever about FE bits, so that when running on a CPU where this is expensive, it disables exceptions ASAP, while it keeps them enabled on CPUs where running with exceptions on is cheaper than changing the state often. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Unify ppc syscall tablesAndreas Schwab2006-06-21
| | | | | | | | | Avoid duplication of the syscall table for the cell platform. Based on an idea from David Woodhouse. Signed-off-by: Andreas Schwab <schwab@suse.de> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] mpic: add support for serial mode interruptsMark A. Greer2006-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote: > On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote: > > MPC10x-style interrupt controllers have a serial mode that allows > > several interrupts to be clocked in through one INT signal. > > > > This patch adds the software support for that mode. > > You hard code the clock ratio... why not add a separate call to be > called after mpic_init, > something like mpic_set_serial_int(int mpic, int enable, int > clock_ratio) ? How's this? -- MPC10x-style interrupt controllers have a serial mode that allows several interrupts to be clocked in through one INT signal. This patch adds the software support for that mode. Signed-off-by: Mark A. Greer <mgreer@mvista.com> -- arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++ include/asm-powerpc/mpic.h | 10 ++++++++++ 2 files changed, 30 insertions(+) -- Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] pseries: Print PCI slot location code on failureLinas Vepstas2006-06-21
| | | | | | | | | The PCI error recovery code will printk diagnostic info when a PCI error event occurs. Change the messages to include the slot location code, which is how most sysadmins will know the device. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: one more fix for 64k pagesarnd@arndb.de2006-06-21
| | | | | | | | | | | | | | | | | | | | | The SPU context save/restore code is currently built for a 4k page size and we provide a _shipped version of it since most people don't have the spu toolchain that is needed to rebuild that code. This patch hardcodes the data structures to a 64k page alignment, which also guarantees 4k alignment but unfortunately wastes 60k of memory per SPU context that is created in the running system. We will follow up on this with another patch to reduce that overhead or maybe redo the context save/restore logic to do this part entirely different, but for now it should make experimental systems work with either page size. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: fail spu_create with invalid flagsarnd@arndb.de2006-06-21
| | | | | | | | | At this time, all flags are invalid. Since we are planning to actually add valid flags in the future, we better check if any were passed by the user. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: clear class2 interrupt status before wakeupMasato Noguchi2006-06-21
| | | | | | | | | | | | | | | | | | | | | | SPU interrupt status must be cleared before handle it. Otherwise, kernel may drop some interrupt packet. Currently, class2 interrupt treated like: 1) call callback to wake up waiting process 2) mask raised mailbox interrupt 3) clear interrupt status I changed like: 1) mask raised mailbox interrupt 2) clear interrupt status 3) call callback to wake up waiting process Clearing status before masking will make spurious interrupt. Thus, it is necessary to hold by steps I described above, I think. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: fix Makefile for "make clean"Masato Noguchi2006-06-21
| | | | | | | | added spu_{save,restore}_dump.h to target of 'make clean' Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: remove stop_code from struct spuMasato Noguchi2006-06-21
| | | | | | | | | | This patch remove 'stop_code' -- discarded member of struct spu. It is written at initialize and interrupt, but never read in current implementation. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: fix spu irq affinity settingGeoff Levand2006-06-21
| | | | | | | | | | | | | | | This changes the hypervisor abstraction of setting cpu affinity to a higher level to avoid platform dependent interrupt controller routines. I replaced spu_priv1_ops:spu_int_route_set() with a new routine spu_priv1_ops:spu_cpu_affinity_set(). As a by-product, this change eliminated what looked like an existing bug in the set affinity code where spu_int_route_set() mistakenly called int_stat_get(). Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: further abstract priv1 register accessGeoff Levand2006-06-21
| | | | | | | | | | | | | | | To support muti-platform binaries the spu hypervisor accessor routines must have runtime binding. I removed the existing statically linked routines in spu.h and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h that operate indirectly through an ops struct spu_priv1_ops. spu_priv1_mmio.c contains the instance of the accessor routines for running on raw hardware. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: split the Cell BE support into generic and platform ↵Geoff Levand2006-06-21
| | | | | | | | | | | | | | | | | | dependant parts Creates new config variables PPC_CELL_NATIVE and PPC_IBM_CELL_BLADE. The existing CONFIG_PPC_CELL is now used to denote the generic Cell processor support. PPC_CELL = make descends into platforms/cell PPC_CELL_NATIVE = add bare metal support PPC_IBM_CELL_BLADE = add blade device drivers, etc. Also renames spu_priv1.c to spu_priv1_mmio.c. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: dont try to access SPE channel 1 countarnd@arndb.de2006-06-21
| | | | | | | | | | | | | | | The save/restore sequence for SPE contexts currently attempts to save and restore the channel count for SPE channel 1 (the SPU_WriteEventMask channel. But the CBE architecture (section 9.11.2) clearly states that this channel does not have an associated count. Hardware simply ignores the attempt to write this count, but the simulator generates a warning message. WARNING: 279721590: SPE7: Attempt to write channel count for CH 1 with no associated count is ignored. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: use kzalloc in create_spuJeremy Kerr2006-06-21
| | | | | | | | | Clean up create_spu() a little by using kzalloc instead of kmalloc + assignments. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: fix initial state of wbox filearnd@arndb.de2006-06-21
| | | | | | | | | | The wbox channel count of an spu is now initialized to four for the saved context. This makes it possible to write to the mailbox right away without waiting for the SPE to become scheduled first. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: add a phys-id attribute to each SPU contextarnd@arndb.de2006-06-21
| | | | | | | | | | | | | | | | | For performance analysis, it is often interesting to know which physical SPE a thread is currently running on, and, more importantly, if it is running at all. This patch adds a simple attribute to each SPU directory with that information. The attribute is read-only and called 'phys-id'. It contains an ascii string with the number of the physical SPU (e.g. "0x5"), or alternatively the string "0xffffffff" (32 bit -1) when it is not running at all at the time that the file is read. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: set up correct SLB entries for 64k pagesarnd@arndb.de2006-06-21
| | | | | | | | | spufs currently knows only 4k pages and 16M hugetlb pages. Make it use the regular methods for deciding on the SLB bits. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: fix deadlock in spu_create error pathMichael Ellerman2006-06-21
| | | | | | | | | | | spufs_rmdir tries to acquire the spufs root i_mutex, which is already held by spufs_create_thread. This was tracked as Bug #H9512. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: restore mapping of mssync registerarnd@arndb.de2006-06-21
| | | | | | | | | | | A recent change to the way that the mfc file gets mapped made it impossible to map the SPE Multi-Source Synchronization register into user space, but that may be needed by some applications. This restores the missing functionality. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: always build spu base into the kernelarnd@arndb.de2006-06-21
| | | | | | | | | | The spu_base module is rather deeply intermixed with the core kernel, so it makes sense to have that built-in. This will let us extend the base in the future without having to export more core symbols just for it. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: register SPUs as sysdevsJeremy Kerr2006-06-21
| | | | | | | | | | | SPUs are registered as system devices, exposing attributes through sysfs. Since the sysdev includes a kref, we can remove the one in struct spu (it isn't used at the moment anyway). Currently only the interrupt source and numa node attributes are added. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: update defconfigarnd@arndb.de2006-06-21
| | | | | | | | Enable some of the most requested features in defconfig and refresh with the latest powerpc.git Kconfig files. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: fix interrupt priority handlingarnd@arndb.de2006-06-21
| | | | | | | | | Checking the priority field to test for irq validity is completely bogus and breaks with future external interrupt controllers. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: add RAS supportBenjamin Herrenschmidt2006-06-21
| | | | | | | | | | | | | | | | | This is a first version of support for the Cell BE "Reliability, Availability and Serviceability" features. It doesn't yet handle some of the RAS interrupts (the ones described in iic_is/iic_irr), I'm still working on a proper way to expose these. They are essentially a cascaded controller by themselves (sic !) though I may just handle them locally to the iic driver. I need also to sync with David Erb on the way he hooked in the performance monitor interrupt. So that's all for 2.6.17 and I'll do more work on that with my rework of the powerpc interrupt layer that I'm hacking on at the moment. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add Vitesse 8244 PHY for MPC8641 HPCN platform.Jon Loeliger2006-06-21
| | | | | | | | Signed-off-by: Kriston Carson <KristonCarson@freescale.com> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Document I2C_MPC option for 86xx too.Jon Loeliger2006-06-21
| | | | | | | The same I2C driver found on 85xx, etc., can be used for 86xx too. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add 8641 Register space and IRQ definitions.Jon Loeliger2006-06-21
| | | | | | | Signed-off-by: Jeff Brown <Jeff.Brown@freescale.com> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add mpc8641hpcn PCI/PCI-Express platform files.Jon Loeliger2006-06-21
| | | | | | | | Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add the MPC8641 HPCN platform files.Jon Loeliger2006-06-21
| | | | | | | | Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add starting of secondary 86xx CPUs.Jon Loeliger2006-06-21
| | | | | | | | | | Clear the high BATS during load_up_mmu if FTR_HAS_HIGH_BATS. Allow just a bit more time for secondary CPUs to phone home. Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add 8641 CPU table entry.Jon Loeliger2006-06-21
| | | | | | | Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add mpc8641_hpcn_defconfig config file.Jon Loeliger2006-06-21
| | | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add the mpc8641 hpcn Kconfig and Makefiles.Jon Loeliger2006-06-21
| | | | | | Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Prevent duplicate lmb reservations for Device Tree blob.Jon Loeliger2006-06-21
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Guard L3CR references with CPU_FTR_L3CR.Jon Loeliger2006-06-21
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] RTAS delay, fix module build breaksJohn Rose2006-06-21
| | | | | | | | Export both news RTAS delay functions, and change the scanlog module to use the new delay functions. Signed-off-by: John Rose <johnrose@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] ppc32: fix CPCI405 board supportMatthias Fuchs2006-06-15
| | | | | | | | | | | | | | | | | | Hi, this patch brings the CPCI405 board support up to date and fixes several outstanding issues: -add bios_fixup() -enable RTC only when CONFIG_GEN_RTC defined -corrected CompactPCI interrupt map -added cpci405_early_serial_map for correct UART clocking -removed unused code Matthias Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] make pmf irq_client functions safe against pmf interrupts coming inJohannes Berg2006-06-15
| | | | | | | | This fixes the pmf irq_client functions to be safe against pmf interrupts coming in while a client is registered/unregistered. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] check firmware state before suspendingDave C Boutcher2006-06-15
| | | | | | | | | | Currently the kernel blindly halts all the processors and calls the ibm,suspend-me rtas call. If the firmware is not in the correct state, we then re-start all the processors and return. It is much smarter to first check the firmware state, and only if it is waiting, call the ibm,suspend-me call. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix builtin command line interaction with firmwareAmos Waterland2006-06-15
| | | | | | | | | | | | | It seems that prom_init's early_cmdline_parse is broken on at least Apple 970 xserves and IBM JS20 blades with SLOF. The firmware of these machines returns -1 and 1 respectively when getprop is called for the bootargs property of /chosen, causing Linux to ignore its builtin command line in favor of a null string. This patch makes Linux use its builtin command line if getprop returns an error or a null string. Signed-off-by: Amos Waterland <apw@us.ibm.com> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] update pmac32_defconfigAnton Blanchard2006-06-15
| | | | | | | | | | | | | | | | | | | | | | | Some updates to the pmac32_defconfig to make it more useful: - Enable LSF (large single files) since we enable LBD (large block devices) - Enable IPSEC related options - Enable remaining raid/dm options as modules - Disable eth1394, I doubt any has that hardware and it has a nasty habit of auto loading first and skewing network device numbering - Enable dummy and tun as modules, always useful to have them around - Enable EHCI, no wonder my usb2 disk was so slow - Enable USB storage - Enable ext3 acls - Disable autofs and enable autofsv4 instead - Enable nfs v3/v4 client and server. Dont want to be left in the dark ages of pre v3 - Enable all crypto as modules, things like cryptsetup want some of them I havent enabled the BCM43xx, perhaps we should now? Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] system call micro optimisationAnton Blanchard2006-06-15
| | | | | | | | | | | | In the syscall path we currently have: crclr so mfcr r9 If we shift the crclr up we can avoid a stall on some CPUs. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix HV bit handling on non partitioned machinesAnton Blanchard2006-06-15
| | | | | | | | | On non partitioned machines we currently set the HV bit in kernel space only. It turns out we are supposed to maintain the HV bit in both user and kernel space. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cleanup dma_mapping_opsAnton Blanchard2006-06-15
| | | | | | | | | For pseries IOMMU bypass I want to be able to fall back to the regular IOMMU ops. Do this by creating a dma_mapping_ops struct, and convert the others while at it. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] node local IOMMU tablesAnton Blanchard2006-06-15
| | | | | | | | Allocate IOMMU tables local to the relevant node. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 21:27:17 -0500