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| * powerpc/mpc5200: fix error paths in PSC UART probe functionWolfram Sang2008-12-21
| | | | | | | | | | | | | | | | - error cases for mapbase and irq were unbundled - mapped irq now gets disposed on error Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: add rts/cts handling in PSC UART driverWolfram Sang2008-12-21
| | | | | | | | | | | | | | | | Add RTS/CTS-support for the PSC of the MPC5200B. Tested with a Phytec MPC5200B-IO. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Make PSC UART driver update serial errors countersRené Bürgel2008-12-21
| | | | | | | | | | | | | | | | | | This patch adds the capability to the mpc52xx-uart to report framing errors, parity errors, breaks and overruns to userspace. These values may be requested in userspace by using the ioctl TIOCGICOUNT. Signed-off-by: René Bürgel <r.buergel@unicontrol.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Remove obsolete code from mpc5200 MDIO driverWolfram Sang2008-12-21
| | | | | | | | | | | | | | | | | | As this driver polls for a complete MDIO transaction, there is no need to enable interrupts for it. Furthermore, make both checks for freeing MDIO-bus irqs consistent. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Add MDMA/UDMA support to MPC5200 ATA driverTim Yamin2008-12-21
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds MDMA/UDMA support using BestComm for DMA on the MPC5200 platform. Based heavily on previous work by Freescale (Bernard Kuhn, John Rigby) and Domen Puncer. With this patch, a SanDisk Extreme IV CF card gets read speeds of approximately 26.70 MB/sec. Signed-off-by: Tim Yamin <plasm@roo.me.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Disable bestcomm prefetching when ATA DMA enabledGrant Likely2008-12-21
| | | | | | | | | | | | | | | | When ATA DMA is enabled, bestcomm prefetching does not work. This patch adds a function to disable bestcomm prefetch when the ATA Bestcomm task is initialized. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Bestcomm fixes to ATA supportTim Yamin2008-12-21
| | | | | | | | | | | | | | | | | | | | | | | | | | 1) ata.h has dst_pa in the wrong place (needs to match what the BestComm task microcode in bcom_ata_task.c expects); fix it. 2) The BestComm ATA task priority was changed to maximum in bestcomm_priv.h; this fixes a deadlock issue experienced with heavy DMA occurring on both the ATA and Ethernet BestComm tasks, e.g. when downloading a large file over a LAN to disk. Signed-off-by: Tim Yamin <plasm@roo.me.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Bugfix on handling variable sized buffer descriptorsGrant Likely2008-12-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buffer descriptors for the ATA BestComm task are larger than the current definition for bcom_bd. This causes problems because the various bcom_... functions dereference the buffer descriptor pointer by using the array operator which doesn't work when the buffer descriptors are a different size. This patch adds the bcom_get_bd() function which uses the value in bcom_task.bd_size to calculate the offset into the BD table. This patch also changes the definition of bcom_bd to specify a data size of 0 instead of 1 so that it will never work if anyone attempts to dereference the bd list as an array (as opposed to something that might work even though it is wrong). Finally, this patch moves the definition of bcom_bd up in the file to eliminate a forward declaration. Based on patch originally written by Tim Yamin. Signed-off-by: Tim Yamin <plasm@roo.me.uk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Make internal 5200 PIC the default interrupt controllerGrant Likely2008-12-21
| | | | | | | | | | | | | | | | | | | | The MPC5200 internal interrupt controller setup function needs to set the default interrupt controller when it is called. Without this irq_create_of_mapping() cannot be called without first determining the pointer to the irq controller (ie. call with controller = NULL). Reported-by: Steven Cavanagh <scavanagh@secretlab.ca> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/mpc5200: Document and tidy irq driverGrant Likely2008-12-21
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds documentation to the mpc5200 interrupt controller driver and cleans up some minor coding conventions. It also moves the contents of mpc52xx_pic.h into the driver proper (except for a small common bit that is moved to the common mpc52xx.h) because the information encoded there is not required by any other part of kernel code. Finally for code readability sake, the L2_OFFSET shift value is removed because the code using it resolves to a noop. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc: Fix missing 'blr' in _tlbia()Benjamin Herrenschmidt2008-12-21
| | | | | | | | | | | | | | Rework to MMU code dropped a much missed 'blr' instruction. Brown-Paper-Bag-Worn-By: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * powerpc/bootwrapper: Use the child-bus #address-cells to decide which range ↵Scott Wood2008-12-20
| | | | | | | | | | | | | | | | | | | | | | entry to use The correct #address-cells was still used for the actual translation, so the impact is only a possibility of choosing the wrong range entry or failing to find any match. Most common cases were not affected. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Const-qualify Device Node Argument to DCR Resource Extent APIGrant Erickson2008-12-20
| | | | | | | | | | | | | | | | | | Add const qualifier to device_node argument for dcr_resource_{start,len} as of_get_property also const-qualifies this argument. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/44x: 44x TLB doesn't need "Guarded" set for all pagesBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After discussing with chip designers, it appears that it's not necessary to set G everywhere on 440 cores. The various core errata related to prefetch should be sorted out by firmware by disabling icache prefetching in CCR0. We add the workaround to the kernel however just in case oooold firmwares don't do it. This is valid for -all- 4xx core variants. Later ones hard wire the absence of prefetch but it doesn't harm to clear the bits in CCR0 (they should already be cleared anyway). We still leave G=1 on the linear mapping for now, we need to stop over-mapping RAM to be able to remove it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Rework usage of _PAGE_COHERENT/NO_CACHE/GUARDEDBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we never set _PAGE_COHERENT in the PTEs, we just OR it in in the hash code based on some CPU feature bit. We also manipulate _PAGE_NO_CACHE and _PAGE_GUARDED by hand in all sorts of places. This changes the logic so that instead, the PTE now contains _PAGE_COHERENT for all normal RAM pages thay have I = 0 on platforms that need it. The hash code clears it if the feature bit is not set. It also adds some clean accessors to setup various valid combinations of access flags and change various bits of code to use them instead. This should help having the PTE actually containing the bit combinations that we really want. I also removed _PAGE_GUARDED from _PAGE_BASE on 44x and instead set it explicitely from the TLB miss. I will ultimately remove it completely as it appears that it might not be needed after all but in the meantime, having it in the TLB miss makes things a lot easier. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Runtime allocation of mmu context maps for nohash CPUsBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the MMU context code used for CPUs with no hash table (except 603) dynamically allocate the various maps used to track the state of contexts. Only the main free map and CPU 0 stale map are allocated at boot time. Other CPU maps are allocated when those CPUs are brought up and freed if they are unplugged. This also moves the initialization of the MMU context management slightly later during the boot process, which should be fine as it's really only needed when userland if first started anyways. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/44x: No need to mask MSR:CE, ME or DE in _tlbil_va on 440Benjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | The handlers for Critical, Machine Check or Debug interrupts will save and restore MMUCR nowadays, thus we only need to disable normal interrupts when invalidating TLB entries. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Split low level tlb invalidate for nohash processorsBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the various forms of low level TLB invalidations are all implemented in misc_32.S for 32-bit processors, in a fairly scary mess of #ifdef's and with interesting duplication such as a whole bunch of code for FSL _tlbie and _tlbia which are no longer used. This moves things around such that _tlbie is now defined in hash_low_32.S and is only used by the 32-bit hash code, and all nohash CPUs use the various _tlbil_* forms that are now moved to a new file, tlb_nohash_low.S. I moved all the definitions for that stuff out of include/asm/tlbflush.h as they are really internal mm stuff, into mm/mmu_decl.h The code should have no functional changes. I kept some variants inline for trivial forms on things like 40x and 8xx. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Add SMP support to no-hash TLB handlingBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit moves the whole no-hash TLB handling out of line into a new tlb_nohash.c file, and implements some basic SMP support using IPIs and/or broadcast tlbivax instructions. Note that I'm using local invalidations for D->I cache coherency. At worst, if another processor is trying to execute the same and has the old entry in its TLB, it will just take a fault and re-do the TLB flush locally (it won't re-do the cache flush in any case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Introduce MMU featuresBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | We're soon running out of CPU features and I need to add some new ones for various MMU related bits, so this patch separates the MMU features from the CPU features. I moved over the 32-bit MMU related ones, added base features for MMU type families, but didn't move over any 64-bit only feature yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Rework context management for CPUs with no hash tableBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reworks the context management code used by 4xx,8xx and freescale BookE. It adds support for SMP by implementing a concept of stale context map to lazily flush the TLB on processors where a context may have been invalidated. This also contains the ground work for generalizing such lazy TLB flushing by just picking up a new PID and marking the old one stale. This will be implemented later. This is a first implementation that uses a global spinlock. Ideally, we should try to get at least the fast path (context ID already assigned) lockless or limited to a per context lock, but for now this will do. I tried to keep the UP case reasonably simple to avoid adding too much overhead to 8xx which does a lot of context stealing since it effectively has only 16 PIDs available. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/mm: Split mmu_context handlingBenjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | This splits the mmu_context handling between 32-bit hash based processors, 64-bit hash based processors and everybody else. This is preliminary work for adding SMP support for BookE processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/4xx: Extended DCR support v2Benjamin Herrenschmidt2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds supports to the "extended" DCR addressing via the indirect mfdcrx/mtdcrx instructions supported by some 4xx cores (440H6 and later). I enabled the feature for now only on AMCC 460 chips. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Add reboot notifier to Collaborative Memory ManagerBrian King2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When running Active Memory Sharing, pages can get marked as "loaned" with the hypervisor by the CMM driver. This state gets cleared by the system firmware when rebooting the partition. When using kexec to boot a new kernel, this state never gets cleared and the hypervisor and CMM driver can get out of sync with respect to the number of pages currently marked "loaned". Fix this by adding a reboot notifier to the CMM driver to deflate the balloon and mark all pages as active. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Disable Collaborative Memory Manager for kdumpBrian King2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running Active Memory Sharing, the Collaborative Memory Manager (CMM) may mark some pages as "loaned" with the hypervisor. Periodically, the CMM will query the hypervisor for a loan request, which is a single signed value. When kexec'ing into a kdump kernel, the CMM driver in the kdump kernel is not aware of the pages the previous kernel had marked as "loaned", so the hypervisor and the CMM driver are out of sync. This results in the CMM driver getting a negative loan request, which can then get treated as a large unsigned value and can cause kdump to hang due to the CMM driver inflating too large. Since there really is no clean way for the CMM driver in the kdump kernel to clean this up, simply disable CMM in the kdump kernel. This fixes hangs we were seeing doing kdump with AMS. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc/iseries: viodasd needs to depend on CONFIG_BLOCKStephen Rothwell2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise you get lot of errors like these: drivers/block/viodasd.c:72: error: dereferencing pointer to incomplete type drivers/block/viodasd.c: In function 'viodasd_open': drivers/block/viodasd.c:135: error: dereferencing pointer to incomplete type drivers/block/viodasd.c: In function 'viodasd_release': drivers/block/viodasd.c:184: error: dereferencing pointer to incomplete type drivers/block/viodasd.c: In function 'viodasd_getgeo': drivers/block/viodasd.c:209: error: dereferencing pointer to incomplete type drivers/block/viodasd.c:214: error: implicit declaration of function 'get_capacity' drivers/block/viodasd.c: At top level: drivers/block/viodasd.c:222: error: variable 'viodasd_fops' has initializer but incomplete type drivers/block/viodasd.c:223: error: unknown field 'owner' specified in initializer Discovered by a randconfig build. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * hvc_console: Escape magic sysrq keyHendrik Brueckner2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ctrl-o (^O) is a common control key used by several applications, such as vim, but hvc_console uses ^O as the magic-sysrq key. This commit allows users to send ^O to applications by pressing ^O twice in succession. To implement this, this commit introduces a check if ^O is pressed again if the sysrq_pressed variable is already set. In this case, clear sysrq_pressed state and flip the ^O character to the tty. (The old behavior has always set "sysrq_pressed" if ^O has been entered, and it has not flipped the ^O character to the tty.) Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Pass a valid token to rtas_call() in phyp-dump codeTony Breeds2008-12-20
| | | | | | | | | | | | | | | | | | | | ibm_configure_kernel_dump is passed as the token to rtas_call() is never initialised. This sets it to something sane. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Acked-by: Nathan Lynch <ntl@pobox.com> Acked-by: Manish Ahuja <mahujam@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Protect against NULL pointer deref in phyp-dump codeTony Breeds2008-12-20
| | | | | | | | | | | | | | | | | | | | | | print_dump_header() will be called at least once with a NULL pointer in a normal boot sequence. If DEBUG is defined then we will dereference the pointer and crash. Add a quick fix to exit early in the NULL pointer case. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Acked-by: Manish Ahuja <mahujam@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Rename struct vm_region to avoid conflict with NOMMUDavid Howells2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename PowerPC's struct vm_region so that I can introduce my own global version for NOMMU. It's feasible that the PowerPC version may wish to use my global one instead. The NOMMU vm_region struct defines areas of the physical memory map that are under mmap. This may include chunks of RAM or regions of memory mapped devices, such as flash. It is also used to retain copies of file content so that shareable private memory mappings of files can be made. As such, it may be compatible with what is described in the banner comment for PowerPC's vm_region struct. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Convert sysfs cache code to of_find_next_cache_node()Nathan Lynch2008-12-20
| | | | | | | | | | | | | | | | | | Using the common code means that more complete cache information will provided in sysfs on platforms that don't use the l2-cache property convention. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Convert cpu_to_l2cache() to of_find_next_cache_node()Nathan Lynch2008-12-20
| | | | | | | | | | | | | | | | The smp code uses cache information to populate cpu_core_map; change it to use common code for cache lookup. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Add of_find_next_cache_node()Nathan Lynch2008-12-20
| | | | | | | | | | | | | | | | | | | | We have more than one piece of code that looks up cache nodes manually using the "l2-cache" property. Add a common helper routine which does this and handles ePAPR's "next-level-cache" property as well as powermac. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * of/gpio: Implement of_gpio_count()Anton Vorontsov2008-12-20
| | | | | | | | | | | | | | | | This function is used to count how many GPIOs are specified for a device node. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * of: of_parse_phandles_with_args() learns to differentiate 'hole' cellsAnton Vorontsov2008-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given this list (contains three gpio specifiers, one of which is a hole): gpios = <&phandle1 1 2 3 0 /* a hole */ &phandle2 4 5 6>; of_parse_phandles_with_args() would report -ENOENT for the `hole' specifier item, the same error value is used to report the end of the list, for example. Sometimes we want to differentiate holes from real errors -- for example when we want to count all the [syntax correct] specifiers. With this patch of_parse_phandles_with_args() will report -EEXITS when somebody requested to parse a hole. Also, make the out_{node,args} arguments optional, when counting we don't really need the out values. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * of: Minor simplification for the of_parse_phandles_with_args()Anton Vorontsov2008-12-20
| | | | | | | | | | | | | | | | | | By using 'list++' in the beginning we can simplify the code a little bit. Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * Merge branch 'linux-2.6' into nextPaul Mackerras2008-12-17
| |\
| * \ Merge branch 'next' of ↵Paul Mackerras2008-12-16
| |\ \ | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into next
| | * | powerpc/4xx: Add L2 cache node to AMCC Canyonlands dts fileStefan Roese2008-12-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch the L2 cache is enabled on Canyonlands to increase the overall performance. There is a known cache coherency issue with the L2 cache, but this is related to the high bandwidth (HB) PLB segment where the memory address is 0x8.xxxx.xxxx (low bandwidth PLB segment is mapped to 0x0.xxxx.xxxx). Since this HB address is currently unused it is safe to enable the L2 cache. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| | * | powerpc/4xx: Add support for ISA holes on 4xx PCI/X/EBenjamin Herrenschmidt2008-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for ISA memory holes on the PCI, PCI-X and PCI-E busses of the 4xx platforms. The patch includes changes to the Bamboo and Canyonlands device-trees to add such a hole, others can be updated separately. The ISA memory hole is an additional outbound window configured in the bridge to generate PCI cycles in the low memory addresses, thus allowing to access things such as the hard-decoded VGA aperture at 0xa0000..0xbffff or other similar things. It's made accessible to userspace via the new legacy_mem file in sysfs for which support was added by a previous patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| | * | powerpc/44x: update ppc44x_defconfigStephen Rothwell2008-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes CONFIG_PCI_LEGACY (which is not needed) and consequently several compiler warnings. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| | * | powerpc/kvm: update KVM config options in ppc44x_defconfigHollis Blanchard2008-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | KVM host support was recently enabled in ppc44x_defconfig, but since then the config option was renamed. Update ppc44x_defconfig to match. Also, KVM guests aren't very interesting without networking, so enable CONFIG_TUN and CONFIG_BRIDGE. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | rapidio: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc/mm: Remove flush_HPTE()Benjamin Herrenschmidt2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function flush_HPTE() is used in only one place, the implementation of DEBUG_PAGEALLOC on ppc32. It's actually a dup of flush_tlb_page() though it's -slightly- more efficient on hash based processors. We remove it and replace it by a direct call to the hash flush code on those processors and to flush_tlb_page() for everybody else. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc/mm: Rename tlb_32.c and tlb_64.c to tlb_hash32.c and tlb_hash64.cBenjamin Herrenschmidt2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames the files to clarify the fact that they are used by the hash based family of CPUs (the 603 being an exception in that family but is still handled by that code). This paves the way for the new tlb_nohash.c coming via a subsequent commit. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc/mm: Add local_flush_tlb_mm() to SW loaded TLB implementationsBenjamin Herrenschmidt2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a local_flush_tlb_mm() call as a pre-requisite for some SMP work for BookE processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc: Fix asm EMIT_BUG_ENTRY with !CONFIG_BUGBenjamin Herrenschmidt2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of not defining it at all, this defines the macro as being empty, thus avoiding ifdef's in call sites when CONFIG_BUG is not set. Also removes an extra whitespace in the existing definition. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc: Remove dead BIO_VMERGE_BOUNDARY definitionFUJITA Tomonori2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The block layer dropped the virtual merge feature (b8b3e16cfe6435d961f6aaebcfd52a1ff2a988c5). BIO_VMERGE_BOUNDARY definition is meaningless now (For POWER, BIO_VMERGE_BOUNDARY has been meaningless for a long time since POWER disables the virtual merge feature). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | powerpc: Introduce ppc_pci_flags accessorsJosh Boyer2008-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are a number of platforms that open code access to the ppc_pci_flags global variable. However, that variable is not present if CONFIG_PCI is not set, which can lead to a build break. This introduces a number of accessor functions that are defined to be empty in the case of CONFIG_PCI being disabled. The various platform files in the kernel are updated to use these. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-12 06:14:37 -0400