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* xHCI 1.0: Max Exit Latency Too Large ErrorAlex He2011-05-09
| | | | | | | | | | This is a new TRB Completion Code of the xHCI spec 1.0. Asserted by the Evalute Context Command if the proposed Max Exit Latency would not allow the periodic endpoints of the Device Slot to be scheduled. Signed-off-by: Alex He <alex.he@amd.com> Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* xHCI 1.0: TT_THINK_TIME setAndiry Xu2011-05-09
| | | | | | | | xHCI 1.0 spec says the TT Think Time field shall be set to zero if the device is not a High-speed hub. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* xHCI 1.0: Block Interrupts for Isoch transferAndiry Xu2011-05-09
| | | | | | | | | | | | | | Currently an isoc URB is divided into multiple TDs, and every TD will trigger an interrupt when it's processed. However, software can schedule multiple TDs at a time, and it only needs an interrupt every URB. xHCI 1.0 introduces the Block Event Interrupt(BEI) flag which allows Normal and Isoch Transfer TRBs to place an Event TRB on an Event Ring but not assert an intrrupt to the host, and the interrupt rate is significantly reduced and the system performance is improved. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* xHCI 1.0: Isoch endpoint CErr field setAndiry Xu2011-05-09
| | | | | | | | xHCI 1.0 specification specifies that CErr does not apply to Isoch endpoints and shall be set to '0' for Isoch endpoints. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* xHCI 1.0: Control endpoint average TRB length field setAndiry Xu2011-05-09
| | | | | | | | xHCI 1.0 specification indicates that software should set Average TRB Length to '8' for control endpoints. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* xHCI 1.0: Setup Stage TRB Transfer Type flagAndiry Xu2011-05-09
| | | | | | | | | Setup Stage Transfer Type field is added to indicate the presence and the direction of the Data Stage TD, and determines the direction of the Status Stage TD so the wLength length field should be ignored by the xHC. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
* USB: OTG: msm: Add PHY suspend support for MSM8960Pavankumar Kondeti2011-05-06
| | | | | Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: OTG: msm: Configure PHY Analog and Digital voltage domainsAnji jonnala2011-05-06
| | | | | | Signed-off-by: Anji jonnala <anjir@codeaurora.org> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: OTG: msm: Implement charger detectionPavankumar Kondeti2011-05-06
| | | | | | | | | | | | | | | | | Implement good battery algorithm defined in the battery charging V1.2 spec for detecting different charging ports. USB hardware is put into low power mode when connected to a dedicated charging port. vbus_draw and set_power methods are implemented for determining the allowed current from Host in different states (un-configured/suspend/configured). The charger block is implemented using vendor specific registers and the PHY used in MSM8960(28nm PHY) different from older targets like MSM8x60 and MSM7x30(45nm PHY). The PHY vendor and product id registers are not implemented in the above chipsets. Hence PHY type is passed via platform data. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: OTG: msm: vote for dayatona fabric clockAnji jonnala2011-05-06
| | | | | | | | | | | | HSUSB core clock is derived from daytona fabric clock and for HSUSB operational require minimum core clock at 55MHz. Since, HSUSB cannot tolerate daytona fabric clock change in the middle of HSUSB operational, vote for maximum Daytona fabric clock while usb is operational Signed-off-by: Anji jonnala <anjir@codeaurora.org> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Add support for GRLIB GRUSBHC controllerJan Andersson2011-05-06
| | | | | | | | | | | | | | | | This patch adds support for the UHCI part of the GRLIB GRUSBHC controller found on some LEON/GRLIB SoCs. The UHCI HCD previously only supported controllers connected over PCI. This patch adds support for the first non-PCI UHCI HC. I have tried to replicate the solution used in ehci-hcd.c. Tested on GR-LEON4-ITX board (LEON4/GRLIB with GRUSBHC) and x86 with Intel UHCI HC. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Support non-PCI host controllersJan Andersson2011-05-06
| | | | | | | | | | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI host controllers. This patch also extends the uhci_{read,write}* functions to allow accesses to registers not mapped into PCI I/O space. This extension also includes the addition of a void __iomem pointer to the uhci structure. A new Kconfig option is added to signal that the system has a non-PCI HC. If this Kconfig option is set, uhci-hcd.c will include generic reset functions for systems that do not make use of keyboard and mouse legacy support. PCI controllers will still always use the reset functions from pci-quirks This patch is followed by a patch that adds bus glue for the first non-PCI UHCI HC. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Wrap I/O register accessesJan Andersson2011-05-06
| | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI controllers. This patch replaces in{b,w,l} and out{b,wl} with calls to local inline functions. This is done so that the register access functions can be extended to support register areas not mapped in PCI I/O space. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Move PCI specific functions to uhci-pci.cJan Andersson2011-05-06
| | | | | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI controllers. This patch moves PCI specific functions to uhci-pci.c and includes this file in uhci-hcd.c. It also renames the function uhci_init to uhci_pci_init. uhci_init/uhci_pci_init is modified so that the port-detection logic is kept in a new separate function uhci_count_ports() in uhci-hcd.c. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Codingstyle fixesJan Andersson2011-05-06
| | | | | | | | | | | | | | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI host controllers. This patch fixes the following warnings from checkpatch: ERROR: switch and case should be at the same indent + switch (to_pci_dev(uhci_dev(uhci))->vendor) { + default: [...] + case PCI_VENDOR_ID_GENESYS: [...] + case PCI_VENDOR_ID_INTEL: WARNING: static char array declaration should probably be static const char + static char bad_Asus_board[] = "A7V8X"; WARNING: Use DEFINE_PCI_DEVICE_TABLE for struct pci_device_id +static const struct pci_device_id uhci_pci_ids[] = { { Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Allow dynamic assignment of bus specific functionsJan Andersson2011-05-06
| | | | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI controllers. This patch changes calls to uhci_reset_hc, uhci_check_and_reset_hc, configure_hc, resume_detect_interrupts_are_broken and global_suspend_mode_is_broken so that they are made through pointers in the uhci hcd struct. This will allow these functions to be replaced with bus/arch specific functions. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: UHCI: Remove PCI dependencies from uhci-hubJan Andersson2011-05-06
| | | | | | | | | | | | | | | | This patch is part of a series that extend the UHCI HCD to support non-PCI host controllers. uhci-hub.c contained two PCI vendor checks for silicon quirks. Move these checks into uhci-hcd.c and use bits in uhci_hcd structure to mark that we need to use the quirks. This patch is followed by other patches that will remove PCI dependencies from uhci-hcd.c as well. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* fsl/usb: Unused endpoint failure for USB gadgetRamneek Mehresh2011-05-06
| | | | | | | | | | | | | | | Though USB controller works without this most of the time, an issue was faced where USB was configured as printer device and it was dropping first packet(64 bytes) in full speed mode due to DATA PID mismatch. The problem gets resolved once unused endpoints are configured as bulk. As per P1020 RM (Table17-31, bits 19-18, bits 3-2) "When only one endpoint (RX or TX, but not both) of an endpoint pair is used, the unused endpoint should be configured as a bulk type endpoint." So according to the RM, this patch is initializing TX and RX endpoints as bulk type Signed-off-by: Suchit Lepcha <Suchit.Lepcha@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: ohci-s3c2410: return proper error if clk_get failsJingoo Han2011-05-06
| | | | | | | Return PTR_ERR(clk) instead of -ENOENT if clk_get fails Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: ohci-s3c2410: fix checkpatch errors and warningsJingoo Han2011-05-06
| | | | | | | | | | | | This patch fixes the checkpatch errors ans warnings listed below: ERROR: do not use assignment in if condition WARNING: line over 80 characters WARNING: braces {} are not necessary for single statement blocks WARNING: space prohibited between function name and open parenthesis '(' Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: ehci-au1xxx: fix suspend callbackManuel Lauss2011-05-06
| | | | | | | | | Remove a stray 'return 0' at the top of the suspend callback, and move au1xxx_stop_ehc() out of the ehci spinlock since it takes some time to complete. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* usb: fix building musb driversAnatolij Gustschin2011-05-06
| | | | | | | | | | | | | Commit 3dacdf11 "usb: factor out state_string() on otg drivers" broke building musb drivers since there is already another otg_state_string() function in musb drivers, but with different prototype. Fix musb drivers to use common otg_state_string(), too. Also provide a nop for otg_state_string() if CONFIG_USB_OTG_UTILS is not defined. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: EHCI: Add bus glue for GRLIB GRUSBHC controllerJan Andersson2011-05-03
| | | | | | | | | | | | | This patch adds support for the GRLIB GRUSBHC EHCI controller from Aeroflex Gaisler. The controller is typically found on LEON/GRLIB SoCs. Tested on GR-LEON4-ITX with with little endian interface and on LEON3 system on GR-PCI-XC5V development board for big endian controller. Signed-off-by: Jan Andersson <jan@gaisler.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: EHCI: Support controllers with big endian capability regsJan Andersson2011-05-03
| | | | | | | | | | | | | | | | The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: OTG: msm: Clear in_lpm flag before enabling the IRQ in resumePavankumar Kondeti2011-05-03
| | | | | | | | | | The current code is clearing in_lpm flag after enabling the IRQ. If IRQ comes immediately before in_lpm flag is set, it thinks that hardware is in low power mode and disables the IRQ. Fix this by clearing in_lpm flag before enabling the IRQ. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Initialize ep0 once while registering gadget in ci13xxx_udcAnji jonnala2011-05-03
| | | | | | | | | | | | | | | | Some of the simulators may cache the ep0 maxpacket size to zero if the ep0 dQh is not setup before enabling the pullup. Hence Setup ep0 and initialize the dQh fields once while registering the gadget(before enabling the pullup). HSUSB Chipidea link controller spec says ep0 is enabled always in the HW. Hence disabling and enabling the ep0 as a part of reset interrupt is unneccesary. Remove the disable/enable ep0 logic from reset interrupt handling. Signed-off-by: Anji jonnala <anjir@codeaurora.org> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Use ep0out for control OUT data phase in ci13xxx_udcPavankumar Kondeti2011-05-03
| | | | | | | | The current code queue the control OUT data request to ep0in instead of ep0out. Check ep0_dir and use the correct control endpoint. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Fix bug in endpoint feature request processing in ci13xxx_udcPavankumar Kondeti2011-05-03
| | | | | | | | | The OUT endpoints are stored in 0 - hw_ep_max/2 and IN endpoints are stored from hw_ep_max/2 - hw_ep_max in ci13xxx_ep array. Retrieve the IN endpoint correctly while processing endpoint feature requests. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Fix unused variable warning in ci13xxx_udcPavankumar Kondeti2011-05-03
| | | | | Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Use bitwise AND operator to test flags in ci13xxx_udcPavankumar Kondeti2011-05-03
| | | | | Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gadget: Fix typo (s/EBUSY/-EBUSY) in ci13xxx_udcPavankumar Kondeti2011-05-03
| | | | | Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: gpio-vbus: ask for vbus_draw regulator before registering xceivDmitry Eremin-Solenikov2011-05-03
| | | | | | | | | Ask for vbus_draw regulator before registering tranceiver to disallow possible race between registration and set_power/etc. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: ldusb: add several new devicesMichael Hund2011-05-03
| | | | | | | Added several new devices to ldusb and excluded them from the HID driver. Signed-off-by: Michael Hund <mhund@ld-didactic.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: ehci: remove structure packing from ehci_defRabin Vincent2011-05-03
| | | | | | | | | | | | | | | | As pointed out by Arnd Bergmann, in include/linux/usb/ehci_def.h, struct ehci_caps is defined with __attribute__((packed)) for no good reason, and this triggers undefined behaviour when using ARM's readl() on pointers to elements of this structure: http://lkml.kernel.org/r/201102021700.20683.arnd@arndb.de The same problem exists with the other two structures in ehci_def.h too, so remove the __attribute__((packed)) from all of them. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* usb: Configure octeon2 glue logic for proper uSOF cycle period.David Daney2011-05-03
| | | | | | | | | The reset value of the uSOF cycle period is incorrect. Set it to 60,000 bits. Without this, several commercial USB flash memory devices and hubs fail to work properly. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* usb: octeon2-common.c: Configure ports for proper electrical characteristics.David Daney2011-05-03
| | | | | | | | Additional PHY tuning is needed to obtain compliant 'eye' diagram electrical characteristics. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: octeon2-common: Don't reinitialize the clocks.David Daney2011-05-03
| | | | | | | | | | | | | | The UCTL clock initialization will cause the ehci and ohci blocks to become inoperable if the clocks are reinitialized. Check to see if the clocks have already been initialized. Also use a mutex to protect the clock initialization code so that there can be no attempt to use the clocks before they are fully configured. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'for-usb-next' of ↵Greg Kroah-Hartman2011-05-02
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git+ssh://master.kernel.org/pub/scm/linux/kernel/git/sarah/xhci into usb-next * 'for-usb-next' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/sarah/xhci: xhci 1.0: Set transfer burst last packet count field. xhci 1.0: Set transfer burst count field. xhci 1.0: Update TD size field format. xhci 1.0: Only interrupt on short packet for IN EPs. xhci: Remove sparse warning about cmd_status. usbcore: warm reset USB3 port in SS.Inactive state usbcore: Refine USB3.0 device suspend and resume xHCI: report USB3.0 portstatus comply with USB3.0 specification xHCI: Set link state support xHCI: Clear link state change support xHCI: warm reset support usb/ch9: use proper endianess for wBytesPerInterval xhci: Remove recursive call to xhci_handle_event xhci: Add an assertion to check for virt_dev=0 bug. xhci: Add rmb() between reading event validity & event data access. xhci: Make xHCI driver endian-safe
| * xhci 1.0: Set transfer burst last packet count field.Sarah Sharp2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The xHCI 1.0 specification defines a new isochronous TRB field, called transfer burst last packet count (TBLPC). This field defines the number of packets in the last "burst" of packets in a TD. Only SuperSpeed endpoints can handle more than one burst, so this is set to the number for packets in a TD for all non-SuperSpeed devices (minus one, since the field is zero based). This patch should have no effect on host controllers that don't advertise the xHCI 1.0 (0x100) version number in their hci_version field. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xhci 1.0: Set transfer burst count field.Sarah Sharp2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The xHCI 1.0 specification adds a new field to the fourth dword in an isochronous TRB: the transfer burst count (TBC). This field is only non-zero for SuperSpeed devices. Each SS endpoint sets the bMaxBurst field in the SuperSpeed endpoint companion descriptor, which indicates how many max-packet-sized "bursts" it can handle in one service interval. The device driver may choose to burst less max packet sized chunks each service interval (which is defined by one TD). The xHCI driver indicates to the host controller how many bursts it needs to schedule through the transfer burst count field. This patch will only effect xHCI hosts that advertise 1.0 support (0x100) in the HCI version field of their capabilities register. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xhci 1.0: Update TD size field format.Sarah Sharp2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The xHCI 1.0 specification changes the format of the TD size field in Normal and Isochronous TRBs. The field in control TRBs is still set to reserved zero. Instead of representing the number of bytes left to transfer in the TD (including the current TRB's buffer), it now represents the number of packets left to transfer (*not* including this TRB). See section 4.11.2.4 of the xHCI 1.0 specification for details. The math is basically copied straight from there. Create a new function, xhci_v1_0_td_remainder(), that should be called for all xHCI 1.0 host controllers. The field location and maximum value is still the same, so reuse the old function, xhci_td_remainder(), to handle the bit shifting. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xhci 1.0: Only interrupt on short packet for IN EPs.Sarah Sharp2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | It doesn't make sense to set the interrupt on short packet (TRB_ISP) flag for TRBs queued to endpoints that only receive packets from the host controller (i.e. OUT endpoints). Packets can only be short when they are sent from a USB device. Plus, the xHCI 1.0 specification forbids setting the flag for anything but IN endpoints. While we're at it, remove some of my snide remarks about the inefficiency of event data TRBs. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xhci: Remove sparse warning about cmd_status.Sarah Sharp2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sparse complains about the arguments to xhci_evaluate_context_result() and xhci_configure_endpoint_result(): CHECK drivers/usb/host/xhci.c drivers/usb/host/xhci.c:1647:53: warning: incorrect type in argument 3 (different signedness) drivers/usb/host/xhci.c:1647:53: expected int *cmd_status drivers/usb/host/xhci.c:1647:53: got unsigned int [usertype] *[assigned] cmd_status drivers/usb/host/xhci.c:1648:50: warning: incorrect type in argument 3 (different signedness) drivers/usb/host/xhci.c:1648:50: expected int *cmd_status drivers/usb/host/xhci.c:1648:50: got unsigned int [usertype] *[assigned] cmd_status The command status is taken from the command completion event TRB, and will always be a positive number. Change the signature of xhci_evaluate_context_result() and xhci_configure_endpoint_result() to take a u32 for cmd_status. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * usbcore: warm reset USB3 port in SS.Inactive stateAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | | | | | | | Some USB3.0 devices go to SS.Inactive state when hot plug to USB3 ports. Warm reset the port to transition it to U0 state. This patch fixes the issue that Kingston USB3.0 flash drive can not be recognized when hot plug to USB3 port. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * usbcore: Refine USB3.0 device suspend and resumeAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | In the past, we use USB2.0 request to suspend and resume a USB3.0 device. Actually, USB3.0 hub does not support Set/Clear PORT_SUSPEND request, instead, it uses Set PORT_LINK_STATE request. This patch makes USB3.0 device suspend/resume comply with USB3.0 specification. This patch fixes the issue that USB3.0 device can not be suspended when connected to a USB3.0 external hub. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xHCI: report USB3.0 portstatus comply with USB3.0 specificationAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | | | | | | | USB3.0 specification has different wPortStatus and wPortChange definitions from USB2.0 specification. Since USB3 root hub and USB2 root hub are split now and USB3 hub only has USB3 protocol ports, we should modify the portstatus and portchange report of USB3 ports to comply with USB3.0 specification. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xHCI: Set link state supportAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Set Port Feature(PORT_LINK_STATE) request. The most significant byte (bits 15..8) of the wIndex field specifies the U state the host software wants to put the link connected to the port into. This request is only valid when the PORT_ENABLE bit is set and the PORT_LINK_STATE should not be above value '5' (Rx.Detect). This request will be later used to replace the set/clear suspend USB3 protocol ports in hub driver. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xHCI: Clear link state change supportAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | This patch adds support for Clear Port Feature(C_PORT_LINK_STATE) request from usbcore. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * xHCI: warm reset supportAndiry Xu2011-05-02
| | | | | | | | | | | | | | | | | | | | This patch adds warm reset support to xhci hub control. It handles Set Port Feature(BH_PORT_RESET) and Clear Port Feature (C_BH_PORT_RESET) request from usbcore. Note warm reset is called BH reset some places in USB3.0 specification. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
| * usb/ch9: use proper endianess for wBytesPerIntervalSebastian Andrzej Siewior2011-05-02
| | | | | | | | | | | | | | | | while going through Tatyana's changes for the gadget framework I noticed that this type is not defined as __le16. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 13:13:02 -0500