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* i2c: driver for the Synopsys DesignWare I2C controllerBaruch Siach2009-06-23
| | | | | | | | | The i2c Linux driver for the DesignWare i2c block of Synopsys, which is meant for AMBA Peripheral Bus. This i2c block is used on SoC chips like the ARM9 based PVG610. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2009-06-23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (27 commits) Blackfin: fix dma-mapping build errors Blackfin: hook up new perf_counter_open syscall Blackfin: drop BF535-specific text for exception 0x2A (unaligned instruction) Blackfin: fix early crash when booting on wrong cpu Blackfin: fix GPTMR0_CLOCKSOURCE dependency on BFIN_GPTIMERS Blackfin: drop unused ISP1760 port1_disable from board resources Blackfin: bf526-ezbrd: handle different SDRAM chips Blackfin: fix typo in TRAS define in mem_init.h header Blackfin: unify memory map headers Blackfin: stick the CPU name into boot image name Blackfin: update defconfigs Blackfin: decouple unrelated cache settings to get exact behavior Blackfin: update I-pipe patch level Blackfin: remove obsolete mcount support from I-pipe code Blackfin: allow CONFIG_TICKSOURCE_GPTMR0 with interrupt pipeline Blackfin: convert interrupt pipeline to irqflags Blackfin: allow people to select BF51x-0.1 silicon rev Blackfin: bf526-ezbrd: set SPI flash resources to SST device Blackfin: fix accidental reset in some boot modes Blackfin: abstract irq14 lowering in do_irq ...
| * Blackfin: fix dma-mapping build errorsFUJITA Tomonori2009-06-22
| | | | | | | | | | | | | | | | | | | | The recent deprecation of dma_sync_{sg,single} ironically broke Blackfin systems. This is because we don't define dma_sync_sg_for_cpu at all, so until the DMA asm-generic conversion/cleanup is done after the next release, simply stub out the dma_sync_sg_for_{cpu,device} functions. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: hook up new perf_counter_open syscallMike Frysinger2009-06-22
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: drop BF535-specific text for exception 0x2A (unaligned instruction)Yi Li2009-06-22
| | | | | | | | | | | | | | | | | | We don't support the BF535 at all, and the exception 0x2A text specific to it is pretty verbose and confusing (since the behavior is simply odd), so punt it to keep the noise down. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: fix early crash when booting on wrong cpuRobin Getz2009-06-22
| | | | | | | | | | | | | | | | | | | | Make sure we process the kernel command line before poking the hardware, so that we can process early printk. This helps ensure that if you boot a kernel configured for a different processor, something will be left in the log buffer. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: fix GPTMR0_CLOCKSOURCE dependency on BFIN_GPTIMERSMike Frysinger2009-06-22
| | | | | | | | | | | | | | | | The GPTMR0_CLOCKSOURCE Kconfig option requires the gptimers framework, so make sure it is selected when this option is enabled. Reported-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: drop unused ISP1760 port1_disable from board resourcesMike Frysinger2009-06-22
| | | | | | | | | | | | | | The port1 disable stuff was dropped from the USB ISP1760, so update the Blackfin boards accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526-ezbrd: handle different SDRAM chipsGraf Yang2009-06-22
| | | | | | | | | | | | | | | | The BF526-EZBRD changed SDRAM chips between board revisions, so create a timing table that can accommodate both. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: fix typo in TRAS define in mem_init.h headerGraf Yang2009-06-22
| | | | | | | | | | | | | | | | We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num to 3. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify memory map headersMike Frysinger2009-06-22
| | | | | | | | | | | | | | | | | | | | Many aspects of the Blackfin memory map is exactly the same across all variants. Rather than copy and paste all of these duplicated values in each header, unify all of these into the common Blackfin memory map header file. In the process, push down BF561 SMP specific stuff to the BF561 specific header to keep the noise down. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: stick the CPU name into boot image nameRobin Getz2009-06-22
| | | | | | | | | | | | | | | | | | | | | | Rather than use "Linux" in the boot image name (as this is redundant -- the image type is already set to "linux"), use the CPU name. This makes it fairly obvious when a wrong image is accidentally booted. Otherwise there is no kernel output and you waste time scratching your head wondering wtf just happened. Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: update defconfigsMike Frysinger2009-06-22
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: decouple unrelated cache settings to get exact behaviorJie Zhang2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current cache options don't really represent the hardware features. They end up setting different aspects of the hardware so that the end result is to turn on/off the cache. Unfortunately, when we hit cache problems with the hardware, it's difficult to test different settings to root cause the problem. The current settings also don't cleanly allow for different caching behaviors with different regions of memory. So split the configure options such that they properly reflect the settings that are applied to the hardware. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: update I-pipe patch levelPhilippe Gerum2009-06-22
| | | | | | | | | | Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: remove obsolete mcount support from I-pipe codePhilippe Gerum2009-06-22
| | | | | | | | | | Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: allow CONFIG_TICKSOURCE_GPTMR0 with interrupt pipelinePhilippe Gerum2009-06-22
| | | | | | | | | | Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert interrupt pipeline to irqflagsPhilippe Gerum2009-06-22
| | | | | | | | | | Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: allow people to select BF51x-0.1 silicon revMike Frysinger2009-06-22
| | | | | | | | | | | | Now that 0.1 of the BF51x is coming out, allow people to build for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526-ezbrd: set SPI flash resources to SST deviceGraf Yang2009-06-22
| | | | | | | | | | | | | | The BF526-EZBRD has a SST SPI flash on it, not a ST Micro. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: fix accidental reset in some boot modesSonic Zhang2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | We read the SWRST (Software Reset) register to get at the last reset state, and then we may configure the DOUBLE_FAULT bit to control behavior when a double fault occurs. But if the lower bits of the register is already set (like UART boot mode on a BF54x), we inadvertently make the system reset by writing to the SYSTEM_RESET field at the same time. So make sure the lower 4 bits are always cleared. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: abstract irq14 lowering in do_irqMike Frysinger2009-06-22
| | | | | | | | | | | | | | Split out the optional IRQ14 lowering code to further simplify the asm_do_IRQ() function and keep the ifdef nest under control. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: simplify irq stack overflow checkingMike Frysinger2009-06-22
| | | | | | | | | | | | | | Take a page from x86 and abstract the stack checking out of the asm_do_IRQ() function so that the result is easier to digest. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: only build show_interrupts() when procfs is enabledMike Frysinger2009-06-22
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: redo handling of bad irqsMike Frysinger2009-06-22
| | | | | | | | | | | | | | | | | | | | With the common IRQ code initializing much more of the irq_desc state, we can't blindly initialize it ourselves to the local bad_irq state. If we do, we end up wrongly clobbering many fields. So punt most of the bad irq code as the common layers will handle the default state, and simply call handle_bad_irq() directly when the IRQ we are processing is invalid. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: update anomaly listsMike Frysinger2009-06-22
| | | | | | | | | | | | Update anomaly headers to match latest released anomaly sheets. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf533-ezkit: add resources for FISP devicesMike Frysinger2009-06-22
| | | | | | | | | | | | | | | | The BF533-EZKIT has two Flash In-System Programming devices hooked up to the async memory bus, so add resources for the primary flashes and the SRAMs on the devices. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf518f-ezbrd: update DSA resourcesMike Frysinger2009-06-22
| | | | | | | | | | | | | | The common DSA code changed structure layout, so update the BF518F-EZBRD resources accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify memory region checks between kgdb and trapsMike Frysinger2009-06-22
| | | | | | | | | | | | | | | | | | The kgdb (in multiple places) and traps code developed pretty much identical checks for how to access different regions of the Blackfin memory map, but each wasn't 100%, so unify them to avoid duplication, bitrot, and bugs with edge cases. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge git://git.infradead.org/~dwmw2/iommu-2.6.31Linus Torvalds2009-06-23
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/~dwmw2/iommu-2.6.31: intel-iommu: Fix one last ia64 build problem in Pass Through Support VT-d: support the device IOTLB VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps VT-d: add device IOTLB invalidation support VT-d: parse ATSR in DMA Remapping Reporting Structure PCI: handle Virtual Function ATS enabling PCI: support the ATS capability intel-iommu: dmar_set_interrupt return error value intel-iommu: Tidy up iommu->gcmd handling intel-iommu: Fix tiny theoretical race in write-buffer flush. intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing. intel-iommu: Clean up handling of "caching mode" vs. context flushing. VT-d: fix invalid domain id for KVM context flush Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support Intel IOMMU Pass Through Support Fix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}
| * | intel-iommu: Fix one last ia64 build problem in Pass Through SupportLuck, Tony2009-06-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ia64 with CONFIG_DMAR=n and CONFIG_SWIOTLB=y (as used in arch/ia64/configs/tiger_defconfig) there is still a link error with iommu_pass_through listed as an undefined symbol: arch/ia64/kernel/built-in.o: In function `pci_swiotlb_init': (.init.text+0x7f70): undefined reference to `iommu_pass_through' Fix it by #defining iommu_pass_through away in asm/iommu.h Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | VT-d: support the device IOTLBYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | | | | Enable the device IOTLB (i.e. ATS) for both the bare metal and KVM environments. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | VT-d: cleanup iommu_flush_iotlb_psi and flush_unmapsYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | Make iommu_flush_iotlb_psi() and flush_unmaps() more readable. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | VT-d: add device IOTLB invalidation supportYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | | | | Support device IOTLB invalidation to flush the translation cached in the Endpoint. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | VT-d: parse ATSR in DMA Remapping Reporting StructureYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | | | | Parse the Root Port ATS Capability Reporting Structure in the DMA Remapping Reporting Structure ACPI table. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | PCI: handle Virtual Function ATS enablingYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SR-IOV spec requires that the Smallest Translation Unit and the Invalidate Queue Depth fields in the Virtual Function ATS capability are hardwired to 0. If a function is a Virtual Function, then and set its Physical Function's STU before enabling the ATS. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | PCI: support the ATS capabilityYu Zhao2009-05-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCIe ATS capability makes the Endpoint be able to request the DMA address translation from the IOMMU and cache the translation in the device side, thus alleviate IOMMU pressure and improve the hardware performance in the I/O virtualization environment. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | intel-iommu: dmar_set_interrupt return error valueChris Wright2009-05-14
| | | | | | | | | | | | | | | | | | | | | | | | dmar_set_interrupt feigns success when arch_setup_dmar_msi fails, return error value. Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | intel-iommu: Tidy up iommu->gcmd handlingDavid Woodhouse2009-05-10
| | | | | | | | | | | | Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | intel-iommu: Fix tiny theoretical race in write-buffer flush.David Woodhouse2009-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In iommu_flush_write_buffer() we read iommu->gcmd before taking the register_lock, and then we mask in the WBF bit and write it to the register. There is a tiny chance that something else could have _changed_ iommu->gcmd before we take the lock, but after we read it. So we could be undoing that change. Never actually going to have happened in practice, since nothing else changes that register at runtime -- aside from the write-buffer flush it's only ever touched at startup for enabling translation, etc. But worth fixing anyway. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.David Woodhouse2009-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we just did for context cache flushing, clean up the logic around whether we need to flush the iotlb or just the write-buffer, depending on caching mode. Fix the same bug in qi_flush_iotlb() that qi_flush_context() had -- it isn't supposed to be returning an error; it's supposed to be returning a flag which triggers a write-buffer flush. Remove some superfluous conditional write-buffer flushes which could never have happened because they weren't for non-present-to-present mapping changes anyway. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | intel-iommu: Clean up handling of "caching mode" vs. context flushing.David Woodhouse2009-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It really doesn't make a lot of sense to have some of the logic to handle caching vs. non-caching mode duplicated in qi_flush_context() and __iommu_flush_context(), while the return value indicates whether the caller should take other action which depends on the same thing. Especially since qi_flush_context() thought it was returning something entirely different anyway. This patch makes qi_flush_context() and __iommu_flush_context() both return void, removes the 'non_present_entry_flush' argument and makes the only call site which _set_ that argument to 1 do the right thing. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | VT-d: fix invalid domain id for KVM context flushYu Zhao2009-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The domain->id is a sequence number associated with the KVM guest and should not be used for the context flush. This patch replaces the domain->id with a proper id value for both bare metal and KVM. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Acked-by: Weidong Han <weidong.han@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through SupportFenghua Yu2009-05-01
| | | | | | | | | | | | | | | | | | | | | | | | This updated patch should fix the compiling errors and remove the extern iommu_pass_through from drivers/pci/intel-iommu.c file. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | Intel IOMMU Pass Through SupportFenghua Yu2009-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds kernel parameter intel_iommu=pt to set up pass through mode in context mapping entry. This disables DMAR in linux kernel; but KVM still runs on VT-d and interrupt remapping still works. In this mode, kernel uses swiotlb for DMA API functions but other VT-d functionalities are enabled for KVM. KVM always uses multi level translation page table in VT-d. By default, pass though mode is disabled in kernel. This is useful when people don't want to enable VT-d DMAR in kernel but still want to use KVM and interrupt remapping for reasons like DMAR performance concern or debug purpose. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Weidong Han <weidong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2009-06-23
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6: firewire: new stack is no longer experimental firewire: net: better FIFO address range check and rcodes firewire: net: fix card driver reloading firewire: core: fix iso context shutdown on card removal firewire: core: fix DMA unmapping in iso buffer removal firewire: net: adjust net_device ops firewire: net: remove unused code firewire: net: allow for unordered unit discovery firewire: net: style changes firewire: net: add Kconfig item, rename driver firewire: add IPv4 support
| * | | firewire: new stack is no longer experimentalStefan Richter2009-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new stack is now recommended over the old one if used for industrial video (IIDC/DCAM) or for storage devices (SBP-2) due to better performance, improved compatibility, added features, and security. It should also be functionally on par with and is more secure than the old ieee1394 stack in the use case of consumer video devices. IP-over-1394 support for the new stack is currently emerging, and a backend of the firedtv DVB driver to the new stack should be available soon. The one remaining area where the old stack is still required are audio devices, as the new stack is not yet able to support the FFADO FireWire audio framework. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * | | firewire: net: better FIFO address range check and rcodesStefan Richter2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AR req handler should not check the generation; higher level code is the better place to handle bus generation changes. The target node ID just needs to be checked for not being the "all nodes" address; in this case don't handle the request and don't respond. Use Address_Error and Type_Error rcodes as appropriate. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * | | firewire: net: fix card driver reloadingStefan Richter2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some problems from "firewire: net: allow for unordered unit discovery": - fwnet_remove was missing a list_del, causing fwnet_probe to crash if called after fwnet_remove, e.g. if firewire-ohci was unloaded and reloaded. - fwnet_probe should set its new_netdev flag only if it actually allocated a net_device. - Use dev_set_drvdata and dev_get_drvdata instead of deprecated direct access to device.driver_data. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * | | firewire: core: fix iso context shutdown on card removalStefan Richter2009-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If isochronous contexts existed when firewire-ohci was unloaded, the core iso shutdown functions crashed with NULL dereferences, and buffers etc. weren't released. How the fix works: We first copy the card driver's iso shutdown hooks into the dummy driver, then fw_destroy_nodes notifies upper layers of devices going away, these should shut down (including their iso contexts), wait_for_completion(&card->done) will be triggered after upper layers gave up all fw_device references, after which the card driver's shutdown proceeds. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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