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* m68knommu: map ColdFire interrupts to correct masking bitsGreg Ungerer2009-09-15
| | | | | | | | | The older simple ColdFire interrupt controller has no one-to-one mapping of interrupt numbers to bits in the interrupt mask register. Create a mapping array that each ColdFire CPU type can populate with its available interrupts and the bits that each use in the interrupt mask register. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 532x CPU timer setupGreg Ungerer2009-09-15
| | | | | | | | | The newer ColdFire 532x family of CPU's uses the old timer, but has a newer interrupt controller. It doesn't need the special timer setup that was required when using the older interrupt controller. Remove the dead timer irq and level setting code, and define the hard coded vector. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: simplify ColdFire "timers" clock initializationGreg Ungerer2009-09-15
| | | | | | | | | The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: support code to mask external interrupts on old ColdFire CPU'sGreg Ungerer2009-09-15
| | | | | | | | The external interrupts used on the old Coldfire parts with the old style interrupt controller can be properly mask/unmasked in the interrupt handling code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: merge old ColdFire interrupt controller masking macrosGreg Ungerer2009-09-15
| | | | | | | | | | Currently the code that supports setting the old style ColdFire interrupt controller mask registers is macros in the include files of each of the CPU types. Merge all these into a set of real masking functions in the old Coldfire interrupt controller code proper. All the macros are basically the same (excepting a register size difference on really early parts). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove duplicate ColdFire mcf_autovector() codeGreg Ungerer2009-09-15
| | | | | | | | | Each of the ColdFire CPU platform code that used the old style interrupt controller had its own copy of the mcf_autovector() function. They are all the same, remove them all and create a single function in the common coldfire/intc.c code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move ColdFire INTC definitions to new include fileGreg Ungerer2009-09-15
| | | | | | | | Create an mcfintc.h include file with the definitions for the old style ColdFire interrupt controller. They are only needed on CPU's that use this old controller - so isolate them on their own. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: mask off all interrupts in ColdFire intc-simr controllerGreg Ungerer2009-09-15
| | | | | | | | The ColdFire intc-simr interrupt controller should mask off all interrupt sources at init time. Doing it here instead of separately in each platform setup. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove timer device interrupt setup for ColdFire 532xGreg Ungerer2009-09-15
| | | | | | | | With fully implemented interrupt controller code we don't need to do the custom interrupt setup for the timer device of the ColdFire 532x. Remove that code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove interrupt masking from ColdFire pit timerGreg Ungerer2009-09-15
| | | | | | | | With proper interrupt controller code in place there is no need for devices like the timers to have custom interrupt masking code. Remove it (and the defines that go along with it). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove unecessary interrupt level setting in ColdFire 520x setupGreg Ungerer2009-09-15
| | | | | | | | | The new code for the interrupt controller in the ColdFire 520x takes care of all the interrupt controller setup. No manual config of the level registers (ICR) is required by the platform device setup code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove the common interrupt controller structureGreg Ungerer2009-09-15
| | | | | | | | Each different m68knommu CPU interrupt controller type has its own interrupt controller data structures now. Remove the old, and now not used, common irq structs and init code from here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: complete interrupt controller code for the 68360 CPUGreg Ungerer2009-09-15
| | | | | | | | Define the interrupt controller structures along with the interrupt controller code for the 68360 CPU. This brings the interrupt setup and control into one place for this CPU family. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: complete interrupt controller code for the 68328 CPU'sGreg Ungerer2009-09-15
| | | | | | | | Define the interrupt controller structures along with the interrupt controller code for the 68328 CPU family. This brings the interrupt setup and control into one place for this CPU family. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use common interrupt controller code for older ColdFire CPU'sGreg Ungerer2009-09-15
| | | | | | | | | The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple interrupt controller. Use common setup code for them. This addition means that all ColdFire CPU's now have some specific type of interrupt controller code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 532x interrupt setupGreg Ungerer2009-09-15
| | | | | | | | With the common intc-simr interrupt controller code in place the ColdFire 532x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire 532x partsGreg Ungerer2009-09-15
| | | | | | | | | The ColdFire 532x family of parts uses 2 of the same INTC interrupt controlers used in the ColdFire 520x family. So modify the code to support both parts. The extra code for the second INTC controler in the case of the 520x is easily optimized away to nothing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 523x interrupt setupGreg Ungerer2009-09-15
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 523x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 528x interrupt setupGreg Ungerer2009-09-15
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 528x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 527x interrupt setupGreg Ungerer2009-09-15
| | | | | | | | With the common intc-2 interrupt controller code in place the ColdFire 527x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: general interrupt controller for ColdFire many 52xx partsGreg Ungerer2009-09-15
| | | | | | | | | | | | Create general interrupt controller code for the many ColdFire version 2 cores that use the two region INTC interrupt controller. This includes the 523x family, 5270, 5271, 5274, 5275, and the 528x families. This code does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove per device interrupt mask setting for ColdFire 520xGreg Ungerer2009-09-15
| | | | | | | With general interrupt controller code in place we don't need specific unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use general interrupt controller for ColdFire 520x familyGreg Ungerer2009-09-15
| | | | | | | | | | | | | | | | | | Create general interrupt controller code for the ColdFire 520x family, that does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Within the ColdFire family there is a variety of different interrupt controllers in use. Some are used on multiple parts, some on only one. There is quite some differences in some varients, so much so that common code for all ColdFire parts would be impossible. This commit introduces code to support one of the newer interrupt controllers in the ColdFire 5208 and 5207 parts. It has very simple mask and unmask operations, so is one of the easiest to support. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: clean up comment delimiters in dma.hGreg Ungerer2009-09-15
| | | | | | Change C99 style comments to traditional K&R style. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: merge mmu and non-mmu versions of dma.hGreg Ungerer2009-09-15
| | | | | | | | The non-mmu version of dma.h contains a lot of ColdFire specific DMA support, but also all of the base m68k support. So use the non-mmu version of dma.h for all. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: merge the mmu and non-mmu versions of checksum.hGreg Ungerer2009-09-15
| | | | | | | The mmu and non-mmu versions of checksum.h are mostly the same, merge them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: merge mmu and non-mmu versions of irq.hGreg Ungerer2009-09-15
| | | | | | | It is reasonably strait forward to merge the mmu and non-mmu versions of irq.h. Most of the defines and structs are not needed on non-mmu. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: merge mmu and non-mmu versions of processor.hGreg Ungerer2009-09-15
| | | | | | | | The mmu and non-mmu versions of processor.h have a lot of common code. This is a strait forward merge. start_thread() could be improved, but that is not quite as strait forward, leaving for a follow on change. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: convert to asm-generic/hardirq.hChristoph Hellwig2009-09-15
| | | | | Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: remove unused elia.h include fileGreg Ungerer2009-09-15
| | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* arch/m68knommu/kernel/time.c: Remove unnecessary semicolonsJoe Perches2009-09-15
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support misc files.sfking@fdwdc.com2009-09-09
| | | | | | | The definition of MCFSIM_PADDR and MCFSIM_PADAT now has MCF_BAR already added in. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5407.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5407. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 532x.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 532x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5307.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5307. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 528x.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 528x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5272.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5272. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 527x.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5271 & 5275. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5249.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5249. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 523x.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 523x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 520x.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 520x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldire 5206e.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5206e. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* generic GPIO support for the Freescale Coldfire 5206.sfking@fdwdc.com2009-09-09
| | | | | | | Add support for the 5206. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* core generic GPIO support for Freescale Coldfire processors.sfking@fdwdc.com2009-09-09
| | | | | | | This adds the basic infrastructure used by all of the different Coldfire CPUs. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* Linux 2.6.31v2.6.31Linus Torvalds2009-09-09
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* aoe: allocate unused request_queue for sysfsEd Cashin2009-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Andy Whitcroft reported an oops in aoe triggered by use of an incorrectly initialised request_queue object: [ 2645.959090] kobject '<NULL>' (ffff880059ca22c0): tried to add an uninitialized object, something is seriously wrong. [ 2645.959104] Pid: 6, comm: events/0 Not tainted 2.6.31-5-generic #24-Ubuntu [ 2645.959107] Call Trace: [ 2645.959139] [<ffffffff8126ca2f>] kobject_add+0x5f/0x70 [ 2645.959151] [<ffffffff8125b4ab>] blk_register_queue+0x8b/0xf0 [ 2645.959155] [<ffffffff8126043f>] add_disk+0x8f/0x160 [ 2645.959161] [<ffffffffa01673c4>] aoeblk_gdalloc+0x164/0x1c0 [aoe] The request queue of an aoe device is not used but can be allocated in code that does not sleep. Bruno bisected this regression down to cd43e26f071524647e660706b784ebcbefbd2e44 block: Expose stacked device queues in sysfs "This seems to generate /sys/block/$device/queue and its contents for everyone who is using queues, not just for those queues that have a non-NULL queue->request_fn." Addresses http://bugs.launchpad.net/bugs/410198 Addresses http://bugzilla.kernel.org/show_bug.cgi?id=13942 Note that embedding a queue inside another object has always been an illegal construct, since the queues are reference counted and must persist until the last reference is dropped. So aoe was always buggy in this respect (Jens). Signed-off-by: Ed Cashin <ecashin@coraid.com> Cc: Andy Whitcroft <apw@canonical.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Bruno Premont <bonbons@linux-vserver.org> Cc: Martin K. Petersen <martin.petersen@oracle.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
* i915: disable interrupts before tearing down GEM stateLinus Torvalds2009-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reinette Chatre reports a frozen system (with blinking keyboard LEDs) when switching from graphics mode to the text console, or when suspending (which does the same thing). With netconsole, the oops turned out to be BUG: unable to handle kernel NULL pointer dereference at 0000000000000084 IP: [<ffffffffa03ecaab>] i915_driver_irq_handler+0x26b/0xd20 [i915] and it's due to the i915_gem.c code doing drm_irq_uninstall() after having done i915_gem_idle(). And the i915_gem_idle() path will do i915_gem_idle() -> i915_gem_cleanup_ringbuffer() -> i915_gem_cleanup_hws() -> dev_priv->hw_status_page = NULL; but if an i915 interrupt comes in after this stage, it may want to access that hw_status_page, and gets the above NULL pointer dereference. And since the NULL pointer dereference happens from within an interrupt, and with the screen still in graphics mode, the common end result is simply a silently hung machine. Fix it by simply uninstalling the irq handler before idling rather than after. Fixes http://bugzilla.kernel.org/show_bug.cgi?id=13819 Reported-and-tested-by: Reinette Chatre <reinette.chatre@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* drm/i915: fix mask bits settingZhenyu Wang2009-09-08
| | | | | | | | | | | | | eDP is exclusive connector too, and add missing crtc_mask setting for TV. This fixes http://bugzilla.kernel.org/show_bug.cgi?id=14139 Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reported-and-tested-by: Carlos R. Mafra <crmafra2@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'drm-fixes' of ↵Linus Torvalds2009-09-07
|\ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/kms: add LTE/GTE discard + rv515 two sided stencil register.
| * drm/radeon/kms: add LTE/GTE discard + rv515 two sided stencil register.Dave Airlie2009-09-07
| | | | | | | | | | | | | | | | | | | | | | This adds some rv350+ register for LTE/GTE discard, and enables the rv515 two sided stencil register. It also disables the DEPTHXY_OFFSET register which can be used to workaround the CS checker. Moves rs690 to proper place in rs600 and uses correct table on rs600. Signed-off-by: Dave Airlie <airlied@redhat.com>
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