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* mmc: sdio: don't power up cards on system suspendOhad Ben-Cohen2011-01-08
| | | | | | | | | | | | | | | | | | | | | | | Initial SDIO runtime PM implementation took a conservative approach of powering up cards (and fully reinitializing them) on system suspend, just before the suspend handlers of the relevant drivers were executed. To avoid redundant power and reinitialization cycles, this patch removes this behavior: if a card is already powered off when system suspend kicks in, it is left at that state. If a card is active when a system sleep starts, everything is straightforward and works exactly like before. But if the card was already suspended before the sleep began, then when the MMC core powers it back up on resume, its run-time PM status has to be updated to reflect the actual post-system sleep status. The technique to do that is borrowed from the I2C runtime PM implementation (for more info see Documentation/power/runtime_pm.txt). Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: skip detection of nonremovable cards on rescanOhad Ben-Cohen2011-01-08
| | | | | | | | | | | | | | | | mmc_rescan() checks whether registered cards are still present before skipping them, by calling the bus-specific ->detect() handler. With buses that support runtime PM, the card may be powered off at this point, so they need to be powered on and fully reinitialized before ->detect() executes. This whole process is redundant with nonremovable cards; in those cases, we can safely skip calling ->detect() and implicitly assume its success. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: Add support for JMicron 388 SD/MMC controllerTakashi Iwai2011-01-08
| | | | | | | | | | | | | | | | | | | | | JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for SD, but MMC doesn't work with the low-voltage, resulting in an error at probing. This patch adds the support for multiple voltage mask per device type, so that SD works with 1.8V while MMC forces 3.3V. Here new ocr_avail_* fields for each device are introduced, so that the actual OCR mask is switched dynamically. Also, the restriction of low-voltage in core/sd.c is removed when the bit is allowed explicitly via ocr_avail_sd mask. This patch was rewritten from scratch based on Aries' original code. Signed-off-by: Aries Lee <arieslee@jmicron.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: davinci_mmc: Remove unnecessary semicolonJoe Perches2011-01-08
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: print SD Command and CAPABILITY_1 when dumping registersPhilip Rakity2011-01-08
| | | | | | | | | | More information should be shown when sdhci_dumpregs is called. Knowing the command is useful for debugging, and Capability 1 is useful for SD v3. Signed-off-by: Philip Rakity <prakity@marvell.com> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: Aggressive clock gating frameworkLinus Walleij2011-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the MMC core code to optionally call the set_ios() operation on the driver with the clock frequency set to 0 (gate) after a grace period of at least 8 MCLK cycles, then restore it (ungate) before any new request. This gives the driver the option to shut down the MCI clock to the MMC/SD card when the clock frequency is 0, i.e. the core has stated that the MCI clock does not need to be generated. It is inspired by existing clock gating code found in the OMAP and Atmel drivers and brings this up to the host abstraction. Gating is performed before and after any MMC request. This patchset implements this for the MMCI/PL180 MMC/SD host controller, but it should be simple to switch OMAP/Atmel over to using this instead. mmc_set_{gated,ungated}() add variable protection to the state holders for the clock gating code. This is particularly important when ordinary .set_ios() calls would race with the .set_ios() call resulting from a delayed gate operation. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Reviewed-by: Chris Ball <cjb@laptop.org> Tested-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: sdhci: Disable ADMA on some O2Micro SD/MMC parts.Jennifer Li2011-01-08
| | | | | | | | This patch disables the broken ADMA on selected O2Micro devices. Signed-off-by: Jennifer Li <Jennifer.li@o2micro.com> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxcmmc: remove a unnecessary release_resource() callAxel Lin2011-01-08
| | | | | | | | Remove release_resource() after release_mem_region(). Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxcmmc: update the regulator support code to the latest APIAlberto Panizzo2011-01-08
| | | | | | | | | This also fixes the build problem introduced by my previous patch due to unhandled API changes introduced by commit: 99fc513101 (mmc: Move regulator handling closer to core) Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: mxcmmc: Allow binding a regulator to manage the MMC card voltageAlberto Panizzo2011-01-08
| | | | | | | | | This implementation is based on the pxamci.c driver and it will be used to support the mx31_3ds machine. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* ARM: dove: Switch SDHCI devices over to "sdhci-dove" driverMike Rapoport2011-01-08
| | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* mmc: Add support for the Marvell Dove SDHCI controllerMike Rapoport2011-01-08
| | | | | | | | | | Implement an sdhci-pltfm driver for the controller found in the Marvell Dove SoC. Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* Merge branch 'for-next' of ↵Linus Torvalds2011-01-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hch/hfsplus * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/hch/hfsplus: hfsplus: %L-to-%ll, macro correction, and remove unneeded braces hfsplus: spaces/indentation clean-up hfsplus: C99 comments clean-up hfsplus: over 80 character lines clean-up hfsplus: fix an artifact in ioctl flag checking hfsplus: flush disk caches in sync and fsync hfsplus: optimize fsync hfsplus: split up inode flags hfsplus: write up fsync for directories hfsplus: simplify fsync hfsplus: avoid useless work in hfsplus_sync_fs hfsplus: make sure sync writes out all metadata hfsplus: use raw bio access for partition tables hfsplus: use raw bio access for the volume headers hfsplus: always use hfsplus_sync_fs to write the volume header hfsplus: silence a few debug printks hfsplus: fix option parsing during remount Fix up conflicts due to VFS changes in fs/hfsplus/{hfsplus_fs.h,unicode.c}
| * hfsplus: %L-to-%ll, macro correction, and remove unneeded bracesAnton Salikhmetov2010-12-16
| | | | | | | | | | | | | | | | | | | | Clean-up based on checkpatch.pl report against unnecessary braces (`{' and `}'), non-standard format option %Lu (%llu recommended) as well as one trailing statement in a macro definition which should have been on the next line. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: spaces/indentation clean-upAnton Salikhmetov2010-12-16
| | | | | | | | | | | | | | Fix incorrect spaces and indentation reported by checkpatch.pl. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: C99 comments clean-upAnton Salikhmetov2010-12-16
| | | | | | | | | | | | | | | | Match coding style restriction against C99 comments where checkpatch.pl reported errors about their usage. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: over 80 character lines clean-upAnton Salikhmetov2010-12-16
| | | | | | | | | | | | | | | | Match coding style line length limitation where checkpatch.pl reported over-80-character-line warnings. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: fix an artifact in ioctl flag checkingAnton Salikhmetov2010-12-16
| | | | | | | | | | | | | | | | Fix a flag checking artifact in hfsplus_ioctl_getflags() routine found while doing clean-up against assignments inside `if's. Signed-off-by: Anton Salikhmetov <alexo@tuxera.com> Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: flush disk caches in sync and fsyncChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | | | Flush the disk cache in fsync and sync to make sure data actually is on disk on completion of these system calls. There is a nobarrier mount option to disable this behaviour. It's slightly misnamed now that barrier actually are gone, but it matches the name used by all major filesystems. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: optimize fsyncChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | | | Avoid doing unessecary work in fsync. Do nothing unless the inode was marked dirty, and only write the various metadata inodes out if they contain any dirty state from this inode. This is archived by adding three new dirty bits to the hfsplus-specific inode which are set in the correct places. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: split up inode flagsChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | Split the flags field in the hfsplus inode into an extent_state flag that is locked by the extent_lock, and a new flags field that uses atomic bitops. The second will grow more flags in the next patch. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: write up fsync for directoriesChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | fsync is supposed to not just work on regular files, but also on directories. Fortunately enough hfsplus_file_fsync works just fine for directories, so we can just wire it up. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: simplify fsyncChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | | | Remove lots of code we don't need from fsync, we just need to call ->write_inode on the inode if it's dirty, for which sync_inode_metadata is a lot more efficient than write_inode_now, and we need to write out the various metadata inodes, which we now do explicitly instead of by calling ->sync_fs. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: avoid useless work in hfsplus_sync_fsChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | There is no reason to write out the metadata inodes or volume headers during a non-blocking sync, as we are almost guaranteed to dirty them again during the inode writeouts. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: make sure sync writes out all metadataChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | | | | | | | | | hfsplus stores all metadata except for the volume headers in special inodes. While these are marked hashed and periodically written out by the flusher threads, we can't rely on that for sync. For the case of a data integrity sync the VM has life-lock avoidance code that avoids writing inodes again that are redirtied during the sync, which is something that can happen easily for hfsplus. So make sure we explicitly write out the metadata inodes at the beginning of hfsplus_sync_fs. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: use raw bio access for partition tablesChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | Switch the hfsplus partition table reding for cdroms to use our bio helpers. Again we don't rely on any caching in the buffer_heads, and this gets rid of the last buffer_head use in hfsplus. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: use raw bio access for the volume headersChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hfsplus backup volume header is located two blocks from the end of the device. In case of device sizes that are not 4k aligned this means we can't access it using buffer_heads when using the default 4k block size. Switch to using raw bios to read/write all buffer headers. We were not relying on any caching behaviour of the buffer heads anyway. Additionally always read in the backup volume header during mount to verify that we can actually read it. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: always use hfsplus_sync_fs to write the volume headerChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | | | | | Remove opencoded writing of the volume header in hfsplus_fill_super and hfsplus_put_super and offload it to hfsplus_sync_fs. In the put_super case this means we only write the superblock once instead of twice. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: silence a few debug printksChristoph Hellwig2010-11-23
| | | | | | | | | | | | | | Turn a few noisy debug printks that show up during xfstests into complied out debug print statements. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
| * hfsplus: fix option parsing during remountChristoph Hellwig2010-11-07
| | | | | | | | | | | | | | | | | | | | | | | | hfsplus only actually uses the force option during remount, but it uses the full option parser with a fake superblock to do so. This means remount will fail if any nls option is set (which happens frequently with older mount tools), even if it is the same. Fix this by adding a simpler version of the parser that only parses the force option for remount. Signed-off-by: Christoph Hellwig <hch@tuxera.com>
* | Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-01-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
| * | spi/omap: Fix DMA API usage in OMAP MCSPI driverRussell King - ARM Linux2011-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running the latest kernel on the 4430SDP board with DMA API debugging enabled results in this: WARNING: at lib/dma-debug.c:803 check_unmap+0x19c/0x6f0() NULL NULL: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x000000008129901a] [size=260 bytes] Modules linked in: Backtrace: [<c003cbe0>] (dump_backtrace+0x0/0x10c) from [<c0278da8>] (dump_stack+0x18/0x1c) r7:c1839dc0 r6:c0198578 r5:c0304b17 r4:00000323 [<c0278d90>] (dump_stack+0x0/0x1c) from [<c005b158>] (warn_slowpath_common+0x58/0x70) [<c005b100>] (warn_slowpath_common+0x0/0x70) from [<c005b214>] (warn_slowpath_fmt+0x38/0x40) r8:c1839e40 r7:00000000 r6:00000104 r5:00000000 r4:8129901a [<c005b1dc>] (warn_slowpath_fmt+0x0/0x40) from [<c0198578>] (check_unmap+0x19c/0x6f0) r3:c03110de r2:c0304e6b [<c01983dc>] (check_unmap+0x0/0x6f0) from [<c0198cd8>] (debug_dma_unmap_page+0x74/0x80) [<c0198c64>] (debug_dma_unmap_page+0x0/0x80) from [<c01d5ad8>] (omap2_mcspi_work+0x514/0xbf0) [<c01d55c4>] (omap2_mcspi_work+0x0/0xbf0) from [<c006dfb0>] (process_one_work+0x294/0x400) [<c006dd1c>] (process_one_work+0x0/0x400) from [<c006e50c>] (worker_thread+0x220/0x3f8) [<c006e2ec>] (worker_thread+0x0/0x3f8) from [<c00738d0>] (kthread+0x88/0x90) [<c0073848>] (kthread+0x0/0x90) from [<c005e924>] (do_exit+0x0/0x5fc) r7:00000013 r6:c005e924 r5:c0073848 r4:c1829ee0 ---[ end trace 1b75b31a2719ed20 ]--- I've no idea why this driver uses NULL for dma_unmap_single instead of the &spi->dev that is laying around just waiting to be used in that function - but it's an easy fix. Also replace this comment with a FIXME comment: /* Do DMA mapping "early" for better error reporting and * dcache use. Note that if dma_unmap_single() ever starts * to do real work on ARM, we'd need to clean up mappings * for previous transfers on *ALL* exits of this loop... */ as the comment is not true - we do work in dma_unmap() functions, particularly on ARMv6 and above. I've corrected the existing unmap functions but if any others are required they must be added ASAP. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/imx: correct the test on platform_get_irq() return valueRichard Genoud2011-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The test "if (spi_imx->irq <= 0)" is not testing the IRQ value, but the return value of platform_get_irq(). As platform_get_irq() can return an error (-ENXIO) or the IRQ value it found, the test should be "if (spi_imx->irq < 0)" [grant.likely: Note: In general, Linux irq number 0 should also mean no irq, but arm still allows devices to be assigned 0, and the imx platform uses 0 for one of the spi devices, so this patch is needed for the device to work] Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/topcliff: Typo fix threhold to thresholdJustin P. Mattock2010-12-31
| | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/dw_spi Typo change diable to disable.Justin P. Mattock2010-12-31
| | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | spi/fsl_espi: change the read behaviour of the SPIRFMingkai Hu2010-12-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the amount of data in the receive FIFO, so read the SPIRF byte by byte when the data in receive FIFO is less than 4 bytes. On Simics, when read N bytes that exceed the amout of data in receive FIFO, we can't read the data out, that is we can't clear the rx FIFO, then the CPU will loop on the espi rx interrupt. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/nextGrant Likely2010-12-29
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next spi/pxa2xx: register driver properly spi/pxa2xx: add support for shared IRQ handler spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers arm/pxa2xx: reorgazine SSP and SPI header files spi/pxa2xx: Add CE4100 support spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: pass of_node to spi device and set a parent device
| | * | spi/pxa2xx: pass of_node to spi device and set a parent deviceSebastian Andrzej Siewior2010-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | the of_node will auto-publish devices which are added to the device tree. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
| | * | spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.Sebastian Andrzej Siewior2010-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After all TX bytes are sent, the driver spins while the SPI core is busy and then it spins for a "short" period of time until RX bytes are available. On Sodavile the busy flag disappears pretty quick and after that it takes approx ~130ms (sometimes less but not much) until there are bytes available in the RX FIFO. This patch removes the busy loop and modifies the RX threshould so we get woken up once the remainings bytes arrived. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Add chipselect support for SodavilleSebastian Andrzej Siewior2010-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI core on Sodaville supports chip selects. Its configuration moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked up with up to 4 devices. This patch ensures that the bits which are otherwiese reserved are only touched on Sodaville and not on any other PXAs. Also it makes sure that the status register does not lose the CS information while clearing the ROR bit. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Consider CE4100's FIFO depthSebastian Andrzej Siewior2010-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for CE4100. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Add CE4100 supportSebastian Andrzej Siewior2010-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sodaville's SPI controller is very much the same as in PXA25x. The difference: - The RX/TX FIFO is only 4 words deep instead of 16 - No DMA support - The SPI controller offers a CS functionality Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | arm/pxa2xx: reorgazine SSP and SPI header filesSebastian Andrzej Siewior2010-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbersSebastian Andrzej Siewior2010-12-01
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: add support for shared IRQ handlerSebastian Andrzej Siewior2010-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required in case the interrupt line is shared with other devices. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * | spi/pxa2xx: register driver properlySebastian Andrzej Siewior2010-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use platform_driver_register instead of platform_driver_probe. The latter only checks available devices at the time of calling. So if a device gets inserter at a later point in time then the driver will never play with it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| * | | Merge branch 'for-grant' of ↵Grant Likely2010-12-29
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://arago-project.org/git/projects/linux-davinci into spi/next * 'for-grant' of git://arago-project.org/git/projects/linux-davinci into spi/next spi: davinci: fix checkpatch errors spi: davinci: whitespace cleanup spi: davinci: remove unused variable 'pdata' spi: davinci: set chip-select mode in SPIDEF only once spi: davinci: enable both activation and deactivation of chip-selects spi: davinci: remove unnecessary data transmit on CS disable spi: davinci: enable GPIO lines to be used as chip selects spi: davinci: simplify prescalar calculation spi: davinci: remove 'wait_enable' platform data member spi: davinci: make chip-slect specific parameters really chip-select specific spi: davinci: consolidate setup of SPIFMTn in one function spi: davinci: setup chip-select timers values only if timer enabled spi: davinci: add support for wait enable timeouts spi: davinci: remove unused members of davinci_spi_slave spi: davinci: eliminate the single member structure davinci_spi_slave spi: davinci: eliminate unnecessary update of davinci_spi->count spi: davinci: simplify calculation of edma acount value spi: davinci: check for NULL buffer pointer before using it spi: davinci: remove unnecessary disable of SPI spi: davinci: remove unnecessary 'count' variable in driver private data spi: davinci: remove unnecessary completion variable initialization spi: davinci: remove non-useful interrupt mode support spi: davinci: simplify poll mode transfers spi: davinci: add support for interrupt mode spi: davinci: configure the invariable bits in spipc0 only once spi: davinci: remove unnecessary function davinci_spi_bufs_prep() spi: davinci: remove unnecessary call to davinci_spi_setup_transfer() spi: davinci: do not store DMA channel information per chip select spi: davinci: always start transmit DMA spi: davinci: do not use temporary buffer if no transmit data provided spi: davinci: always start receive DMA spi: davinci: use edma_write_slot() to setup EDMA PaRAM slot spi: davinci: fix DMA event generation stoppage spi: davinci: fix EDMA CC errors at end of transfers spi: davinci: handle DMA completion errors correctly spi: davinci: remove usage of additional completion variables for DMA spi: davinci: let DMA operation be specified on per-device basis spi: davinci: remove non-useful "clk_internal" platform data spi: davinci: enable and power-up SPI only when required spi: davinci: setup the driver owner spi: davinci: add additional comments spi: davinci: add EF Johnson Technologies copyright spi: davinci: removed unused #defines spi: davinci: remove unnecessary typecast spi: davinci: do not treat Tx interrupt being set as error spi: davinci: do not allocate DMA channels during SPI device setup spi: davinci: remove unnecessary private data member 'region_size' spi: davinci: shorten variable names spi: davinci: kconfig: add manufacturer name to prompt string
| | * | | spi: davinci: kconfig: add manufacturer name to prompt stringSekhar Nori2010-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add manufacturer name to the Kconfig prompt string and move the controller name to the begining of the prompt. This helps locate the driver easily among the list of existing drivers. While at it, also add information about being able to build the driver as module. Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | spi: davinci: shorten variable namesSekhar Nori2010-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Shorten names of local variables and structure members where possible. Local variables: * 'davinci_spi' is being renamed 'dspi' * 'davinci_spi_dma' is being renamed 'dma' Structure members: * 'dma_{tx|rx}_channel' is being renamed '{tx|rx}_channel' since the structure containing them is already called 'davinci_spi_dma' * 'davinci_spi_dma' in 'davinci_spi' structure is being renamed 'dma' Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | spi: davinci: remove unnecessary private data member 'region_size'Sekhar Nori2010-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecesary private data member 'region_size' being used to store the size of SPI memory region. Instead, get the memory resource size directly from the platform data. Tested-By: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>