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* pata_atp867x: clarifications in timings calculations and cable detectionJohn(Jung-Ik) Lee2009-10-06
| | | | | | Signed-off-by: John(Jung-Ik) Lee <jilee@google.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_atp867x: fix it to not claim MWDMA supportBartlomiej Zolnierkiewicz2009-10-06
| | | | | | | | MWDMA modes are not supported by this driver currently. Acked-by: Jung-Ik (John) Lee <jilee@google.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: fix incorrect link online check during probeTejun Heo2009-10-06
| | | | | | | | | | | | | | | | | | | While trying to work around spurious detection retries for non-existent devices on slave links, commit 816ab89782ac139a8b65147cca990822bb7e8675 incorrectly added link offline check logic before ata_eh_thaw() was called. This means that if an occupied link goes down briefly at the time that offline check was performed, device class will be cleared to ATA_DEV_NONE and libata wouldn't retry thus failing detection of the device. The offline check should be done after the port is thawed together with online check so that such link glitches can be detected by the interrupt handler and handled properly. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Tim Blechmann <tim@klingt.org> Cc: stable@kernel.org Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: filter FPDMA non-zero offset enable for Aspire 3810TTejun Heo2009-10-06
| | | | | | | | | | | | | | | | | | | | | | Curiously, Aspire 3810T issues many SATA feature enable commands via _GTF, of which one is invalid and another is not supported by the drive. In the process, it also enables FPDMA non-zero offset. However, the feature also needs to be supported and enabled from the controller and it's wrong to enable it from _GTF unless the controller can do it by default. Currently, this ends up enabling FPDMA non-zero offset only on the drive side leading to NCQ command failures and eventual disabling of NCQ. This patch makes libata filter out FPDMA non-zero offset enable for the machine. This was reported by Marcus Meissner in bnc#522790. https://bugzilla.novell.com/show_bug.cgi?id=522790 Reported-by: Marcus Meissner <meissner@novell.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: make gtf_filter per-devTejun Heo2009-10-06
| | | | | | | | | Add ->gtf_filter to ata_device and set it to ata_acpi_gtf_filter when initializing ata_link. This is to allow quirks which apply different gtf filters. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: implement more acpi filtering optionsTejun Heo2009-10-06
| | | | | | | | | Currently libata-acpi can only filter DIPM among SATA feature enables via _GTF. This patch adds the capability to filter out FPDMA non-zero offset, in-order guarantee and auto-activation. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: cosmetic updatesTejun Heo2009-10-06
| | | | | | | | We're about to add more SATA_* and ATA_ACPI_FILTER_* constants. Reformat them in preparation. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: display all AHCI 1.3 HBA capability flags (v2)Robert Hancock2009-10-06
| | | | | | | | | | | | | | | | | | | | | | | Update the AHCI driver to display all of the HBA capabilities defined in the AHCI 1.3 specification. Some of these are in a new CAP2 (HBA Capabilities Extended) register which is only defined on AHCI 1.2 or later. The spec says that undefined registers should always return 0 on read, but to be safe we assume a value of 0 unless the controller reports AHCI version 1.2 or later. The value can also be retrieved through sysfs as with the existing capability field. For example, on an Intel Ibex Peak (PCH) controller: ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pmp pio slum part ems sxs apst We don't do anything special with the new flags yet. Also, change the code that displays the flags to use the same bit enumerations that are used to control actual operation. Signed-off-by: Robert Hancock <hancockrwd@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_ali: trivial fix of a very frequent spelling mistakeDirk Hohndel2009-10-06
| | | | | | | | | | | | something-bility is spelled as something-blity so a grep for 'blit' would find these lines I broke this one out from the rest as it actually changes the output of a kernel message - so it could in theory change the behavior of tools that parse that ouput Signed-off-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: disable 64bit DMA by default on SB600sTejun Heo2009-10-06
| | | | | | | | | | | | | | Till now only one board, ASUS M2A-VM, can do 64bit dma with recent BIOSen. Enabling 64bit DMA by default already broke three boards. Enabling 64bit DMA isn't worth these regressions. Disable 64bit DMA by default and enable it only on boards which are known to work. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Gabriele Balducci <balducci@units.it> Reported-by: maierp@informatik.tu-muenchen.de Cc: Shane Huang <shane.huang@amd.com> Cc: stable@kernel.org Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* Merge branch 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2009-10-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: add support for change_pte mmu notifiers KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptes KVM: MMU: dont hold pagecount reference for mapped sptes pages KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID KVM: VMX: flush TLB with INVEPT on cpu migration KVM: fix LAPIC timer period overflow KVM: s390: fix memsize >= 4G KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly KVM: SVM: Fix tsc offset adjustment when running nested
| * KVM: add support for change_pte mmu notifiersIzik Eidus2009-10-04
| | | | | | | | | | | | | | | | | | | | this is needed for kvm if it want ksm to directly map pages into its shadow page tables. [marcelo: cast pfn assignment to u64] Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptesIzik Eidus2009-10-04
| | | | | | | | | | | | | | | | | | | | | | this flag notify that the host physical page we are pointing to from the spte is write protected, and therefore we cant change its access to be write unless we run get_user_pages(write = 1). (this is needed for change_pte support in kvm) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: MMU: dont hold pagecount reference for mapped sptes pagesIzik Eidus2009-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using mmu notifiers, we are allowed to remove the page count reference tooken by get_user_pages to a specific page that is mapped inside the shadow page tables. This is needed so we can balance the pagecount against mapcount checking. (Right now kvm increase the pagecount and does not increase the mapcount when mapping page into shadow page table entry, so when comparing pagecount against mapcount, you have no reliable result.) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUIDAvi Kivity2009-10-04
| | | | | | | | | | | | | | | | | | The number of entries is multiplied by the entry size, which can overflow on 32-bit hosts. Bound the entry count instead. Reported-by: David Wagner <daw@cs.berkeley.edu> Cc: stable@kernel.org Signed-off-by: Avi Kivity <avi@redhat.com>
| * KVM: VMX: flush TLB with INVEPT on cpu migrationMarcelo Tosatti2009-10-04
| | | | | | | | | | | | | | | | | | | | | | It is possible that stale EPTP-tagged mappings are used, if a vcpu migrates to a different pcpu. Set KVM_REQ_TLB_FLUSH in vmx_vcpu_load, when switching pcpus, which will invalidate both VPID and EPT mappings on the next vm-entry. Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: fix LAPIC timer period overflowAurelien Jarno2009-10-04
| | | | | | | | | | | | | | | | | | | | Don't overflow when computing the 64-bit period from 32-bit registers. Fixes sourceforge bug #2826486. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: s390: fix memsize >= 4GChristian Borntraeger2009-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | commit 628eb9b8a8f3 KVM: s390: streamline memslot handling introduced kvm_s390_vcpu_get_memsize. This broke guests >=4G, since this function returned an int. This patch changes the return value to a long. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctlyJoerg Roedel2009-10-04
| | | | | | | | | | | | | | | | | | | | When running nested we need to touch the l1 guests tsc_offset. Otherwise changes will be lost or a wrong value be read. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: SVM: Fix tsc offset adjustment when running nestedJoerg Roedel2009-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | When svm_vcpu_load is called while the vcpu is running in guest mode the tsc adjustment made there is lost on the next emulated #vmexit. This causes the tsc running backwards in the guest. This patch fixes the issue by also adjusting the tsc_offset in the emulated hsave area so that it will not get lost. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* | Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-10-05
|\ \ | | | | | | | | | | | | | | | * 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Clear sticky FSR register after saving it to func parametr microblaze: UMS is used only for MMU kernel
| * | microblaze: Clear sticky FSR register after saving it to func parametrMichal Simek2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear it for noMMU kernel. This one do it for MMU. Correct noMMU version Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: UMS is used only for MMU kernelMichal Simek2009-10-05
| | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2009-10-05
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc: using HZ needs an include of linux/param.h sparc32: convert to asm-generic/hardirq.h sparc64: Cache per-cpu %pcr register value in perf code. sparc64: Fix comment typo in perf_event.c sparc64: Minor coding style fixups in perf code. sparc64: Add a basic conflict engine in preparation for multi-counter support. sparc64: Increase vmalloc size to fix percpu regressions. sparc64: Add initial perf event conflict resolution and checks. sparc: Niagara1 perf event support. sparc: Add Niagara2 HW cache event support. sparc: Support all ultra3 and ultra4 derivatives. sparc: Support HW cache events.
| * | | sparc: using HZ needs an include of linux/param.hStephen Rothwell2009-10-05
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc32: convert to asm-generic/hardirq.hChristoph Hellwig2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Christoph Hellwig <hch@lst.de> [akpm@linux-foundation.org: /arch/sparc/include/asm/irq_32.h: move NR_IRQS definition] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Cache per-cpu %pcr register value in perf code.David S. Miller2009-09-30
| | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Fix comment typo in perf_event.cDavid S. Miller2009-09-29
| | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Minor coding style fixups in perf code.David S. Miller2009-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These got introduced during the counter --> event tree-wide renaming. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Add a basic conflict engine in preparation for multi-counter support.David S. Miller2009-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware counter ->event_base state records and encoding of the "struct perf_event_map" entry used for the event. We use this to make sure that when we have more than 1 event, both can be scheduled into the hardware at the same time. As usual, structure of code is largely cribbed from powerpc. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Increase vmalloc size to fix percpu regressions.David S. Miller2009-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we now use the embedding percpu allocator we have to make the vmalloc area at least as large as the stretch can be between nodes. Besides some minor asm adjustments, this turned out to be pretty trivial. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Add initial perf event conflict resolution and checks.David S. Miller2009-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cribbed from powerpc code, as usual. :-) Currently it is only used to validate that all counters have the same user/kernel/hv attributes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Niagara1 perf event support.David S. Miller2009-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This chip is extremely limited, and many of the events supported are approximations at best. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Add Niagara2 HW cache event support.David S. Miller2009-09-27
| | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Support all ultra3 and ultra4 derivatives.David S. Miller2009-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For the generic events we support, all of these chips have the same encodings as ultra3i. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Support HW cache events.David S. Miller2009-09-26
| | | | | | | | | | | | | | | | | | | | | | | | First supported chip for HW cache events is Ultra-IIIi. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | iSCSI/iBFT: use proper address translationJan Beulich2009-10-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In virtual environments (namely, Xen Dom0) virt <-> phys and virt <-> isa-bus translations cannot be freely interchanged (and even outside such environments it is not really correct to do so). When looking at memory below 1M, the latter translations should always be used. iscsi_ibft_find.c part from: Martin Wilck <martin.wilck@ts.fujitsu.com>. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Peter Jones <pjones@redhat.com> Signed-off-by: Konrad Rzeszutek Wilk <ketuzsezs@darnok.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Merge branch 'perf-fixes-for-linus' of ↵Linus Torvalds2009-10-05
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf tools: Run generate-cmdlist.sh properly perf_event: Clean up perf_event_init_task() perf_event: Fix event group handling in __perf_event_sched_*() perf timechart: Add a power-only mode perf top: Add poll_idle to the skip list
| * | | | perf tools: Run generate-cmdlist.sh properlyMulyadi Santosa2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now generate-cmdlist.sh is not executable, so we should call it as an argument ".". This fixes cases where due to different umask defaults the generate-cmdlist.sh script is not executable in a kernel tree checkout. Signed-off-by: Mulyadi Santosa <mulyadi.santosa@gmail.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <f284c33d0909251201w422e9687x8cd3a784e85adf7d@mail.gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | perf_event: Clean up perf_event_init_task()Xiao Guangrong2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While at it: we can traverse ctx->group_list to get all group leader, it should be safe since we hold ctx->mutex. Changlog v1->v2: - remove WARN_ON_ONCE() according to Peter Zijlstra's suggestion Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <4ABC5AF9.6060808@cn.fujitsu.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | perf_event: Fix event group handling in __perf_event_sched_*()Xiao Guangrong2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Paul Mackerras says: "Actually, looking at this more closely, it has to be a group leader anyway since it's at the top level of ctx->group_list. In fact I see four places where we do: list_for_each_entry(event, &ctx->group_list, group_entry) { if (event == event->group_leader) ... or the equivalent, three of which appear to have been introduced by afedadf2 ("perf_counter: Optimize sched in/out of counters") back in May by Peter Z. As far as I can see the if () is superfluous in each case (a singleton event will be a group of 1 and will have its group_leader pointing to itself)." [ See: http://marc.info/?l=linux-kernel&m=125361238901442&w=2 ] And Peter Zijlstra points out this is a bugfix: "The intent was to call event_sched_{in,out}() for single event groups because that's cheaper than group_sched_{in,out}(), however.. - as you noticed, I got the condition wrong, it should have read: list_empty(&event->sibling_list) - it failed to call group_can_go_on() which deals with ->exclusive. - it also doesn't call hw_perf_group_sched_in() which might break power." [ See: http://marc.info/?l=linux-kernel&m=125369523318583&w=2 ] Changelog v1->v2: - Fix the title name according to Peter Zijlstra's suggestion - Remove the comments and WARN_ON_ONCE() as Peter Zijlstra's suggestion Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <4ABC5A55.7000208@cn.fujitsu.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | perf timechart: Add a power-only modeArjan van de Ven2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For doing work on the Linux power management components, I need to make long (30+ seconds) traces. Currently, this then results in a HUGE svg file, with mostly process data that isn't interesting. This patch adds a --power-only mode to perf timechart that only outputs the CPU power section of the SVG; this significantly reduces the size of the SVG file, making even 30+ second traces viewable with inkscape. As a minor tweak for the same effect, the minimum text size is decreased; current inkscape cannot zoom in deep enough to show text this small, but it reduces inkscape compute time. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Cc: peterz@infradead.org LKML-Reference: <20090924154013.0675ab71@infradead.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | perf top: Add poll_idle to the skip listArnaldo Carvalho de Melo2009-09-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mike Galbraith <efault@gmx.de> LKML-Reference: <20090925220239.GA5488@ghostprotocols.net> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | | Merge branch 'timers-fixes-for-linus' of ↵Linus Torvalds2009-10-05
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: hrtimer: Remove overly verbose "switch to high res mode" message
| * | | | | hrtimer: Remove overly verbose "switch to high res mode" messageRoland Dreier2009-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On big systems, printing <number of CPUs> copies of Switched to high resolution mode on CPU nnn clutters up the kernel log for minimal gain. Just get rid of them. Signed-off-by: Roland Dreier <rolandd@cisco.com> LKML-Reference: <ada1vlw126s.fsf_-_@cisco.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | | | Merge branch 'tracing-fixes-for-linus' of ↵Linus Torvalds2009-10-05
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'tracing-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: kmemtrace: Fix up tracer registration tracing: Fix infinite recursion in ftrace_update_pid_func()
| * | | | | | kmemtrace: Fix up tracer registrationPaul Mundt2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ddc1637af217dbd8bc51f30e6d24e84476a869a6 ("kmemtrace: Print binary output only if 'bin' option is set") ended up inverting the error detection logic. register_tracer() returns 0 on success, which this change caused to treat as an error, resulting in: [ 0.132000] Warning: could not register the kmem tracer as well as bailing out of the initcall with an error value. This restores the old logic. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Pekka Enberg <penberg@cs.helsinki.fi> Acked-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Li Zefan <lizf@cn.fujitsu.com> LKML-Reference: <20090928075540.GD6668@linux-sh.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | | | tracing: Fix infinite recursion in ftrace_update_pid_func()Matt Fleming2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST is enabled __ftrace_trace_function contains the current trace function, not ftrace_trace_function. In ftrace_update_pid_func() we currently incorrectly assign the value of ftrace_trace_function to __ftrace_trace_funcion before returning. Without this patch it is possible to execute an infinite recursion whereby ftrace_test_stop_func() calls __ftrace_trace_function, which was assigned ftrace_test_stop_func() in ftrace_update_pid_func(). Signed-off-by: Matt Fleming <matthew.fleming@imgtec.com> Acked-by: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <1254152581-18347-1-git-send-email-matt@console-pimps.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | | | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2009-10-05
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Don't leak 64-bit kernel register values to 32-bit processes x86, SLUB: Remove unused CONFIG FAST_CMPXCHG_LOCAL x86: earlyprintk: Fix regression to handle serial,ttySn as 1 arg x86: Don't generate cmpxchg8b_emu if CONFIG_X86_CMPXCHG64=y x86: Fix csum_ipv6_magic asm memory clobber x86: Optimize cmpxchg64() at build-time some more
| * | | | | | | x86: Don't leak 64-bit kernel register values to 32-bit processesJan Beulich2009-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While 32-bit processes can't directly access R8...R15, they can gain access to these registers by temporarily switching themselves into 64-bit mode. Therefore, registers not preserved anyway by called C functions (i.e. R8...R11) must be cleared prior to returning to user mode. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: <stable@kernel.org> LKML-Reference: <4AC34D73020000780001744A@vpn.id2.novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>