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* Merge branch 'x86/for-linus' of ↵Linus Torvalds2008-07-14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86/for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (821 commits) x86: make 64bit hpet_set_mapping to use ioremap too, v2 x86: get x86_phys_bits early x86: max_low_pfn_mapped fix #4 x86: change _node_to_cpumask_ptr to return const ptr x86: I/O APIC: remove an IRQ2-mask hack x86: fix numaq_tsc_disable calling x86, e820: remove end_user_pfn x86: max_low_pfn_mapped fix, #3 x86: max_low_pfn_mapped fix, #2 x86: max_low_pfn_mapped fix, #1 x86_64: fix delayed signals x86: remove conflicting nx6325 and nx6125 quirks x86: Recover timer_ack lost in the merge of the NMI watchdog x86: I/O APIC: Never configure IRQ2 x86: L-APIC: Always fully configure IRQ0 x86: L-APIC: Set IRQ0 as edge-triggered x86: merge dwarf2 headers x86: use AS_CFI instead of UNWIND_INFO x86: use ignore macro instead of hash comment x86: use matching CFI_ENDPROC ...
| * Merge commit 'v2.6.26' into x86/coreIngo Molnar2008-07-14
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| * | x86: make 64bit hpet_set_mapping to use ioremap too, v2Yinghai Lu2008-07-14
| | | | | | | | | | | | | | | | | | | | | keep the one for VSYSCALL_HPET Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: get x86_phys_bits earlyYinghai Lu2008-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when try to make hpet_enable use io_remap instead fixmap got ioremap: invalid physical address fed00000 ------------[ cut here ]------------ WARNING: at arch/x86/mm/ioremap.c:161 __ioremap_caller+0x8c/0x2f3() Modules linked in: Pid: 0, comm: swapper Not tainted 2.6.26-rc9-tip-01873-ga9827e7-dirty #358 Call Trace: [<ffffffff8026615e>] warn_on_slowpath+0x6c/0xa7 [<ffffffff802e2313>] ? __slab_alloc+0x20a/0x3fb [<ffffffff802d85c5>] ? mpol_new+0x88/0x17d [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8024b0d2>] __ioremap_caller+0x8c/0x2f3 [<ffffffff80e86dbd>] ? hpet_enable+0x39/0x241 [<ffffffff8022a4f4>] ? mcount_call+0x5/0x31 [<ffffffff8024b466>] ioremap_nocache+0x2a/0x40 [<ffffffff80e86dbd>] hpet_enable+0x39/0x241 [<ffffffff80e7a1f6>] hpet_time_init+0x21/0x4e [<ffffffff80e730e9>] start_kernel+0x302/0x395 [<ffffffff80e722aa>] x86_64_start_reservations+0xb9/0xd4 [<ffffffff80e722fe>] ? x86_64_init_pda+0x39/0x4f [<ffffffff80e72400>] x86_64_start_kernel+0xec/0x107 ---[ end trace a7919e7f17c0a725 ]--- it seems for amd system that is set later... try to move setting early in early_identify_cpu. and remove same code for intel and centaur. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: max_low_pfn_mapped fix #4Yinghai Lu2008-07-14
| | | | | | | | | | | | | | | | | | | | | | | | only add direct mapping for aperture Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: change _node_to_cpumask_ptr to return const ptrMike Travis2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Strengthen the return type for the _node_to_cpumask_ptr to be a const pointer. This adds compiler checking to insure that node_to_cpumask_map[] is not changed inadvertently. Signed-off-by: Mike Travis <travis@sgi.com> Cc: "akpm@linux-foundation.org" <akpm@linux-foundation.org> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Acked-by: Vegard Nossum <vegard.nossum@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: I/O APIC: remove an IRQ2-mask hackMaciej W. Rozycki2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that IRQ2 is never made available to the I/O APIC, there is no need to special-case it and mask as a workaround for broken systems. Actually, because of the former, mask_IO_APIC_irq(2) is a no-op already. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: fix numaq_tsc_disable callingYinghai Lu2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | got this on a test-system: calling numaq_tsc_disable+0x0/0x39 NUMAQ: disabling TSC initcall numaq_tsc_disable+0x0/0x39 returned 0 after 0 msecs that's because we should not be using arch_initcall to call numaq_tsc_disable. need to call it in setup_arch before time_init()/tsc_init() and call it in init_intel() to make the cpu feature bits right. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86, e820: remove end_user_pfnYinghai Lu2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | end_user_pfn used to modify the meaning of the e820 maps. Now that all e820 operations are cleaned up, unified, tightened up, the e820 map always get updated to reality, we don't need to keep this secondary mechanism anymore. If you hit this commit in bisection it means something slipped through. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: max_low_pfn_mapped fix, #3Yinghai Lu2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | optimization: try to merge the range with same page size in init_memory_mapping, to get the best possible linear mappings set up. thus when GBpages is not there, we could do 2M pages. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: max_low_pfn_mapped fix, #2Yinghai Lu2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tighten the boundary checks around max_low_pfn_mapped - dont overmap nor undermap into holes. also print out tseg for AMD cpus, for diagnostic purposes. (this is an SMM area, and we split up any big mappings around that area) Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: max_low_pfn_mapped fix, #1Yinghai Lu2008-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix crash on Ingo's big box: calling pci_iommu_init+0x0/0x17 PCI-DMA: Disabling AGP. PCI-DMA: aperture base @ d0000000 size 65536 KB PCI-DMA: using GART IOMMU. PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture BUG: unable to handle kernel paging request at ffff88000003be88 IP: [<ffffffff8026d377>] __alloc_pages_internal+0xc3/0x3f2 PGD 202063 PUD 206063 PMD 22fc00163 PTE 3b162 Oops: 0000 [1] SMP and e820 is: BIOS-e820: 0000000000000000 - 000000000009ac00 (usable) BIOS-e820: 000000000009ac00 - 00000000000a0000 (reserved) BIOS-e820: 00000000000ca000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 000000007ff70000 (usable) BIOS-e820: 000000007ff70000 - 000000007ff86000 (ACPI data) BIOS-e820: 000000007ff86000 - 0000000080000000 (ACPI NVS) BIOS-e820: 0000000080000000 - 00000000cfe00000 (usable) BIOS-e820: 00000000cfe00000 - 00000000d0000000 (reserved) BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved) BIOS-e820: 00000000fec00000 - 00000000fec10000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000fff80000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000830000000 (usable) system has 32 GB RAM installed. max_low_pfn_mapped is 0xcfe00, and GART aperture is not mapped. So try to use init_memory_mapping to map that area, because the iommu thinks that area is ram ... Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | Merge branch 'linus' into x86/coreIngo Molnar2008-07-12
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/mm/ioremap.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86_64: fix delayed signalsRoland McGrath2008-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On three of the several paths in entry_64.S that call do_notify_resume() on the way back to user mode, we fail to properly check again for newly-arrived work that requires another call to do_notify_resume() before going to user mode. These paths set the mask to check only _TIF_NEED_RESCHED, but this is wrong. The other paths that lead to do_notify_resume() do this correctly already, and entry_32.S does it correctly in all cases. All paths back to user mode have to check all the _TIF_WORK_MASK flags at the last possible stage, with interrupts disabled. Otherwise, we miss any flags (TIF_SIGPENDING for example) that were set any time after we entered do_notify_resume(). More work flags can be set (or left set) synchronously inside do_notify_resume(), as TIF_SIGPENDING can be, or asynchronously by interrupts or other CPUs (which then send an asynchronous interrupt). There are many different scenarios that could hit this bug, most of them races. The simplest one to demonstrate does not require any race: when one signal has done handler setup at the check before returning from a syscall, and there is another signal pending that should be handled. The second signal's handler should interrupt the first signal handler before it actually starts (so the interrupted PC is still at the handler's entry point). Instead, it runs away until the next kernel entry (next syscall, tick, etc). This test behaves correctly on 32-bit kernels, and fails on 64-bit (either 32-bit or 64-bit test binary). With this fix, it works. #define _GNU_SOURCE #include <stdio.h> #include <signal.h> #include <string.h> #include <sys/ucontext.h> #ifndef REG_RIP #define REG_RIP REG_EIP #endif static sig_atomic_t hit1, hit2; static void handler (int sig, siginfo_t *info, void *ctx) { ucontext_t *uc = ctx; if ((void *) uc->uc_mcontext.gregs[REG_RIP] == &handler) { if (sig == SIGUSR1) hit1 = 1; else hit2 = 1; } printf ("%s at %#lx\n", strsignal (sig), uc->uc_mcontext.gregs[REG_RIP]); } int main (void) { struct sigaction sa; sigset_t set; sigemptyset (&sa.sa_mask); sa.sa_flags = SA_SIGINFO; sa.sa_sigaction = &handler; if (sigaction (SIGUSR1, &sa, NULL) || sigaction (SIGUSR2, &sa, NULL)) return 2; sigemptyset (&set); sigaddset (&set, SIGUSR1); sigaddset (&set, SIGUSR2); if (sigprocmask (SIG_BLOCK, &set, NULL)) return 3; printf ("main at %p, handler at %p\n", &main, &handler); raise (SIGUSR1); raise (SIGUSR2); if (sigprocmask (SIG_UNBLOCK, &set, NULL)) return 4; if (hit1 + hit2 == 1) { puts ("PASS"); return 0; } puts ("FAIL"); return 1; } Signed-off-by: Roland McGrath <roland@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86: remove conflicting nx6325 and nx6125 quirksRafael J. Wysocki2008-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have two conflicting DMA-based quirks in there for the same set of boxes (HP nx6325 and nx6125) and one of them actually breaks my box. So remove the extra code. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: =?iso-8859-1?q?T=F6r=F6k_Edwin?= <edwintorok@gmail.com> Cc: Vegard Nossum <vegard.nossum@gmail.com> Cc: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | Merge branch 'x86/generalize-visws' into x86/coreIngo Molnar2008-07-11
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| | * | | x86, VisWS: fix pci_direct_conf1 dependencyIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix: arch/x86/pci/built-in.o: In function `pci_subsys_init': visws.c:(.init.text+0xfc5): undefined reference to `pci_direct_conf1' Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: build fixIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix: arch/x86/kernel/built-in.o: In function `visws_early_detect': : undefined reference to `mach_get_smp_config_quirk' arch/x86/kernel/built-in.o: In function `visws_early_detect': : undefined reference to `mach_find_smp_config_quirk' Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: build fixIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix: arch/x86/kernel/visws_quirks.c: In function ‘visws_early_detect’: arch/x86/kernel/visws_quirks.c:293: error: ‘no_broadcast’ undeclared (first use in this function) arch/x86/kernel/visws_quirks.c:293: error: (Each undeclared identifier is reported only once arch/x86/kernel/visws_quirks.c:293: error: for each function it appears in.) make[1]: *** [arch/x86/kernel/visws_quirks.o] Error 1 make: *** [arch/x86/kernel/visws_quirks.o] Error 2 Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: do not allow VisWS for VoyagerIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, update include file changeIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86/pci: fix warnings in subsys_initcall functionsRobert Richter2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86/pci merge: fixing numaq initializationRobert Richter2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch d49c4288 (tip/x86/mpparse) introduced some changes in calling subsys_init calls if CONFIG_X86_NUMAQ option is set. This patch updates subsystem initalization according to this changes. Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, eliminate Kconfig specialsIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove leftover traces of various VISWS related Kconfig specials. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, remove leftover filesIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove leftover arch/x86/mach-visws/* files. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, clean upIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | merge traps_visws.c and apic_visws.c into visws_quirks.c. (no code changed) Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, clean upIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rename setup_visws.c to visws_quirks.c. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, IO-APIC setup fixIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | skip IO-APIC setup on a VISWS if it's enabled. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, clean upIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove VISWS Kconfig complications, now that it's supported by the generic architecture. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, flip over VISWS to generic archIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this is the big move: flip over VISWS to generic arch support. From this commit on CONFIG_X86_VISWS is just another (default-disabled) option that turns on certain quirks - no other complications. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, copy visws filesIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | copy arch/x86/mach-visws/setup_visws.c, apic_visws.c and traps_visws.c files to arch/x86/kernel/, in preparation of the switchover to a non-subarch setup for VISWS. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, add early quirks to default architecturesIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add early quirk support to the generic architecture code. this allows VISWS to be supported by the generic code and allows us to remove the VISWS subarch. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, add NR_IRQS quirkIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NR_IRQS: let VISWS be just a sub-case of the generic code. This can create a somewhat larger irq_desc[] array if NR_CPUS is high but that should not worry VisWS which has 4 CPUs at most. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, eliminate ↵Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-x86/mach-visws/setup_arch.h use the generic version of setup_arch.h - it's the same. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, move definitionsIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the SGIVW definitions from setup_arch.h into its own header file. preparation for turning VISWS into a generic PC architecture. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, create include/asm-x86/visws/Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the include/asm-x86/mach-visws/ VISWS specific hardware details include files into include/asm-x86/visws, to be used from generic code. No code changed. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, eliminate asm-x86/mach-visws/mach_apicdef.hIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, update asm-x86/mach-visws/mach_apicdef.hIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | update asm-x86/mach-visws/mach_apicdef.h to the generic version. This should work fine as VISWS has a standard local APIC and thus its mach_apicdef.h copy is just an ancient version of the generic code. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, eliminate ↵Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-x86/mach-visws/smpboot_hooks.h now that include/asm-x86/mach-visws/smpboot_hooks.h equals to the default file in ../mach-default/smpboot_hooks.h, simply include it instead of maintaining a copy. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, update ↵Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-x86/mach-visws/smpboot_hooks.h update include/asm-x86/mach-visws/smpboot_hooks.h to include/asm-x86/mach-default/smpboot_hooks.h (the generic version). this _should_ work, because VISWS sets skip_ioapic_setup, but it should be tested on a real VISWS to make sure. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, enhance ↵Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-x86/mach-default/smpboot_hooks.h Allow the generic smpboot quirks code to be built with ONFIG_X86_IO_APIC disabled. This way VISWS will be able to use it as-is. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, eliminate ↵Ingo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/asm-x86/mach-visws/mach_apic.h now that include/asm-x86/mach-visws/mach_apic.h equals to include/asm-x86/mach-default/mach_apic.h, simply start using the generic one. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, update asm-x86/mach-visws/mach_apic.hIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | update asm-x86/mach-visws/mach_apic.h to the generic version. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, install proper PCI quirkIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, use generic mpparse codeIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, add early init quirksIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add early init quirks for VisWS. This gradually turns the VISWS subarch into a generic PC architecture. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86, VisWS: turn into generic arch, make VisWS boot on a regular PCIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | first step: make the VISWS subarch boot on a regular PC. We take various shortcuts for that. We copy the generic arch setup file over into the VISWS setup file. This is the only step that is not expected to boot on a real VISWS. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86: add early quirk supportIngo Molnar2008-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add early quirks support. In preparation of enabling the generic architecture to boot on a VISWS. This will allow us to remove the VISWS subarch and all its complications. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | Merge branch 'x86/core' into x86/generalize-viswsIngo Molnar2008-07-10
| | |\ \ \
| * | | | | x86: Recover timer_ack lost in the merge of the NMI watchdogMaciej W. Rozycki2008-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the course of the recent unification of the NMI watchdog an assignment to timer_ack to switch off unnecesary POLL commands to the 8259A in the case of a watchdog failure has been accidentally removed. The statement used to be limited to the 32-bit variation as since the rewrite of the timer code it has been relevant for the 82489DX only. This change brings it back. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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