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* Merge tag 'ux500-dma40-for-arm-soc' of ↵Olof Johansson2013-05-27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers From Linus Walleij: This is a set of patches from Lee Jones to start converting the ux500 to fetch DMA channels from the device tree: - Full DT support and channel mapping in the DMA40 driver - Dropping of platform data for migrated devices on the DT boot path. * tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (36 commits) ARM: ux500: Register Cryp and Hash platform drivers on Snowball crypto: ux500/[cryp|hash] - Show successful start-up in the bootlog ARM: ux500: Stop passing Cryp DMA channel config information though pdata crypto: ux500/cryp - Set DMA configuration though dma_slave_config() crypto: ux500/cryp - Prepare clock before enabling it ARM: ux500: Stop passing Hash DMA channel config information though pdata crypto: ux500/hash - Set DMA configuration though dma_slave_config() crypto: ux500/hash - Prepare clock before enabling it ARM: ux500: Remove unnecessary attributes from DMA channel request pdata dmaengine: ste_dma40: Correct copy/paste error ARM: ux500: Remove DMA address look-up table dmaengine: ste_dma40: Remove redundant address fetching function dmaengine: ste_dma40: Only use addresses passed as configuration information ARM: ux500: Stop passing UART's platform data for Device Tree boots dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg() dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking ARM: ux500: Pass remnant platform data though to DMA40 driver dmaengine: ste_dma40: Supply full Device Tree parsing support dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabled ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: ux500: Register Cryp and Hash platform drivers on SnowballLee Jones2013-05-23
| | | | | | | | | | | | | | | | These drivers are now operational and even use the latest common clk and DMA APIs. There's no reason why we shouldn't start them up now. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * crypto: ux500/[cryp|hash] - Show successful start-up in the bootlogLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cryp driver is currently silent and the Hash driver prints the name of its probe function unnecessarily. Let's just put a nice descriptive one-liner there instead. Cc: David S. Miller <davem@davemloft.net> Cc: Andreas Westin <andreas.westin@stericsson.com> Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Stop passing Cryp DMA channel config information though pdataLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | DMA channel configuration information should be setup in the driver. The Ux500 Cryp driver now does this, so there's no need to send it though here too. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * crypto: ux500/cryp - Set DMA configuration though dma_slave_config()Lee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA controller currently takes configuration information from information passed though dma_channel_request(), but it shouldn't. Using the API, the DMA channel should only be configured during a dma_slave_config() call. Cc: David S. Miller <davem@davemloft.net> Cc: Andreas Westin <andreas.westin@stericsson.com> Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * crypto: ux500/cryp - Prepare clock before enabling itLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail to prepare the ux500-cryp clock before enabling it the platform will fail to boot. Here we insure this happens. Cc: David S. Miller <davem@davemloft.net> Cc: Andreas Westin <andreas.westin@stericsson.com> Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Stop passing Hash DMA channel config information though pdataLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | DMA channel configuration information should be setup in the driver. The Ux500 Hash driver now does this, so there's no need to send it though here too. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * crypto: ux500/hash - Set DMA configuration though dma_slave_config()Lee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA controller currently takes configuration information from information passed though dma_channel_request(), but it shouldn't. Using the API, the DMA channel should only be configured during a dma_slave_config() call. Cc: David S. Miller <davem@davemloft.net> Cc: Andreas Westin <andreas.westin@stericsson.com> Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * crypto: ux500/hash - Prepare clock before enabling itLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail to prepare the ux500-hash clock before enabling it the platform will fail to boot. Here we insure this happens. Cc: David S. Miller <davem@davemloft.net> Cc: Andreas Westin <andreas.westin@stericsson.com> Cc: linux-crypto@vger.kernel.org Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove unnecessary attributes from DMA channel request pdataLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | DMA data width and packet size information is only required at channel configuration time. Any information passed from platform data is passed directly to the DMA40 driver to use during channel allocation, but these pieces of information are subsequently ignored by the driver, so we may as well remove them. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Correct copy/paste errorLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | 'struct stedma40_half_channel_info's header comment says that it's called 'struct stedma40_chan_cfg'. Let's straighten that out. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove DMA address look-up tableLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | DMA addresses are now passed as part of the dmaengine API by invoking dmaengine_slave_config(). So there's no requirement for the DMA40 driver to look them up in a table provided by platform data. This method does not fit in well using Device Tree either. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Remove redundant address fetching functionLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | Addresses are now stored in local data structures and are easy to obtain, thus a specialist function used to fetch them is now surplus to requirement. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Only use addresses passed as configuration informationLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | Addresses are passed in from the client's driver via the invocation of dmaengine_slave_config(), so there's no need to fetch them from platform data too, hardwired or otherwise. This is a great step forward, as it elevates a large burden from platform data in the way of a look-up table. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Stop passing UART's platform data for Device Tree bootsLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | It was required to pass DMA channel configuration information to the UART driver before the new DMA API was in place. Now that it is, and is fully compatible with Device Tree we can stop doing that. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Don't configure runtime configurable setup during allocateLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the dmaengine API for slave transfers, allocating and configuring a channel are two separate actions. Here we're removing logical channel configuration from the channel allocation routine for slave transfers, as the same config is already done in the runtime config function, and put the corresponding call into d40_config_memcpy() for the memcpy code path. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Edited the commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()Lee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The majority of configuration done in d40_phy_config() pertains to physical channels. Move the call over to runtime config which has different code paths for physical and logical channels already, and make it an exclusive physical channel config function as the name implies, and drop the is_log argument. Since we moved the call to runtime_config() it only gets called for device transfers, so encode the small snippet of configuration pertaining to memcpy channels into the d40_config_memcpy() function. Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> [rewrote the commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmaskingLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the initial setup of a logical channel, it is necessary to unmask the GIM in order to receive generated terminal count and error interrupts. We're separating out this required code so it will be possible to move the remaining code in d40_phy_cfg(), which is mostly runtime configuration into the runtime_config() routine. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Pass remnant platform data though to DMA40 driverLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ironically, in order to remove lots of the auxdata assignments, we have to add just one more. A lot of them require DMA information to be passed into clients for DMA channel allocation, but we now have this capability in Device Tree. However, the DMA40 driver still relies on a reverse table look-up to obtain DMA addresses. Until all of the clients are converted, over to the new API, we're stuck with this. Also, now the DMA40 has been DT:ed, there's no requirement to register it using traditional methods, so let's remove it. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Supply full Device Tree parsing supportLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the new DMA DT bindings and API, we can register the DMA40 driver as Device Tree capable. Now, when a client attempts to allocate a channel using the DMA DT bindings via its own node, we are able to parse the request and allocate a channel in the correct manner. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Vinod Koul <vinod.koul@intel.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabledLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting using Device Tree, devices aren't registered in the normal way. Instead, they need to be provided with a compatible string which is held in an OF Match Table for comparison during start-up. Here we provide the compatible string and prepare the driver to not receive a platform data pointer. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Fixed up whitespace error] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Allocate plat_data on declarationLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | It's the way that most other drivers do it. Very trivial clean-up which reduces line count and simplifies code. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Also report the number of logical channelsLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we know the total of physical and logical channels, we may as well report them within the information log. Before: dma40 dma40.0: hardware revision: 3 @ 0x801c0000 with 8 physical channels After: <as above ...> and 256 logical channels Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Move rev error-check up to revision acquisitionLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | At the moment we fetch the hardware revision, then do some stuff, then check whether the revision is correct and return in error if it's not. Well we may as well check it as soon as we know what it is, so let's move the check right up underneath where we acquire the version. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Remove 'always true' checkingLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before allocating memory for logical channels, the current driver checks to see if there are any. Well as the dma40_memcpy_channels[] array is always populated, the check is always true. Best to remove the check. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Calculate number of logical channels from physical onesLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | This change will cost ~25KB of memory, but it's worth the trade-off, as it removes a great deal of overhead. It means that instead of only allocating memory for the logical channels in use, it does so for all available ones, which is 32 per physical channel. However, this now means we can remove some platform data and we don't have to worry about adding vendor specific variables to Device Tree. Acked-by: Vinod Koul <vnod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove superfluous 'psize' attribute from Audio platform dataLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'psize' is used to calculate the maximum DMA burst size. However it is only taken into consideration when editing the DMA channel's configuration. The Audio DMA platform data is only used to allocate a channel, not configure it. That will be done at a later date within the MSP driver. We're also removing comments which are no longer required, as 'data_width' is no longer set in any device's platform data period. Tested-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove unused 'data_width' attributes from UART DMA configsLee Jones2013-05-23
| | | | | | | | | | | | | | | | DMA configuration data is now allocated in the UART driver, so these are just ignored. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove unused 'data_width' attributes from SSP DMA configsLee Jones2013-05-23
| | | | | | | | | | | | | | | | DMA configuration data is now allocated in the SSP driver, so these are just ignored. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Remove unused 'data_width' attributes from SDI DMA configsLee Jones2013-05-23
| | | | | | | | | | | | | | | | DMA configuration data is now allocated in the MMCI driver, so these are just ignored. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Remove home-brew MAX() macroLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of the DMA40's local MAX() macro evaluates its arguments more times than is necessary and it not type checked. This patch strips replaces it with a new, more efficient constant. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Reported-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * ARM: ux500: Strip out duplicate USB DMA configurationLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | For the moment at least, the TX and RX channels for DB8500 USB are identical, so this patch generalises them into a single structure and passes it twice. Once as the TX and again for the RX configuration. We're keeping the infrastructure the same i.e. passing the TX and RX separately in case they start to differ on latter incarnations of the platform. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Amalgamate DMA source and destination channel numbersLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices which utilise DMA use the same device numbers for transmitting and receiving. In this patch we encode the source and destination information into one single attribute. We can subsequently exploit the direction attribute to see which of the transfer directions are being described. This also lessens the burden on platform data. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Rectify incorrect configuration validation checkingLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | If we compare an event's group (dev_type / 16) with STEDMA40_DEV_DST_MEMORY (-1), the only way we'd obtain a positive result is if we passed -16 as a device type, which is unfeasible. Instead, it would be much more sane to compare STEDMA40_DEV_DST_MEMORY against the raw dev_type in order to expect the expected result. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Move default memcpy configs into the driverLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | There are only two default memcpy configurations used for the DMA40 driver; one for physical memcpy and one for logical memcpy. Instead of invariably passing the same configurations though platform data, we're moving them into the driver instead. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Fix up static memcpy event linesLinus Walleij2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit "dmaengine: ste_dma40: Assign memcpy channels in the driver" had two problems: - It assigned magic numbers to the memcpy event lines instead of giving them symbolic names. - It seems to have missed one of the memcpy event lines, number 51. This patch fixes it up. Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dmaengine: ste_dma40: Assign memcpy channels in the driverLee Jones2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | The channels reserved for memcpy are the same for all currently supported platforms. With this in mind, we can ease the platform data passing requirement by moving these assignments out from platform code and place them directly into the driver. Acked-by: Vinod Koul <vnod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Linux 3.10-rc3Linus Torvalds2013-05-26
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* | ipc/sem.c: Fix missing wakeups in do_smart_update_queue()Manfred Spraul2013-05-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | do_smart_update_queue() is called when an operation (semop, semctl(SETVAL), semctl(SETALL), ...) modified the array. It must check which of the sleeping tasks can proceed. do_smart_update_queue() missed a few wakeups: - if a sleeping complex op was completed, then all per-semaphore queues must be scanned - not only those that were modified by *sops - if a sleeping simple op proceeded, then the global queue must be scanned again And: - the test for "|sops == NULL) before scanning the global queue is not required: If the global queue is empty, then it doesn't need to be scanned - regardless of the reason for calling do_smart_update_queue() The patch is not optimized, i.e. even completing a wait-for-zero operation causes a rescan. This is done to keep the patch as simple as possible. Signed-off-by: Manfred Spraul <manfred@colorfullife.com> Acked-by: Davidlohr Bueso <davidlohr.bueso@hp.com> Cc: Rik van Riel <riel@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge tag 'nfs-for-3.10-3' of git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds2013-05-26
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NFS client bugfixes from Trond Myklebust: - Stable fix to prevent an rpc_task wakeup race - Fix a NFSv4.1 session drain deadlock - Fix a NFSv4/v4.1 mount regression when not running rpc.gssd - Ensure auth_gss pipe detection works in namespaces - Fix SETCLIENTID fallback if rpcsec_gss is not available * tag 'nfs-for-3.10-3' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: NFS: Fix SETCLIENTID fallback if GSS is not available SUNRPC: Prevent an rpc_task wakeup race NFSv4.1 Fix a pNFS session draining deadlock SUNRPC: Convert auth_gss pipe detection to work in namespaces SUNRPC: Faster detection if gssd is actually running SUNRPC: Fix a bug in gss_create_upcall
| * | NFS: Fix SETCLIENTID fallback if GSS is not availableChuck Lever2013-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 79d852bf "NFS: Retry SETCLIENTID with AUTH_SYS instead of AUTH_NONE" did not take into account commit 23631227 "NFSv4: Fix the fallback to AUTH_NULL if krb5i is not available". Signed-off-by: Chuck Lever <chuck.lever@oracle.com> Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
| * | SUNRPC: Prevent an rpc_task wakeup raceTrond Myklebust2013-05-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lockless RPC_IS_QUEUED() test in __rpc_execute means that we need to be careful about ordering the calls to rpc_test_and_set_running(task) and rpc_clear_queued(task). If we get the order wrong, then we may end up testing the RPC_TASK_RUNNING flag after __rpc_execute() has looped and changed the state of the rpc_task. Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com> Cc: stable@vger.kernel.org
| * | NFSv4.1 Fix a pNFS session draining deadlockAndy Adamson2013-05-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a CB_RECALL the callback service thread flushes the inode using filemap_flush prior to scheduling the state manager thread to return the delegation. When pNFS is used and I/O has not yet gone to the data server servicing the inode, a LAYOUTGET can preceed the I/O. Unlike the async filemap_flush call, the LAYOUTGET must proceed to completion. If the state manager starts to recover data while the inode flush is sending the LAYOUTGET, a deadlock occurs as the callback service thread holds the single callback session slot until the flushing is done which blocks the state manager thread, and the state manager thread has set the session draining bit which puts the inode flush LAYOUTGET RPC to sleep on the forechannel slot table waitq. Separate the draining of the back channel from the draining of the fore channel by moving the NFS4_SESSION_DRAINING bit from session scope into the fore and back slot tables. Drain the back channel first allowing the LAYOUTGET call to proceed (and fail) so the callback service thread frees the callback slot. Then proceed with draining the forechannel. Signed-off-by: Andy Adamson <andros@netapp.com> Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
| * | SUNRPC: Convert auth_gss pipe detection to work in namespacesTrond Myklebust2013-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | This seems to have been overlooked when we did the namespace conversion. If a container is running a legacy version of rpc.gssd then it will be disrupted if the global 'pipe_version' is set by a container running the new version of rpc.gssd. Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
| * | SUNRPC: Faster detection if gssd is actually runningTrond Myklebust2013-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent changes to the NFS security flavour negotiation mean that we have a stronger dependency on rpc.gssd. If the latter is not running, because the user failed to start it, then we time out and mark the container as not having an instance. We then use that information to time out faster the next time. If, on the other hand, the rpc.gssd successfully binds to an rpc_pipe, then we mark the container as having an rpc.gssd instance. Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
| * | SUNRPC: Fix a bug in gss_create_upcallTrond Myklebust2013-05-15
| |/ | | | | | | | | | | | | | | If wait_event_interruptible_timeout() is successful, it returns the number of seconds remaining until the timeout. In that case, we should be retrying the upcall. Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
* | Merge tag 'edac_fixes_for_3.10' of ↵Linus Torvalds2013-05-26
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull amd64 edac fix from Borislav Petkov: "A sysfs file permissions correction" * tag 'edac_fixes_for_3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: amd64_edac: Fix bogus sysfs file permissions
| * | amd64_edac: Fix bogus sysfs file permissionsBorislav Petkov2013-05-21
| |/ | | | | | | | | | | | | Fix yet another issue caught by 8f46baaa7ec6c ("base: core: WARN() about bogus permissions on device attributes"). Signed-off-by: Borislav Petkov <bp@suse.de>
* | Merge branch 'parisc-for-3.10' of ↵Linus Torvalds2013-05-26
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc fixes from Helge Deller: "This time we made the kernel- and interruption stack allocation reentrant which fixed some strange kernel crashes (specifically protection ID traps). Furthemore this patchset fixes the interrupt stack in UP and SMP configurations by using native locking instructions. And finally usage of floating point calculations on parisc were disabled in the MPILIB." * 'parisc-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: fix irq stack on UP and SMP parisc/superio: Use module_pci_driver to register driver parisc: make interrupt and interruption stack allocation reentrant parisc: show number of FPE and unaligned access handler calls in /proc/interrupts parisc: add additional parisc git tree to MAINTAINERS file parisc: use PAGE_SHIFT instead of hardcoded value 12 in pacache.S parisc: add rp5470 entry to machine database MPILIB: disable usage of floating point registers on parisc
| * | parisc: fix irq stack on UP and SMPHelge Deller2013-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic to detect if the irq stack was already in use with raw_spin_trylock() is wrong, because it will generate a "trylock failure on UP" error message with CONFIG_SMP=n and CONFIG_DEBUG_SPINLOCK=y. arch_spin_trylock() can't be used either since in the CONFIG_SMP=n case no atomic protection is given and we are reentrant here. A mutex didn't worked either and brings more overhead by turning off interrupts. So, let's use the fastest path for parisc which is the ldcw instruction. Counting how often the irq stack was used is pretty useless, so just drop this piece of code. Signed-off-by: Helge Deller <deller@gmx.de>
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