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* Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2010-03-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] smsgiucv_app: deliver z/VM CP special messages (SMSG) as uevents [S390] smsgiucv: declare char pointers as "const" [S390] dasd: automatic recognition of read-only devices [S390] remove unused qdio flags in zfcp and qeth [S390] Cleanup xtime usage [S390] qdio: add missing bracket [S390] cio: fix init_count in case of recognition after steal lock [S390] dasd: security and PSF update patch for EMC CKD ioctl [S390] hvc_iucv: allocate memory buffers for IUCV in zone DMA [S390] uaccess: make sure copy_from_user_overflow is builtin
| * [S390] smsgiucv_app: deliver z/VM CP special messages (SMSG) as ueventsHendrik Brueckner2010-03-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smsgiucv_app driver registers a callback with the smsgiucv driver to receive z/VM CP special messages (SMSG) starting with "APP". When the callback is called for special messages, the driver creates an uevent for the received message. The uevent consists of additional environment data containing the message prefix ("APP"), message sender, and message content. udev rules can be used to trigger application specific actions through matching the content or sender of the special message. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] smsgiucv: declare char pointers as "const"Hendrik Brueckner2010-03-08
| | | | | | | | | | | | | | | | Declare the smsgiucv prefix char pointer as "const" and use use const char pointers in callback functions. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] dasd: automatic recognition of read-only devicesStefan Weinhuber2010-03-08
| | | | | | | | | | | | | | | | | | | | In z/VM it is possible to attach a device as read-only. To prevent unintentional write requests and subsequent I/O errors, we can detect this configuration using the z/VM DIAG 210 interface and set the respective linux block device to read-only as well. Signed-off-by: Stefan Weinhuber <wein@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] remove unused qdio flags in zfcp and qethUrsula Braun2010-03-08
| | | | | | | | | | | | | | | | | | | | | | zfcp and qeth are setting flags for the qdio-layer, but these flags are not used in qdio. Patch removes the flag definitions from qdio and their settings in zfcp and qeth. Cc: Jan Glauber <jang@linux.vnet.ibm.com> Cc: Christof Schmitt <christof.schmitt@de.ibm.com> Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] Cleanup xtime usageJohn Stultz2010-03-08
| | | | | | | | | | | | | | | | | | This replaces direct xtime usage in the s390 arch with timekeeping accessors, so we can further clean up the timekeeping core. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] qdio: add missing bracketUrsula Braun2010-03-08
| | | | | | | | | | | | | | | | | | Add a missing bracket to only log the outbound handler event in the appropriate case. Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] cio: fix init_count in case of recognition after steal lockSebastian Ott2010-03-08
| | | | | | | | | | | | | | | | | | | | | | After we try to steal a lock on a ccw device in boxed state, we have to restart device recognition and potentially reprobing. In this case ccw_device_init_count was erroneously decreased twice. This patch fixes the issue. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] dasd: security and PSF update patch for EMC CKD ioctlNigel Hislop2010-03-08
| | | | | | | | | | | | | | | | Remove the PSF order/suborder check from the Symmetrix CKD dasd ioctl. In exchange restrict the ioctl to CAP_SYS_ADMIN and CAP_SYS_RAWIO. Signed-off-by: Nigel Hislop <hislop_nigel@emc.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] hvc_iucv: allocate memory buffers for IUCV in zone DMAHendrik Brueckner2010-03-08
| | | | | | | | | | | | | | | | | | | | | | The device driver must allocate memory for IUCV buffers with GFP_DMA, because IUCV cannot address memory above 2GB (31bit addresses only). Because the IUCV ignores the higher bits of the address, sending and receiving IUCV data with this driver might cause memory corruptions. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] uaccess: make sure copy_from_user_overflow is builtinHeiko Carstens2010-03-08
| | | | | | | | | | | | | | | | | | | | | | If there is no in kernel image caller modules will suffer: ERROR: "copy_from_user_overflow" [net/core/pktgen.ko] undefined! ERROR: "copy_from_user_overflow" [net/can/can-raw.ko] undefined! ERROR: "copy_from_user_overflow" [fs/cifs/cifs.ko] undefined! Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | FS-Cache: Remove the EXPERIMENTAL flagChristian Kujau2010-03-08
|/ | | | | | | | | Remove the EXPERIMENTAL flag from FS-Cache so that Ubuntu can make use of the facility. Signed-off-by: Christian Kujau <lists@nerdbynature.de> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/amit/virtio-consoleLinus Torvalds2010-03-07
|\ | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/amit/virtio-console: virtio: console: Use better variable names for fill_queue operation virtio: console: Fix type of 'len' as unsigned int
| * virtio: console: Use better variable names for fill_queue operationAmit Shah2010-03-04
| | | | | | | | | | | | | | | | | | | | | | | | We want to keep track of the number of buffers added to a vq. Use nr_added_bufs instead of 'ret'. Also, the users of fill_queue() overloaded a local 'err' variable to check the numbers of buffers allocated. Use nr_added_bufs instead of err. Signed-off-by: Amit Shah <amit.shah@redhat.com> Reported-by: Juan Quintela <quintela@redhat.com>
| * virtio: console: Fix type of 'len' as unsigned intAmit Shah2010-03-04
| | | | | | | | | | | | | | | | We declare 'len' as int type but it should be 'unsigned int', as get_buf() wants it to be. Signed-off-by: Amit Shah <amit.shah@redhat.com> Reported-by: Juan Quintela <quintela@redhat.com>
* | Merge branch 'x86-mrst-for-linus' of ↵Linus Torvalds2010-03-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-mrst-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits) x86, mrst: Fix whitespace breakage in apb_timer.c x86, mrst: Fix APB timer per cpu clockevent x86, mrst: Remove X86_MRST dependency on PCI_IOAPIC x86, olpc: Use pci subarch init for OLPC x86, pci: Add arch_init to x86_init abstraction x86, mrst: Add Kconfig dependencies for Moorestown x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST=n x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCI x86, pci: Add sanity check for PCI fixed bar probing x86, legacy_irq: Remove duplicate vector assigment x86, legacy_irq: Remove left over nr_legacy_irqs x86, mrst: Platform clock setup code x86, apbt: Moorestown APB system timer driver x86, mrst: Add vrtc platform data setup code x86, mrst: Add platform timer info parsing code x86, mrst: Fill in PCI functions in x86_init layer x86, mrst: Add dummy legacy pic to platform setup x86/PCI: Moorestown PCI support x86, ioapic: Add dummy ioapic functions x86, ioapic: Early enable ioapic for timer irq ... Fixed up semantic conflict of new clocksources due to commit 17622339af25 ("clocksource: add argument to resume callback").
| * | x86, mrst: Fix whitespace breakage in apb_timer.cH. Peter Anvin2010-03-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkin bb24c4716185f6e116c440462c65c1f56649183b: "Moorestown APB system timer driver" suffered from severe whitespace damage in arch/x86/kernel/apb_timer.c due to using Microsoft Lookout to send a patch. Fix the whitespace breakage. Reported-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Fix APB timer per cpu clockeventJacob Pan2010-03-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current APB timer code incorrectly registers a static copy of the clockevent device for the boot CPU. The per cpu clockevent should be used instead. This bug was hidden by zero-initialized data; as such it did not get exposed in testing, but was discovered by code review. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267592494-7723-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Remove X86_MRST dependency on PCI_IOAPICJacob Pan2010-03-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI_IOAPIC is used for PCI hotplug, Moorestown does not have ACPI PCI hotplug, as it does not have ACPI. This unnecessary dependency causes X86_MRST fail to be selected if ACPI is not selected. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267550368-7435-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, olpc: Use pci subarch init for OLPCThomas Gleixner2010-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the #ifdef'ed OLPC-specific init functions by a conditional x86_init function. If the function returns 0 we leave pci_arch_init, otherwise we continue. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Andres Salomon <dilinger@collabora.co.uk> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE89@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, pci: Add arch_init to x86_init abstractionThomas Gleixner2010-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added an abstraction function for arch specific init calls. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE84@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Add Kconfig dependencies for MoorestownJacob Pan2010-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Moorestown platform requires IOAPIC for all interrupts from the south complex, since there is no legacy PIC. Furthermore, Moorestown I/O requires PCI. Moorestown PCI depends on PCI MMCONFIG and DIRECT method to perform device enumeration, as there is no PCI BIOS. [ hpa: rewrote commit message ] Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267120934-9505-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST=nYinghai Lu2010-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we don't have any Moorestown CPU support compiled in, we don't need the Moorestown PCI support either. Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4B858E89.7040807@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCIPan, Jacob jun2010-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NUMAQ initialization sets x86_init.pci.init to pci_numaq_init, which obviously isn't defined if CONFIG_PCI isn't defined. This dependency was implicit in the past, because pci_numaq_init was invoked from arch/x86/pci/legacy.c, which itself was conditioned on CONFIG_PCI. I suspect that no NUMA-Q machines without PCI were ever built, so instead of complicating the code by adding #ifdefs or stub functions, just disable this bit of the configuration space. [ hpa: rewrote the checkin comment ] Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321EE1F@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, pci: Add sanity check for PCI fixed bar probingJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While probing for the PCI fixed BAR capability in the extended PCI configuration space we need to make sure raw_pci_ext_ops is actually initialized. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321E8F7@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, legacy_irq: Remove duplicate vector assigmentYinghai Lu2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated cfg[i].vector assignment. Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4B8493A0.6080501@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, legacy_irq: Remove left over nr_legacy_irqsYinghai Lu2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nr_legacy_irqs and its ilk have moved to legacy_pic. -v2: there is one in ioapic_.c Singed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4B84AAC4.2020204@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Platform clock setup codeJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | Add Moorestown platform clock setup code to the x86_init abstraction. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D2D4@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, apbt: Moorestown APB system timer driverJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moorestown platform does not have PIT or HPET platform timers. Instead it has a bank of eight APB timers. The number of available timers to the os is exposed via SFI mtmr tables. All APB timer interrupts are routed via ioapic rtes and delivered as MSI. Currently, we use timer 0 and 1 for per cpu clockevent devices, timer 2 for clocksource. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D2D2@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Add vrtc platform data setup codeFeng Tang2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vRTC information is obtained from SFI tables on Moorestown, this patch parses these tables and assign the information. Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0D@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Add platform timer info parsing codeJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Moorestown platform timer information is obtained from SFI FW tables. This patch parses SFI table then assign the irq information to mp_irqs. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0B@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Fill in PCI functions in x86_init layerJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | This patch added Moorestown platform specific PCI init functions. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0A@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, mrst: Add dummy legacy pic to platform setupJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | Moorestown has no legacy PIC; point it to the null legacy PIC. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D09@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86/PCI: Moorestown PCI supportJesse Barnes2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Moorestown platform only has a few devices that actually support PCI config cycles. The rest of the devices use an in-RAM MCFG space for the purposes of device enumeration and initialization. There are a few uglies in the fake support, like BAR sizes that aren't a power of two, sizing detection, and writes to the real devices, but other than that it's pretty straightforward. Another way to think of this is not really as PCI at all, but just a table in RAM describing which devices are present, their capabilities and their offsets in MMIO space. This could have been done with a special new firmware table on this platform, but given that we do have some real PCI devices too, simply describing things in an MCFG type space was pretty simple. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D08@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, ioapic: Add dummy ioapic functionsJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some ioapic extern functions are used when CONFIG_X86_IO_APIC is not defined. We need the dummy functions to avoid a compile time error. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318DA07@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, ioapic: Early enable ioapic for timer irqJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moorestown platform needs apic ready early for the system timer irq which is delievered via ioapic. Should not impact other platforms. In the longer term, once ioapic setup is moved before late time init, we will not need this patch to do early apic enabling. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D07@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | x86, pic: Fix section mismatch in legacy picJacob Pan2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move legacy_pic chip dummy functions out of init section as they might be referenced at run time. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D3AA@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | Merge remote branch 'origin/x86/apic' into x86/mrstH. Peter Anvin2010-02-22
| |\ \ | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/apic/io_apic.c
| * | | x86, apic: Remove ioapic_disable_legacy()Jacob Pan2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ioapic_disable_legacy() call is no longer needed for platforms do not have legacy pic. the legacy pic abstraction has taken care it automatically. This patch also initialize irq-related static variables based on information obtained from legacy_pic. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A30A7660@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86, pic: Make use of legacy_pic abstractionJacob Pan2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces legacy PIC-related global variable and functions with the new legacy_pic abstraction. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D04@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86, pic: Introduce legacy_pic abstractionJacob Pan2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes i8259A like legacy programmable interrupt controller code into a driver so that legacy pic functions can be selected at runtime based on platform information, such as HW subarchitecure ID. Default structure of legacy_pic maintains the current code path for x86pc. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D03@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86: Initialize stack canary in secondary startJacob Pan2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some secondary clockevent setup code needs to call request_irq, which will cause fake stack check failure in schedule() if voluntary preemption model is chosen. It is safe to have stack canary initialized here early, since start_secondary() does not return. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D02@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86, ioapic: Improve handling of i8259A irq initAlek Du2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we already track the number of legacy vectors by nr_legacy_irqs, we can avoid use static vector allocations -- we can use dynamic one. Signed-off-by: Alek Du <alek.du@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D01@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86: Add pcibios_fixup_irqs to x86_initThomas Gleixner2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platforms like Moorestown want to override the pcibios_fixup_irqs default function. Add it to x86_init.pci. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D00@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86: Add pci_init_irq to x86_initThomas Gleixner2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moorestown wants to reuse pcibios_init_irq but needs to provide its own implementation of pci_enable_irq. After we distangled the init we can move the init_irq call to x86_init and remove the pci_enable_irq != NULL check in pcibios_init_irq. pci_enable_irq is compile time initialized to pirq_enable_irq and the special cases which override it (visws and acpi) set the x86_init function pointer to noop. That allows MSRT to override pci_enable_irq and otherwise run pcibios_init_irq unmodified. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFF@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86: Move pci init function to x86_initThomas Gleixner2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI initialization in pci_subsys_init() is a mess. pci_numaq_init, pci_acpi_init, pci_visws_init and pci_legacy_init are called and each implementation checks and eventually modifies the global variable pcibios_scanned. x86_init functions allow us to do this more elegant. The pci.init function pointer is preset to pci_legacy_init. numaq, acpi and visws can modify the pointer in their early setup functions. The functions return 0 when they did the full initialization including bus scan. A non zero return value indicates that pci_legacy_init needs to be called either because the selected function failed or wants the generic bus scan in pci_legacy_init to happen (e.g. visws). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFE@orsmsx508.amr.corp.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | PCI: Add pci_bus_find_ext_capabilityJesse Barnes2010-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For use by code that needs to walk extended capability lists before pci_dev structures are set up. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFD@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | | | Merge branch 'for-linus/i2c' of git://git.fluff.org/bjdooks/linuxLinus Torvalds2010-03-07
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus/i2c' of git://git.fluff.org/bjdooks/linux: i2c: Add support for Xilinx XPS IIC Bus Interface i2c: omap: Add support for 16-bit registers i2c-pnx: fix setting start/stop condition powerpc: doc/dts-bindings: update doc of FSL I2C bindings i2c-mpc: add support for the MPC512x processors from Freescale i2c-mpc: rename "setclock" initialization functions to "setup" i2c-mpc: use __devinit[data] for initialization functions and data i2c/imx: don't add probe function to the driver struct i2c: Add support for Ux500/Nomadik I2C controller
| * \ \ \ Merge branch 'next-i2c-xilinx' into next-i2cBen Dooks2010-03-07
| |\ \ \ \
| | * | | | i2c: Add support for Xilinx XPS IIC Bus InterfaceRichard Röjfors2010-03-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Xilinx XPS IIC Bus Interface. The driver uses the dynamic mode, supporting to put several I2C messages in the FIFO to reduce the number of interrupts. It has the same feature as ocores, it can be passed a list of devices that will be added when the bus is probed. Signed-off-by: Richard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 05:23:41 -0500