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* [POWERPC] cell: fix building without spufsArnd Bergmann2006-12-04
| | | | | | | | | It may be desireable to build a kernel for cell without spufs, e.g. as the initial kboot kernel. This requires that the SPU specific parts of the core dump and the xmon code depend on CONFIG_SPU_BASE instead of CONFIG_PPC_CELL. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] spufs: we should only execute init_spu_base on cellStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] spufs: always send sigtrap on breakpointArnd Bergmann2006-12-04
| | | | | | | | | Currently, we only send a sigtrap if the current task is being ptraced. This is somewhat inconsistant, and it breaks utrace support in fedora. Removing the check should do the right thing in all cases. Cc: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] spufs: return an error in spu_create is isolated create isnt supportedJeremy Kerr2006-12-04
| | | | | | | | | | | This changes the spu_create system call to return an error (-ENODEV) if and isolated spu context is requested on hardware that doesn't support isolated mode. Tested on systemsim with and without isolation support Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Fix compile issue for Efika platformNicolas DET2006-12-04
| | | | | | | | This patch fixes a compile issue for the Efika platform recently introduced by API changes. Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Compile a zImage.chrp if PPC_EFIKA seletedNicolas DET2006-12-04
| | | | | Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] powerpc: Make 970MP detectable by oprofileMike Wolf2006-12-04
| | | | | | | | | Change the oprofile_cpu_type in cputables.c to be ppc64/970MP. Oprofile needs to distinquish the MP from other 970 processors so it can add some new counters specific to the 970MP. Signed-off-by: Mike Wolf <mjw@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] update cell_defconfig for ps3 supportArnd Bergmann2006-12-04
| | | | | | | | In the common cell kernel, I want to have ps3 enabled to find potential bugs at compile-time. Also enable SPU disassembly in xmon. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add ps3_defconfigGeoff Levand2006-12-04
| | | | | | | Adds a ps3_defconfig for the PS3 game console. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add ps3 platform system bus supportGeoff Levand2006-12-04
| | | | | | | | Adds a PS3 system bus driver. This system bus is a virtual bus used to present the PS3 system devices in the LDM. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add spu supportGeoff Levand2006-12-04
| | | | | | | Adds spu support for the PS3 platform. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add OS params supportGeoff Levand2006-12-04
| | | | | | | | | Adds support for early access to the parameter data from the PS3 'Other OS' flash memory area. The parameter data mainly holds user preferences like static ip address. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add lpar addressingGeoff Levand2006-12-04
| | | | | | | | | Adds some needed bits for a config option PS3_USE_LPAR_ADDR that disables the PS3 lpar address translation mechanism. This is a currently needed workaround for limitations in the design of the generic cell spu support. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add interrupt supportGeoff Levand2006-12-04
| | | | | | | Adds routines to interface with the PS3 interrupt services. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add repository supportGeoff Levand2006-12-04
| | | | | | | Adds support for the PS3 repository. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add htab routinesGeoff Levand2006-12-04
| | | | | | | Adds pagetable management routines for the PS3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add feature bitsGeoff Levand2006-12-04
| | | | | | | Adds the needed firmware feature bits for the PS3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add lv1 hvcallsGeoff Levand2006-12-04
| | | | | | | Adds the PS3 hvcalls. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] ps3: add support for ps3 platformGeoff Levand2006-12-04
| | | | | | | | Adds the core platform support for the PS3 game console and other devices using the PS3 hypervisor. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] cell: spu management xmon routinesMichael Ellerman2006-12-04
| | | | | | | | | This fixes the xmon support for the cell spu to be compatable with the split spu platform code. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] cell: abstract spu management routinesGeoff Levand2006-12-04
| | | | | | | | | | | | | | | | | This adds a platform specific spu management abstraction and the coresponding routines to support the IBM Cell Blade. It also removes the hypervisor only resources that were included in struct spu. Three new platform specific routines are introduced, spu_enumerate_spus(), spu_create_spu() and spu_destroy_spu(). The underlying design uses a new type, struct spu_management_ops, to hold function pointers that the platform setup code is expected to initialize to instances appropriate to that platform. For the IBM Cell Blade support, I put the hypervisor only resources that were in struct spu into a platform specific data structure struct spu_pdata. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] add virq_to_hw accessor routineGeoff Levand2006-12-04
| | | | | | | | | | This adds an accessor routine virq_to_hw() to the virq routines which hides the implementation details of the virq to hwirq map. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Import updated version of ppc disassembly code for xmonMichael Ellerman2006-12-04
| | | | | | | | | | | | | | This includes: * version 1.24 of ppc-dis.c * version 1.88 of ppc-opc.c * version 1.23 of ppc.h I can't vouch for the accuracy etc. of these changes, but it brings us into line with binutils - and from a cursory test appears to work fine. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Make 64-bit cpu features defined on 32-bitMichael Ellerman2006-12-04
| | | | | | | | It saves #ifdef'ing in callers if we at least define the 64-bit cpu features for 32-bit also. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Make xmon disassembly optionalMichael Ellerman2006-12-04
| | | | | | | | | | | | | | | | | | While adding spu disassembly support it struck me that we're actually carrying quite a lot of code around, just to do disassembly in the case of a crash. While on large systems it's not an issue, on smaller ones it might be nice to have xmon - but without the weight of the disassembly support. For a Cell build this saves ~230KB (!), and for pSeries ~195KB. We still support the 'di' and 'sdi' commands, however they just dump the instruction in hex. Move the definitions into a header to clean xmon.c just a tiny bit. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Add spu disassembly to xmonMichael Ellerman2006-12-04
| | | | | | | | This patch adds a "sdi" command to xmon, to disassemble the contents of an spu's local store. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Import spu disassembly code into xmonMichael Ellerman2006-12-04
| | | | | | | | | | | | | | | This patch imports and munges the spu disassembly code from binutils. All files originated from version 1.1 in binutils cvs. * spu.h, spu-insns.h and spu-opc.c are unchanged except for pathnames. * spu-dis.c has been edited heavily: * use printf instead of info->fprintf_func and similar. * pass the instruction in rather than reading it. * we have no equivalent to symbol_at_address_func, so we just assume there is never a symbol at the address given. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Prepare for spu disassembly in xmonMichael Ellerman2006-12-04
| | | | | | | | | | | | | | | | In order to do disassembly of spu binaries in xmon, we need to abstract the disassembly function from ppc_inst_dump. We do this by making the actual disassembly function a function pointer that we pass to ppc_inst_dump(). To save updating all the callers, we turn ppc_inst_dump() into generic_inst_dump() and make ppc_inst_dump() a wrapper which always uses print_insn_powerpc(). Currently we pass the dialect into print_insn_powerpc(), but we always pass 0 - so just make it a local. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Add a sd command (spu dump) to xmon to dump spu local storeMichael Ellerman2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a command to xmon to dump the memory of a spu's local store. This mimics the 'd' command which dumps regular memory, but does a little hand holding by taking the user supplied address and finding that offset in the local store for the specified spu. This makes it easy for example to look at what was executing on a spu: 1:mon> ss ... Stopped spu 04 (was running) ... 1:mon> sf 4 Dumping spu fields at address c0000000019e0a00: ... problem->spu_npc_RW = 0x228 ... 1:mon> sd 4 0x228 d000080080318228 01a00c021cffc408 4020007f217ff488 |........@ ..!...| Aha, 01a00c02, which is of course rdch $2,$ch24 ! -- Updated to only do the setjmp goo around the spu access, and not around prdump because it does its own (via mread). Also the num variable is now common between sf and sd, so you don't have to keep typing the spu number in if you're repeating commands on the same spu. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Show state of spus as theyre stopped in Cell xmon helperMichael Ellerman2006-12-04
| | | | | | | | | | After stopping spus in xmon I often find myself trawling through the field dumps to find out which spus were running. The spu stopping code actually knows what's running, so let's print it out to save the user some futzing. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Fix sparse warning in xmon Cell codeMichael Ellerman2006-12-04
| | | | | | | | | | | | My patch to add spu helpers to xmon (a898497088f46252e6750405504064e2dce53117) introduced a few sparse warnings, because I was dereferencing an __iomem pointer. I think the best way to handle it is to actually use the appropriate in_beXX functions. Need to rejigger the DUMP macro a little to accomodate that. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] cell: hard disable interrupts in power_save()Benjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | | With soft-disabled interrupts in power_save, we can still get external exceptions on Cell, even if we are in pause(0) a.k.a. sleep state. When the CPU really wakes up through the 0x100 (system reset) vector, while we have already started processing the 0x500 (external) exception, we get a panic in unrecoverable_exception() because of the lost state. This occurred in Systemsim for Cell, but as far as I can see, it can theoretically occur on any machine that uses the system reset exception to get out of sleep state. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] coredump: Add SPU elf notes to coredump.Dwayne Grant McConnell2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPU elf notes to the coredump. It creates a separate note for each of /regs, /fpcr, /lslr, /decr, /decr_status, /mem, /signal1, /signal1_type, /signal2, /signal2_type, /event_mask, /event_status, /mbox_info, /ibox_info, /wbox_info, /dma_info, /proxydma_info, /object-id. A new macro, ARCH_HAVE_EXTRA_NOTES, was created for architectures to specify they have extra elf core notes. A new macro, ELF_CORE_EXTRA_NOTES_SIZE, was created so the size of the additional notes could be calculated and added to the notes phdr entry. A new macro, ELF_CORE_WRITE_EXTRA_NOTES, was created so the new notes would be written after the existing notes. The SPU coredump code resides in spufs. Stub functions are provided in the kernel which are hooked into the spufs code which does the actual work via register_arch_coredump_calls(). A new set of __spufs_<file>_read/get() functions was provided to allow the coredump code to read from the spufs files without having to lock the SPU context for each file read from. Cc: <linux-arch@vger.kernel.org> Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] powerpc: Workaround for of_platform without "reg" nor "dcr-reg"Benjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | Devices with no "reg" nor "dcr-reg" property are given a bus_id which is the node name alone. This means that if more than one such device with the same names are present in the system, sysfs will have collisions when creating the symlinks and will fail registering the devices. This works around that problem by assigning successive numbers to such devices. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Distinguish POWER6 partition modes and tell userspacePaul Mackerras2006-12-04
| | | | | | | | | | | | | | | | | This adds code to look at the properties firmware puts in the device tree to determine what compatibility mode the partition is in on POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM entries appropriately. Specifically, we look at the cpu-version property in the cpu node(s). If that contains a "logical" PVR value (of the form 0x0f00000x), we call identify_cpu again with this PVR value. A value of 0x0f000001 indicates the partition is in POWER5+ compatibility mode, and a value of 0x0f000002 indicates "POWER6 architected" mode, with various extensions disabled. We also look for various other properties: ibm,dfp, ibm,purr and ibm,spurr. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add oprofile supportMaynard Johnson2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PPU event-based and cycle-based profiling support to Oprofile for Cell. Oprofile is expected to collect data on all CPUs simultaneously. However, there is one set of performance counters per node. There are two hardware threads or virtual CPUs on each node. Hence, OProfile must multiplex in time the performance counter collection on the two virtual CPUs. The multiplexing of the performance counters is done by a virtual counter routine. Initially, the counters are configured to collect data on the even CPUs in the system, one CPU per node. In order to capture the PC for the virtual CPU when the performance counter interrupt occurs (the specified number of events between samples has occurred), the even processors are configured to handle the performance counter interrupts for their node. The virtual counter routine is called via a kernel timer after the virtual sample time. The routine stops the counters, saves the current counts, loads the last counts for the other virtual CPU on the node, sets interrupts to be handled by the other virtual CPU and restarts the counters, the virtual timer routine is scheduled to run again. The virtual sample time is kept relatively small to make sure sampling occurs on both CPUs on the node with a relatively small granularity. Whenever the counters overflow, the performance counter interrupt is called to collect the PC for the CPU where data is being collected. The oprofile driver relies on a firmware RTAS call to setup the debug bus to route the desired signals to the performance counter hardware to be counted. The RTAS call must set the routing registers appropriately in each of the islands to pass the signals down the debug bus as well as routing the signals from a particular island onto the bus. There is a second firmware RTAS call to reset the debug bus to the non pass thru state when the counters are not in use. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add routines for managing PMU interruptsKevin Corry2006-12-04
| | | | | | | | | | | | | | | | | | | The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.hKevin Corry2006-12-04
| | | | | | | | | | | | | Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: PMU register macrosKevin Corry2006-12-04
| | | | | | | | | More macros for manipulating bits in the Cell PMU control registers. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add symbol exports for oprofileArnd Bergmann2006-12-04
| | | | | | | | | Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c. They are needed for Oprofile, which can be built as a module. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Load isolation kernel from spu_runJeremy Kerr2006-12-04
| | | | | | | | | | | | | | | | | | | | In order to fit with the "don't-run-spus-outside-of-spu_run" model, this patch starts the isolated-mode loader in spu_run, rather than spu_create. If spu_run is passed an isolated-mode context that isn't in isolated mode state, it will run the loader. This fixes potential races with the isolated SPE app doing a stop-and-signal before the PPE has called spu_run: bugzilla #29111. Also (in conjunction with a mambo patch), this addresses #28565, as we always set the runcntrl register when entering spu_run. It is up to libspe to ensure that isolated-mode apps are cleaned up after running to completion - ie, put the app through the "ISOLATE EXIT" state (see Ch11 of the CBEA). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Add runcntrl read accessorsJeremy Kerr2006-12-04
| | | | | | | | | | | | | | This change adds a read accessor for the SPE problem-state run control register. This is required for for applying (userspace) changes made to the run control register while the SPE is stopped - simply asserting the master run control bit is not sufficient. My next patch for isolated-mode setup requires this. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Use SPU master control to prevent wild SPU executionArnd Bergmann2006-12-04
| | | | | | | | | | When the user changes the runcontrol register, an SPU might be running without a process being attached to it and waiting for events. In order to prevent this, make sure we always disable the priv1 master control when we're not inside of spu_run. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix return value of spufs_mfc_writeMasato Noguchi2006-12-04
| | | | | | | | | This patch changes spufs_mfc_write() to return correct size instead of 0. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Always map local store non-guardedArnd Bergmann2006-12-04
| | | | | | | | | | | When fixing spufs to map the 'mem' file backing store cacheable, I incorrectly set the physical mapping to use both cache-inhibited and guarded mapping, which resulted in a serious performance degradation. Debugged-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Avoid user-triggered oops in ptraceChristoph Hellwig2006-12-04
| | | | | | | | | | | | | | | | | | | | When one of the spufs files is mapped into a process address space, regular users can use ptrace to attempt accessing them with access_process_vm(). With the way that the mappings currently work, this likely causes an oops. Setting the vm_flags to VM_IO makes sure that ptrace can not access them but returns an error code. This is not the perfect solution in case of the local store mapping, but it fixes the oops in a well-defined way. Also remove leftover VM_RESERVED flags in spufs. The VM_RESERVED flag is on it's way out and not checked by the memory managment code anymore. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Christoph Hellwig <chellwig@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix missing stop-and-signalMasato Noguchi2006-12-04
| | | | | | | | | | | | | | | When there is pending signals, current spufs_run_spu() always returns -ERESTARTSYS and it is called again automatically. But, if spe already stopped by stop-and-signal or halt instruction, returning -ERESTARTSYS makes stop-and-signal/halt lost and spu run over the end-point. For your convenience, I attached a sample code to restage this bug. If there is no bug, printed NPC will be 0x4000. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Return correct event for data storage interruptArnd Bergmann2006-12-04
| | | | | | | | | When we attempt an MFC DMA to an unmapped address, the event returned from spu_run should be SPE_EVENT_SPE_DATA_STORAGE, not SPE_EVENT_INVALID_DMA. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Replace spu.nid with spu.nodeGeoff Levand2006-12-04
| | | | | | | | | Replace the use of the platform specific variable spu.nid with the platform independednt variable spu.node. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Read from signal files only if data is thereDwayne Grant McConnell2006-12-04
| | | | | | | | | | | | | | | | | | | | We need to check the channel count of the signal notification registers before reading them, because it can be undefined when the count is zero. In order to read count and data atomically, we read from the saved context. This patch uses spu_acquire_saved() to force a context save before a /signal1 or /signal2 read. Because of this it is no longer necessary to have backing_ops and hw_ops versions of this function so they have been removed. Regular applications should not rely on reading this register to be fast, as it's conceptually a write-only file from the PPE perspective. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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