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* Merge branch 'core-iommu-for-linus' of ↵Linus Torvalds2009-09-11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (59 commits) x86/gart: Do not select AGP for GART_IOMMU x86/amd-iommu: Initialize passthrough mode when requested x86/amd-iommu: Don't detach device from pt domain on driver unbind x86/amd-iommu: Make sure a device is assigned in passthrough mode x86/amd-iommu: Align locking between attach_device and detach_device x86/amd-iommu: Fix device table write order x86/amd-iommu: Add passthrough mode initialization functions x86/amd-iommu: Add core functions for pd allocation/freeing x86/dma: Mark iommu_pass_through as __read_mostly x86/amd-iommu: Change iommu_map_page to support multiple page sizes x86/amd-iommu: Support higher level PTEs in iommu_page_unmap x86/amd-iommu: Remove old page table handling macros x86/amd-iommu: Use 2-level page tables for dma_ops domains x86/amd-iommu: Remove bus_addr check in iommu_map_page x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEX x86/amd-iommu: Change alloc_pte to support 64 bit address space x86/amd-iommu: Introduce increase_address_space function x86/amd-iommu: Flush domains if address space size was increased x86/amd-iommu: Introduce set_dte_entry function x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devices ...
| * Merge branch 'amd-iommu/2.6.32' of ↵Ingo Molnar2009-09-04
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into core/iommu
| | * Merge branch 'amd-iommu/pagetable' into amd-iommu/2.6.32Joerg Roedel2009-09-03
| | |\ | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/amd_iommu.c
| | | * x86/amd-iommu: Change iommu_map_page to support multiple page sizesJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a map_size parameter to the iommu_map_page function which makes it generic enough to handle multiple page sizes. This also requires a change to alloc_pte which is also done in this patch. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Support higher level PTEs in iommu_page_unmapJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes fetch_pte and iommu_page_unmap to support different page sizes too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Remove old page table handling macrosJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | These macros are not longer required. So remove them. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Use 2-level page tables for dma_ops domainsJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver now supports a dynamic number of levels for IO page tables. This allows to reduce the number of levels for dma_ops domains by one because a dma_ops domain has usually an address space size between 128MB and 4G. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Remove bus_addr check in iommu_map_pageJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver now supports full 64 bit device address spaces. So this check is not longer required. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEXJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | This change allows to remove these old macros later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Change alloc_pte to support 64 bit address spaceJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the alloc_pte function to be able to map pages into the whole 64 bit address space supported by AMD IOMMU hardware from the old limit of 2**39 bytes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Introduce increase_address_space functionJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be used to increase the address space size of a protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Flush domains if address space size was increasedJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thist patch introduces the update_domain function which propagates the larger address space of a protection domain to the device table and flushes all relevant DTEs and the domain TLB. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Introduce set_dte_entry functionJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function factors out some logic of attach_device to a seperate function. This new function will be used to update device table entries when necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devicesJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a generic variant of amd_iommu_flush_all_devices function which flushes only the DTEs for a given protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_physJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't reimplement the page table walker in this function. Use the generic one. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Use fetch_pte in iommu_unmap_pageJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of reimplementing existing logic use fetch_pte to walk the page table in iommu_unmap_page. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * x86/amd-iommu: Make fetch_pte aware of dynamic mapping levelsJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the fetch_pte function in the AMD IOMMU driver to support dynamic mapping levels. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * | Merge branch 'amd-iommu/passthrough' into amd-iommu/2.6.32Joerg Roedel2009-09-03
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/amd_iommu.c arch/x86/kernel/amd_iommu_init.c
| | | * | x86/amd-iommu: Initialize passthrough mode when requestedJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the passthrough mode for AMD IOMMU by running the initialization function when iommu=pt is passed on the kernel command line. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Don't detach device from pt domain on driver unbindJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes sure a device is not detached from the passthrough domain when the device driver is unloaded or does otherwise release the device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Make sure a device is assigned in passthrough modeJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the IOMMU driver runs in passthrough mode it has to make sure that every device not assigned to an IOMMU-API domain must be put into the passthrough domain instead of keeping it unassigned. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Align locking between attach_device and detach_deviceJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the locking behavior between the functions attach_device and __attach_device consistent with the locking behavior between detach_device and __detach_device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Fix device table write orderJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The V bit of the device table entry has to be set after the rest of the entry is written to not confuse the hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Add passthrough mode initialization functionsJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When iommu=pt is passed on kernel command line the devices should run untranslated. This requires the allocation of a special domain for that purpose. This patch implements the allocation and initialization path for iommu=pt. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Add core functions for pd allocation/freeingJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch factors some code of protection domain allocation into seperate functions. This way the logic can be used to allocate the passthrough domain later. As a side effect this patch fixes an unlikely domain id leakage bug. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/dma: Mark iommu_pass_through as __read_mostlyJoerg Roedel2009-09-03
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This variable is read most of the time. This patch marks it as such. It also documents the meaning the this variable while at it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | |
| | | \
| | *-. \ Merge branches 'gart/fixes', 'amd-iommu/fixes+cleanups' and ↵Joerg Roedel2009-09-03
| | |\ \ \ | | | | | | | | | | | | | | | | | | 'amd-iommu/fault-handling' into amd-iommu/2.6.32
| | | | * | x86/amd-iommu: Reset command buffer if wait loop failsJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of a panic on an comletion wait loop failure, try to recover from that event from resetting the command buffer. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Panic if IOMMU command buffer reset failsJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To prevent the driver from doing recursive command buffer resets, just panic when that recursion happens. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Reset command buffer on ILLEGAL_COMMAND_ERRORJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On an ILLEGAL_COMMAND_ERROR the IOMMU stops executing further commands. This patch changes the code to handle this case better by resetting the command buffer in the IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Add reset function for command buffersJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch factors parts of the command buffer initialization code into a seperate function which can be used to reset the command buffer later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Add function to flush all DTEs on one IOMMUJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function flushes all DTE entries on one IOMMU for all devices behind this IOMMU. This is required for command buffer resetting later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Introduce function for iommu-local domain flushJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a function to flush all domain tlbs for on one given IOMMU. This is required later to reset the command buffer on one IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Dump illegal command on ILLEGAL_COMMAND_ERRORJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code to dump the command which caused an ILLEGAL_COMMAND_ERROR raised by the IOMMU hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | x86/amd-iommu: Dump fault entry on DTE errorJoerg Roedel2009-09-03
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code to dump the content of the device table entry which caused an ILLEGAL_DEV_TABLE_ENTRY error from the IOMMU hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: fix broken check in amd_iommu_flush_all_devicesJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The amd_iommu_pd_table is indexed by protection domain number and not by device id. So this check is broken and must be removed. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Remove redundant 'IOMMU' stringJoerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'IOMMU: ' prefix is not necessary because the DUMP_printk macro already prints its own prefix. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: replace "AMD IOMMU" by "AMD-Vi"Joerg Roedel2009-09-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the "AMD IOMMU" printk strings with the official name for the hardware: "AMD-Vi". Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Remove some merge helper codeJoerg Roedel2009-09-03
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | This patch removes some left-overs which where put into the code to simplify merging code which also depends on changes in other trees. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * / x86/gart: Do not select AGP for GART_IOMMUPavel Vasilyev2009-09-03
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | There is no dependency from the gart code to the agp code. And since a lot of systems today do not have agp anymore remove this dependency from the kernel configuration. Signed-off-by: Pavel Vasilyev <pavel@pavlinux.ru> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * | lib/swiotlb.c: Fix strange panic message selection logic when swiotlb fills upCasey Dahlin2009-08-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | swiotlb_full() in lib/swiotlb.c throws one of two panic messages based on whether the direction of transfer is from the device or to the device. The logic around this is somewhat weird in the case of bidirectional transfers. It appears to want to throw both in succession, but since its a panic only the first makes it. This patch adds a third, separate error for DMA_BIDIRECTIONAL to make things a bit clearer. Signed-off-by: Casey Dahlin <cdahlin@redhat.com> Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Becky Bruce <beckyb@kernel.crashing.org> [ further fixed the error message ] Signed-off-by: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <200908202327.n7KNRuqK001504@imap1.linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Add CONFIG_DMA_API_DEBUG supportFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All we need to do for CONFIG_DMA_API_DEBUG support is call dma_debug_init() in DMA code common for SPARC32 and SPARC64. Now SPARC32 uses two dma_map_ops structures for pci and sbus so there is not much dma stuff for SPARC32 in kernel/dma.c. kernel/ioport.c also includes dma stuff for SPARC32. So let's put all the dma stuff for SPARC32 in kernel/ioport.c and make kernel/dma.c common for SPARC32 and SPARC64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-9-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Use asm-generic/pci-dma-compatFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Replace sbus_map_single and sbus_unmap_single with sbus_map_page and ↵FUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sbus_unmap_page This is a preparation for using asm-generic/pci-dma-compat.h; SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-7-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Remove no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpuFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now sparc uses include/asm-generic/dma-mapping-common.h. pci_sun4v.c doesn't need to have no-op dma_4v_sync_single_for_cpu and dma_4v_sync_sg_for_cpu (dma-mapping-common.h does nothing if sync_{single|sg}_for_cpu hook is not defined). So we can remove them safely. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-6-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Use asm-generic/dma-mapping-common.hFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-5-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | sparc: Use dma_map_ops structFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-4-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | IA64: Remove NULL flush_write_buffersFUJITA Tomonori2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_write_buffers() in dma-mapping-common.h was removed so we can remove NULL flush_write_buffers() in IA64. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: davem@davemloft.net LKML-Reference: <1249872797-1314-3-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | dma-ops: Remove flush_write_buffers() in dma-mapping-common.hArnd Bergmann2009-08-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The purpose of this patch is that, we can avoid defining NULL flush_write_buffers() on IA64 and SPARC. dma-mapping-common.h is used by X86 and IA64 (and SPARC soon) but only X86 with CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE actually uses flush_write_buffers(). CONFIG_X86_OOSTORE or CONFIG_X86_PPRO_FENCE is usable with only kernel/pci-nommu.c (that is, not usable with other X86 IOMMU implementations such as SWIOTLB, VT-d, etc) so we can safely move flush_write_buffers() in asm-generic/dma-mapping-common.h to arch/x86/kernel/pci-nommu.c. The further discussion is: http://lkml.org/lkml/2009/6/28/104 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: davem@davemloft.net Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-2-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86: remove unused swiotlb_phys_to_bus() and swiotlb_bus_to_phys()FUJITA Tomonori2009-07-28
| | | | | | | | | | | | | | | | | | | | | phys_to_dma() and dma_to_phys() are used instead of swiotlb_phys_to_bus() and swiotlb_bus_to_phys(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
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