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* dm raid1: fix statusMilan Broz2007-07-12
| | | | | | | | | | | | Fix mirror status line broken in dm-log-report-fault-status.patch: - space missing between two words - placeholder ("0") required for compatibility with a subsequent patch - incorrect offset parameter Cc: stable@kernel.org Signed-off-by: Milan Broz <mbroz@redhat.com> Signed-off-by: Alasdair G Kergon <agk@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dm: remove duplicate module name from error msgsAlasdair G Kergon2007-07-12
| | | | | | | | Remove explicit module name from messages as the macro now includes it automatically. Signed-off-by: Alasdair G Kergon <agk@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dm delay: cleanupAlasdair G Kergon2007-07-12
| | | | | | | | Use setup_timer(). Replace semaphore with mutex. Signed-off-by: Alasdair G Kergon <agk@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dm: use kmem_cache macroAlasdair G Kergon2007-07-12
| | | | | | | | | | Use new KMEM_CACHE() macro and make the newly-exposed structure names more meaningful. Also remove some superfluous casts and inlines (let a modern compiler be the judge). Acked-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Alasdair G Kergon <agk@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dm: bio_list prefetch removalAlasdair G Kergon2007-07-12
| | | | | | | | Remove dubious prefetch from bio_list_for_each() macro. Cc: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Alasdair G Kergon <agk@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-07-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits) [ARM] sa1100: remove boot time RTC initialisation [ARM] sa1100: stop doing our own rtc management over suspend [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file [ARM] pxa: move platform devices to separate header file [ARM] pxa: move device registration into CPU-specific file [ARM] pxa: remove boot time RTC initialisation [ARM] pxa: stop doing our own rtc management over suspend [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq() [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler() [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio() [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low() [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare() [ARM] pxa: move pm_ops structure into CPU specific files [ARM] pxa: introduce cpu_is_pxaXXX macros [ARM] pxa: remove MMC register defines from pxa-regs.h ...
| *-------------. Merge branches 'at91', 'davinci', 'imx', 'iop', 'ixp', 'ks8695', 'misc', ↵Russell King2007-07-12
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pxa' and 's3c' into devel
| | | | | | | | | * [ARM] 4470/2: OSIRIS: large page NAND supportBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the partition layout on the revision B modules which have large page NAND fitted. The new partition table accounts for the use of the 128KiB block parts, which means the second partition on the device is moved to the new boundary. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * [ARM] 4467/3: BAST: AX88796 device resourcesBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add resources for the AX88796 on the Simtec BAST. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * [ARM] 4469/1: ANUBIS: large page NAND supportBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the partition layour used on the revision B modules which ship with large page NAND flash as default. The differnce between the old and new layouts is that the large page devices use 128KiB blocks, so the initial loader partition now ends at 128KiB boundary pushing the begining of partition 1 up. The rest of the partitions are in the same place as the small page NAND devices. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * [ARM] 4468/2: ANUBIS: Add SM501 device resourcesBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add resources for the SM501 present on the Simtec Anubis board, including the framebuffer and the I2C for DDC. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * [ARM] 4466/1: ANUBIS: Anubis AX88796 supportBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the resources necessary for the AX88796 driver to attach to the AX88796 network controller fitted on the Simtec Anubis board. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: move platform devices to separate header fileRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: move device registration into CPU-specific fileRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows individual CPU support to determine which platform devices should be registered. Also fix a copy-n-paste bug in the I2C power platform device entry. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: remove boot time RTC initialisationRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC library code contains everything necessary to set the system time from the RTC; for similar reasons as the previous commit, it's far better to let the RTC library code sort this out rather than implement something which might not be appropriate for everyone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: stop doing our own rtc management over suspendRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the RTC management over a suspend/resume cycle. Firstly, we may not be using the internal RTC for time keeping; some platforms have an external RTC for this inspite of the PXA having an internal RTC. Secondly, the RTC library code handles updating system time on resume. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma codeEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao <eric.miao@marvell.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq()Eric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /* should be ok this time, I aligned this patch to your arm:pxa2.mbox */ 1. move pxa25x specific IRQ initialization code to pxa25x_init_irq() and pxa27x code to pxa27x_init_irq(), remove pxa_init_irq() 2. replace all pxa_init_irq() with their PXA25x or PXA27x specific functions Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQsEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICIP2 is not examined during IRQ entrance, this patch add the checking if the processor is PXA27x or later, with CoreG bits in CPUID (Core Generation) > 1 Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler()Eric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. use GPIO_IRQ_mask[] to select those bits of interest, actually only those "unmasked" GPIO IRQs with their corresponding bits in GPIO_IRQ_mask[] set to "1" should be checked 2. remove #ifdef PXA_LAST_GPIO > 96 .. #endif, GPIO_IRQ_mask[] is used to mask out the irrelevant bits, so that even though the GEDR3 on PXA25x is reserved, it will be masked, and the following code will never run. Another point is that GPIO85- GPIO95 bits within GEDR2 will also be masked out on PXA25x Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio()Eric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the GPIO IRQ initialization code to pxa_init_irq_gpio() Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()Eric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. move low IRQ initialization code to pxa_init_irq_low() Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQSEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs, and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants 2. make the code specific to the high IRQ numbers (32..64) to be PXA27x specific 3. add a function pxa_init_irq_high() to initialize the internal high IRQ chip, the invoke of this function could be moved to PXA27x specific initialization code Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4434/1: PXA: remove PXA_IRQ_SKIPEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ starts from zero. This makes IRQ numbering inconsistent between PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX definition has the same value on both PXA25x and PXA27x. 2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this avoids unintentional use of these macros on PXA25x Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare()Russell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pxa_pm_prepare() tried to validate the suspend method type. As noted in previous commits: eb9289eb20df6b54214c45ac7c6bf5179a149026 9c372d06ce9ddf65e1393f9ea22a6d6bd5f96b42 e8c9c502690efd24b7055bf608e7a3c34216848b the checking of the suspend type in the 'prepare' method is the wrong place to do this; use the 'valid' method instead. This means that pxa_pm_prepare() can be entirely removed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: move pm_ops structure into CPU specific filesRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the pm_ops structure into the PXA25x and PXA27x support files. Remove the old pxa_pm_prepare() function, and rename the both pxa_cpu_pm_prepare() functions as pxa_pm_prepare(). We'll fix that later. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: introduce cpu_is_pxaXXX macrosRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: remove MMC register defines from pxa-regs.hRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pxamci.h redefines the MMC registers differently so they can be used with ioremap. Remove the incompatible definitions from pxa-regs.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: use mutexes instead of semaphoresRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: remove useless pxa_pm_finish() functionRussell King2007-07-12
| | | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pxa_pm_finish() does nothing but return zero. The core code does nothing with this return value, and will not try to call the finish method in the pm_ops structure if it is NULL. Therefore, we can remove this useless function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] sa1100: remove boot time RTC initialisationRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC library code contains everything necessary to set the system time from the RTC; for similar reasons as the previous commit, it's far better to let the RTC library code sort this out rather than implement something which might not be appropriate for everyone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] sa1100: stop doing our own rtc management over suspendRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the RTC management over a suspend/resume cycle. As per the corresponding PXA patch, the RTC library code handles updating system time on resume. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regsCatalin Marinas2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running Linux in non-secure mode (on ARM1176 for example), depending on the CP15 secure configuration register, the CPSR.F bit (6) might only be modified from the secure mode. However, the valid_user_regs() function checks for this bit being cleared. With commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user registers are not considered valid. The patch also ensures that the CPSR.A bit is cleared and the USR mode is set if the CPU does not support the 26bit user mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 4473/2: Take the HWCAP definitions out of the elf.h fileCatalin Marinas2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch moves the HWCAP definitions and the extern elf_hwcap declaration to the hwcap.h header file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 4453/1: Fully Decode ARM instruction set state in show_regs() tombstoneGeorge G. Davis2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM show_regs() tombstone only partially decodes which ARM ISA was executing at the time a fault occurred displaying either "(T)" for the Thumb case or nothing at all for other cases. This patch therefore explicitly identifies which state the processor is in at the time of a fault: ARM, Thumb, Jazelle or JazelleEE. Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 4423/1: add ATAGS supportBill Gatliff2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Examines the ATAGS pointer (r2) at boot, and interprets a nonzero value as a reference to an ATAGS structure. A suitable ATAGS structure replaces the kernel's command line. Signed-off-by: Bill Gatliff <bgat@billgatliff.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 4393/2: ARMv7: Add uncompressing code for the new CPU Id formatCatalin Marinas2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current arch/arm/boot/compressed/head.S code only supports cores to ARMv6 with the old CPU Id format. This patch adds support for the new ARMv6 with the new CPU Id and ARMv7 cores that no longer have the ARMv4 cache operations. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] Fix bounding error in ioremap_pfn()Russell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If size=16M offset=2K then we should map two supersections rather than just one. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] riscpc: fix decompressor font file handlingRussell King2007-07-12
| | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | font_acorn_8x8.o was being built in drivers/video/console/ twice during a build _in the same location_ - once for the kernel proper, and once for the decompressor. The result is when you came to run an install target, the kernel was always rebuilt due to this file apparantly having been built with different compiler arguments. Solve this by making a local copy at build time in the decompressor's directory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * / [ARM] 4377/1: KS8695: GPIO driverAndrew Victor2007-07-12
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver to control the GPIO pins on the KS8695 processor. The driver natively supports the Generic GPIO interface. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] If linux/irq.h is included, asm/irq.h is not requiredRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4407/1: Remove in-kernel mach id setting for gtwx5715 ixp4xx boardMichael-Luke Jones2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If MACH_GTWX5715 is set in Kconfig, this code sets the mach id automatically. Howeber, this means that any IXP4xx kernel which is setup to support the gtwx5715 board will not successfully boot on any other board. If the bootloader sets the wrong mach id, it should be set correctly by a kernel shim. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4408/2: Fixup support for gtwx5715 ixp4xx boardMichael-Luke Jones2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes up compiling of the gtwx5715 board setup code, which has apparently been broken since 2.6.18 and the generic IRQ changes. In addition it removes some unecessary extern declarations in the gtwx5715-pci.c file. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4426/2: Netgear WG302 v2 and WAG302 v2 supportImre Kaloz2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series. This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4425/2: Gateway 7001 series supportImre Kaloz2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for the Gateway 7001 AccessPoint series. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4385/2: ixdp425: NAND supportVladimir Barinov2007-07-12
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IXDP425 NAND support (arch specific part). The generic platform driver that is used by ixdp425 platfrom is already in upstream kernel in 2.6.22-rc1. Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * / [ARM] 4429/2: iop13xx: expose the 'iop' attribute versions of the tpmi ↵Dan Williams2007-07-12
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | control registers The tpmi control registers can be accessed on the internal bus via an address with PCI attributes or IOP attributes (i.e. read-only, read-write... etc). The sas driver needs access to the iop-attribute registers for initialization. Changelog: * use ARRAY_SIZE for num_resources, Russell King Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4374/3: i.MX/MX1 clock event sourcePavel Pisa2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support clock event source based on i.MX general purpose timer in free running timer mode. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4373/1: i.MX/MX1 GPIO support implementationPavel Pisa2007-07-12
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for generic input output for MX1 family. The implementation prevents allocation of one pin by two users, but does not store pointer to the user description permanently, because this solution would have bigger memory overhead. The simple way to integrate code with per BSP pins setup and allocation is required else all GPIO registration checking is useless. The function imx_gpio_setup_multiple_pins() can be used for this purpose in future. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4432/5: davinci: pin mux supportVladimir Barinov2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support pin multiplexing configurations driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 06:37:56 -0500