| Commit message (Collapse) | Author | Age |
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Convert the smsc47b397 driver from the nonsensical i2c-isa hack to a
regular platform driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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The W83627HF is better supported by the w83627hf driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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This lets us get rid of some of the macro-generated functions and
shrinks the driver size significantly (about 9%).
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Use the driver data structure as the main device reference, instead of
the i2c client. It makes the driver a bit smaller, and makes more sense
as this is an hybrid driver, supporting both I2C and ISA devices.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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* Fix voltage rounding
* Drop useless macros
* Drop useless casts
* Turn macros evaluating their parameters more than once into inline
functions
* Use signed variables for temperatures
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Reimplement the ISA device support as a platform driver, so that we no
longer rely on i2c-isa.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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It is not an error if a system has no ams hardware. Do not clutter dmesg
in this case.
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Michael Hanselmann <linux-kernel@hansmi.ch>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Fix sleep and retry logic in ams-i2c.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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A driver for the Analog Devices AD7416, AD7417 and AD7418 chips.
Signed-off-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Documentation for the coretemp driver.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Add the support for the digital temperature sensor found in recent
Intel Core CPUs.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Use safe MSR functions provided by arch/*/lib/msr-on-cpu.c in
arch/i386/kernel/msr.c.
Signed-off-by: Nicolas Boichat <nicolas@boichat.ch>
Cc: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Add safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu.
You should use these when the target MSR may not actually exist, as
doing so could trigger an exception which the regular functions do not
handle. The safe variants are slower, though.
The upcoming coretemp hardware monitoring driver will need this.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Cc: Alexey Dobriyan <adobriyan@openvz.org>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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This lets us get rid of macro-generated functions and shrinks the
driver size by about 8%.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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This lets us get rid of macro-generated functions and shrinks the
driver size significantly (about 10%).
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Use the driver data structure as the main device reference, instead of
the i2c client. It makes the driver a bit smaller, and makes more sense
as this is an hybrid driver, supporting both I2C and ISA devices.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Reimplement the ISA device support as a platform driver, so that we no
longer rely on i2c-isa.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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This driver supports the Maxim MAX6650 and MAX6651 fan speed
monitoring and control chips.
Signed-off-by: Hans J. Koch <hjk@linutronix.de>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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This lets us get rid of macro-generated functions and shrinks the
driver size by about 7%.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Also use pr_info instead of printk.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Convert the smsc47m1 driver from the nonsensical i2c-isa hack to a
regular platform driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Convert the w83627hf driver from the nonsensical i2c-isa hack to a
regular platform driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Some preliminary cleanups to the w83627hf hardware monitoring driver,
to make its conversion to a platform driver easier:
* Add missing include ioport.h
* Drop unused enum value any_chip
* Group module parameters
* Define and use DRVNAME
* Drop unused struct member lm75
* Move the handling of force_addr and device activation to
w83627hf_find
* Consistently use local type in w83627hf_init_client
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Update the VID type for certain VIA processors and remove
the Itanium entries.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Some hardware monitoring drivers create the VID/VRM interface files
conditionally depending on the chip model or configuration. We should
only call vid_which_vrm() when we are actually going to create the
files. Not only it is more logical and efficient that way, but it also
prevents printing unnecessary warnings such as the one reported here:
http://lists.lm-sensors.org/pipermail/lm-sensors/2007-February/018954.html
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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The smsc47m1 driver uses a mutex to protect the accesses to the
hardware registers. It really doesn't need any protection, as the
register space is flat. Get rid of that mutex for a smaller and
faster driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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The new SMSC LPC47M292 Super-I/O chip is a bit different from the
previous ones, it supports a 3rd fan, but unfortunately the pin
configuration registers are different.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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My understanding of the resource management in the Linux 2.6 device
driver model is that the devices should declare their resources, and
then when a driver attaches to a device, it should request the
resources it will be using, so as to mark them busy. This is how the
PCI and PNP subsystems work, you can clearly see the two levels of
resources (declaration and request) in /proc/ioports for these
devices.
So I believe that our platform hardware monitoring drivers should
follow the same logic. At the moment, we only declare the resources
but we do not request them. This patch adds the I/O region request
and release calls.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Juerg Haefliger <juergh@gmail.com>
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The new SMSC LPC47M292 Super-I/O chip includes a hardware monitoring
block which is compatible with those of the LPC47M192.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Hartmut Rick <linux@rick.claranet.de>
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* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SCSI] esp_scsi: Fix section mismatch warnings.
[VIDEO] sunxvr2500: Fix PCI device ID table.
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Signed-off-by: Martin Habets <errandir_news@mph.eclipse.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Noticed by Meelis Roos.
Signed-off-by: David S. Miller <davem@davemloft.net>
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More fallout from the removal of "struct subsystem" from the core device
model.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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* git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] update memory attribute aliasing documentation & test cases
[IA64] fail mmaps that span areas with incompatible attributes
[IA64] allow WB /sys/.../legacy_mem mmaps
[IA64] make ioremap avoid unsupported attributes
[IA64] rename ioremap variables to match i386
[IA64] relax per-cpu TLB requirement to DTC
[IA64] remove per-cpu ia64_phys_stacked_size_p8
[IA64] Fix example error injection program
[IA64] Itanium MC Error Injection Tool: pal_mc_error_inject() interface
[IA64] Itanium MC Error Injection Tool: Makefile changes
[IA64] Itanium MC Error Injection Tool: Driver sysfs interface
[IA64] Itanium MC Error Injection Tool: Doc and sample application
[IA64] Itanium MC Error Injection Tool: Kernel configuration
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Updates documentation and adds some test cases.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Example memory map (from HP sx1000 with VGA enabled):
0x00000 - 0x9FFFF supports only WB (cacheable) access
0xA0000 - 0xBFFFF supports only UC (uncacheable) access
0xC0000 - 0xFFFFF supports only WB (cacheable) access
Some versions of X map the entire 0x00000-0xFFFFF area at once. With the
example above, this mmap must fail because there's no memory attribute that's
safe for the entire area.
Prior to this patch, we performed the mmap with a UC mapping. When X
accessed the WB memory at 0xC0000, it caused an MCA. The crash can happen
when mapping 0xC0000 from either /dev/mem or a /sys/.../legacy_mem file.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Allow cacheable mmaps of legacy_mem if WB access is supported for the region.
The "legacy_mem" file often contains a shadow option ROM, and some versions of
X depend on this.
Tim Yamin <plasm@roo.me.uk> reported that this change fixes X on a Dell
PowerEdge 3250.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Example memory map (from HP sx1000 with VGA enabled):
0x00000 - 0x9FFFF supports only WB (cacheable) access
0xA0000 - 0xBFFFF supports only UC (uncacheable) access
0xC0000 - 0xFFFFF supports only WB (cacheable) access
pci_read_rom() indirectly uses ioremap(0xC0000) to read the shadow VGA option
ROM. ioremap() used to default to a 16MB or 64MB UC kernel identity mapping,
which would cause an MCA when reading 0xC0000 since only WB is supported there.
X uses reads the option ROM to initialize devices. A smaller test case is:
# echo 1 > /sys/bus/pci/devices/0000:aa:03.0/rom
# cp /sys/bus/pci/devices/0000:aa:03.0/rom x
To avoid this, we can use the same ioremap_page_range() strategy that most
architectures use for all ioremaps. These page table mappings come out of the
vmalloc area. On ia64, these are in region 5 (0xA... addresses) and typically
use 16KB or 64KB mappings instead of 16MB or 64MB mappings. The smaller
mappings give more flexibility to use the correct attributes.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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No functional change, just use the same names as i386.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Instead of pinning per-cpu TLB into a DTR, use DTC. This will free up
one TLB entry for application, or even kernel if access pattern to
per-cpu data area has high temporal locality.
Since per-cpu is mapped at the top of region 7 address, we just need to
add special case in alt_dtlb_miss. The physical address of per-cpu data
is already conveniently stored in IA64_KR(PER_CPU_DATA). Latency for
alt_dtlb_miss is not affected as we can hide all the latency. It was
measured that alt_dtlb_miss handler has 23 cycles latency before and
after the patch.
The performance effect is massive for applications that put lots of tlb
pressure on CPU. Workload environment like database online transaction
processing or application uses tera-byte of memory would benefit the most.
Measurement with industry standard database benchmark shown an upward
of 1.6% gain. While smaller workloads like cpu, java also showing small
improvement.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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It's not efficient to use a per-cpu variable just to store
how many physical stack register a cpu has. Ever since the
incarnation of ia64 up till upcoming Montecito processor, that
variable has "glued" to 96. Having a variable in memory means
that the kernel is burning an extra cacheline access on every
syscall and kernel exit path. Such "static" value is better
served with the instruction patching utility exists today.
Convert ia64_phys_stacked_size_p8 into dynamic insn patching.
This also has a pleasant side effect of eliminating access to
per-cpu area while psr.ic=0 in the kernel exit path. (fixable
for per-cpu DTC work, but why bother?)
There are some concerns with the default value that the instruc-
tion encoded in the kernel image. It shouldn't be concerned.
The reasons are:
(1) cpu_init() is called at CPU initialization. In there, we
find out physical stack register size from PAL and patch
two instructions in kernel exit code. The code in question
can not be executed before the patching is done.
(2) current implementation stores zero in ia64_phys_stacked_size_p8,
and that's what the current kernel exit path loads the value with.
With the new code, it is equivalent that we store reg size 96
in ia64_phys_stacked_size_p8, thus creating a better safety net.
Given (1) above can never fail, having (2) is just a bonus.
All in all, this patch allow one less memory reference in the kernel
exit path, thus reducing syscall and interrupt return latency; and
avoid polluting potential useful data in the CPU cache.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Progam accessed using /sys/devices/system/node/node0/cpu%d/err_inject/
This path only exists for CONFIG_NUMA=y systems. Better to use
/sys/devices/system/cpu/cpu%d/err_inject/ which is available on all
systems.
Signed-off-by: Tony Luck <tony.luck@intel.com>
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This patch implements pal_mc_error_inject() interface in kernel. Both physical
mode and virtual mode are supported.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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This patch has Makefile changes.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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This kernel driver patch provides sysfs interface for user application to
call pal_mc_error_inject() procedure.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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This patch contains a documention and sample application. Since the sample
application has ~1000 lines of code, it might not be suitable in a kernel
documention in kenrel tree. If you think this is not good place to hold
the sample application, please let me know and I'm open to other choices
e.g. sourceforge etc.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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