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* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2006-09-27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits) pciehp - fix wrong return value IA64: PCI: dont disable irq which is not enabled acpiphp: add support for ioapic hot-remove PCI: assign ioapic resource at hotplug acpiphp: disable bridges acpiphp: stop bus device before acpi_bus_trim PCI: add pci_stop_bus_device acpiphp: do not initialize existing ioapics acpiphp: initialize ioapics before starting devices acpiphp: set hpp values before starting devices PCI Hotplug: cleanup pcihp skeleton code. PCI: Restore PCI Express capability registers after PM event PCI: drivers/pci/hotplug/acpiphp_glue.c: make a function static PCI: Multiprobe sanitizer PCI: fix __must_check warnings PCI Hotplug: fix __must_check warnings SHPCHP: fix __must_check warnings PCI-Express AER implemetation: pcie_portdrv error handler PCI-Express AER implemetation: AER core and aerdriver PCI-Express AER implemetation: export pcie_port_bus_type ...
| * pciehp - fix wrong return valueKenji Kaneshige2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the problem that trying to enable already enabled slot disables the slot by returning the proper value from pciehp_enable_slot()/pciehp_disable_slot(). Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * IA64: PCI: dont disable irq which is not enabledSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch prevents pcibios_disable_device() from disabling interrupts of devices which is not enabled. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: add support for ioapic hot-removeSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for ioapics hot-remove. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: assign ioapic resource at hotplugSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | We need to assign resources to ioapics being hot-added. This patch changes pbus_assign_resources_sorted() to assign resources if the ioapic has no assigned resources. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: disable bridgesSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently acpiphp calls pci_enable_device() against all hot-added bridges, but acpiphp does not call pci_disable_device() against them in hot-remove. So ioapic hot-remove would fail. This patch fixes this issue. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: stop bus device before acpi_bus_trimSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Contrary to PCI bridge hot-add, we need to follow the sequence below for PCI bridge hot-removal. (1) Stop devices (detach drivers, remove from the global list, etc.) (2) Unbind ACPI node from the devices (remove the _PRT entries) (3) Remove devices (remove from the device list, etc.) This patch fixes acpiphp driver to follow above sequence for P2P bridge hot-removal. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: add pci_stop_bus_deviceSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pci_stop_bus_device() which stops a PCI device (detach the driver, remove from the global list and so on) and any children. This is needed for ACPI based PCI-to-PCI bridge hot-remove, and it will be also needed for ACPI based PCI root bridge hot-remove. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: do not initialize existing ioapicsSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently acpiphp initializes all ioapics under the bus on which hot-add event occured. It also initializes already working ioapics. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: initialize ioapics before starting devicesSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently acpiphp initializes ioapics after starting devices, but ioapics should be initialized before starting devices. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * acpiphp: set hpp values before starting devicesSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently acpiphp sets hpp values after starting devices, but the values should be set before starting devices. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI Hotplug: cleanup pcihp skeleton code.Satoru Takeuchi2006-09-26
| | | | | | | | | | | | | | | | | | | | Cleanup pcihp skeleton code. Fix some typos and remove some unnecessary blank lines. Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Restore PCI Express capability registers after PM eventMichael S. Tsirkin2006-09-26
| | | | | | | | | | | | | | | | | | Restore PCI Express capability registers after PM event. This includes maxumum MTU for PCI express and other vital data. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: drivers/pci/hotplug/acpiphp_glue.c: make a function staticAdrian Bunk2006-09-26
| | | | | | | | | | | | | | | | Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Multiprobe sanitizerAlan Cox2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are numerous drivers that can use multithreaded probing but having some kind of global flag as the way to control this makes migration to threaded probing hard and since it enables it everywhere and is almost as likely to cause serious pain as holding a clog dance in a minefield. If we have a pci_driver multithread_probe flag to inherit you can turn it on for one driver at a time. From playing so far however I think we need a different model at the device layer which serializes until the called probe function says "ok you can start another one now". That would need some kind of flag and semaphore plus a helper function. Anyway in the absence of that this is a starting point to usefully play with this stuff Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: fix __must_check warningsGreg Kroah-Hartman2006-09-26
| | | | | | | | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI Hotplug: fix __must_check warningsGreg Kroah-Hartman2006-09-26
| | | | | | | | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * SHPCHP: fix __must_check warningsGreg Kroah-Hartman2006-09-26
| | | | | | | | | | | | Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI-Express AER implemetation: pcie_portdrv error handlerZhang, Yanmin2006-09-26
| | | | | | | | | | | | | | | | Patch 4 implements error handlers for pcie_portdrv. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI-Express AER implemetation: AER core and aerdriverZhang, Yanmin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI-Express AER implemetation: export pcie_port_bus_typeZhang, Yanmin2006-09-26
| | | | | | | | | | | | | | | | Patch 2 exports pcie_port_bus_type. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI-Express AER implemetation: aer howto documentZhang, Yanmin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI-Express AER (Advanced Error Reporting) provides more robust error reporting. The series of patches enable kernel support to AER. The initial patches were written by Tom Long Nguyen. I ported them to the kernel 2.6.18-rc3. Many thanks to Rajesh Shah and Narayanan Chandramouli for their great review comments and testing help. Patch 1 consists of the pciaer-howto.txt document. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCIE: check and return bus_register errorsRandy Dunlap2006-09-26
| | | | | | | | | | | | | | | | | | Have pcie_port_bus_register() notice and return errors. Mark it __must_check so that its caller(s) must check its return value. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capabilityBrice Goglin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce msi_ht_cap_enabled() to check the MSI capability in the Hypertransport configuration space. It is used in a generic quirk quirk_msi_ht_cap() to check whether MSI is enabled on hypertransport chipset, and a nVidia specific quirk quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to be checked. Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * MSI: Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HTBrice Goglin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | 0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be the subtype 0x80 that mpic_scan_ht_pic() uses. Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT. And by the way, use it in the ipath driver instead of defining its own HT_CAPABILITY_ID. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * MSI: Export the PCI_BUS_FLAGS_NO_MSI flag in sysfsBrice Goglin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Export the PCI_BUS_FLAGS_NO_MSI flag of a PCI bus in the sysfs files of its parent device and make it writable. Could be used to: * disable MSI on a device which has not been blacklisted yet * allow MSI when some setpci hacks enable MSI support (for instance on the ServerWorks HT2000 chipset where the MSI HT cap is disabled by default). Architecture where some bus have no parent chipset cannot use this strategy to change MSI support. If the chipset does not have a subordinate bus, its 'bus_msi' file is empty. Also document and warn about the possible danger of changing the flag. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * MSI: Factorize common code in pci_msi_supported()Brice Goglin2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | pci_enable_msi() and pci_enable_msix() use the same code to detect whether MSI might be enabled on this device. Factorize this code in pci_msi_supported(). And improve the documentation about the fact that only the root chipset must support MSI, but it is hard to find the root bus so we check all parent busses MSI flags. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * MSI: Cleanup existing MSI quirksBrice Goglin2006-09-26
| | | | | | | | | | | | | | | | | | | | Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * Resources: insert identical resources above existing resourcesMatthew Wilcox2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you have two resources which aree exactly the same size, insert_resource() currently inserts the new one below the existing one. This is wrong because there's no way to insert a resource of the same size above an existing one. I took this opportunity to rewrite the initial loop to be a for-loop instead of a goto-loop and fix the documentation. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | [MIPS] setup.c: use early_param() for early command line parsingFranck Bui-Huu2006-09-27
| | | | | | | | | | | | | | | | | | | | There's no point to rewrite some logic to parse command line to pass initrd parameters or to declare a user memory area. We could use instead parse_early_param() that does the same thing. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] setup.c: remove MAXMEM macroFranck Bui-Huu2006-09-27
| | | | | | | | | | | | | | It doesn't improve readability. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] setup.c: do not inline functionsFranck Bui-Huu2006-09-27
| | | | | | | | | | | | | | | | There's no point to inline any functions in setup.c. Let's GCC doing its job, it's good enough for that now. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] setup.c: remove useless includes.Franck Bui-Huu2006-09-27
| | | | | | | | | | Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] setup.c: move initrd code inside dedicated functionsFranck Bui-Huu2006-09-27
| | | | | | | | | | | | | | NUMA specific code could rely on them too. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] setup.c: cleanup bootmem_init()Franck Bui-Huu2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function although doing simple thing is hard to follow. It's mainly due to: - a lot of #ifdef - bad local names - redundant tests So this patch try to address these issues. It also do not use max_pfn global which is marked as an unused exported symbol. As a bonus side, it's now really easy to see what part of the code is for no-numa system. There's also no point to make this function inline. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] get_wchan(): remove uses of mfinfo[64]Franck Bui-Huu2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This array was used to 'cache' some frame info about scheduler functions to speed up get_wchan(). This array was 1Ko size and was only used when CONFIG_KALLSYMS was set but declared for all configs. Rather than make the array statement conditional, this patches removes this array and its uses. Indeed the common case doesn't seem to use this array and get_wchan() is not a critical path anyways. It results in a smaller bss and a smaller/cleaner code: text data bss dec hex filename 2543808 254148 139296 2937252 2cd1a4 vmlinux-new-get-wchan 2544080 254148 143392 2941620 2ce2b4 vmlinux~old Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] get_frame_info(): null function size means size is unknownFranck Bui-Huu2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds 2 sanity checks. The first one test that the start address of the function to analyze has been set by the caller. If not return an error since nothing usefull can be done without. The second one checks that the function's size has been set. A null size can happen if CONFIG_KALLSYMS is not set and it means that we don't know the size of the function to analyze. In this case, we make it equal to 128 instructions by default. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] unwind_stack(): return ra if an exception occured at the first ↵Franck Bui-Huu2006-09-27
| | | | | | | | | | | | | | instruction Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Enable tmpfs for anything that possibly runs a full distribution.Ralf Baechle2006-09-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.Ralf Baechle2006-09-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Have headers_install install <asm/cachectl.h> and <asm/sysmips.h>.Ralf Baechle2006-09-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] fstatat syscall namesRichard Sandiford2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS is the only port to call its fstatat()-related syscalls "__NR_fstatat". Now I can see why that might be seen as every other port being wrong, but I think for o32, it is at best confusing. __NR_fstat provides a plain (32-bit) stat while __NR_fstatat provides a 64-bit stat. Changing the name to __NR_fstatat64 would make things more explicit, match x86, and make the glibc port slightly easier. The current name is more appropriate for n32 and n64, but it would be appropriate for other 64-bit targets too, and those targets have chosen to call it __NR_newfstatat instead. Using the same name for MIPS would again be more consistent and make the glibc port slightly easier. I'm not wedded to this idea if the current names are preferred, but FWIW... Signed-off-by: Richard Sandiford <richard@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] The o32 fstatat syscall behaves differently on 32 and 64 bit kernelsRichard Sandiford2006-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While working on a glibc patch to support the fstatat() functions[1], I noticed that the o32 implementation behaves differently on 32-bit and 64-bit kernels; the former provides a stat64 while the latter provides a plain (o32) stat. I think the former is what's intended, as there is no separate fstatat64. It's also what x86 does. I think this is just a case of a compat too far. [1] I've seen Khem's patch, but I don't think it's right. Signed-off-by: Richard Sandiford <richard@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Remove EV96100 as previously announced.Ralf Baechle2006-09-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle2006-09-27
| | | | | | | | | | | | This is the unchanged part 2 of Chris' hazard cleanup. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Cleanup hazard handling.Ralf Baechle2006-09-27
| | | | | | | | | | | | Mostly based on patch by Chris Dearman and cleanups from Yoichi. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] IP27: Delete useless declaration of allocate_irqno().Ralf Baechle2006-09-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Fix USER_PTRS_PER_PGD for 64K page size.Peter Watkins2006-09-27
| | | | | | | | | | | | | | | | | | | | The code in pgtable-64.h assumes TASK_SIZE is always bigger than a first level PGDIR_SIZE. This is not the case for 64K pages, where task size is 40 bits (1TB) and a pgd entry can map 42 bits. This leads to USER_PTRS_PER_PGD being zero for 64K pages. Signed-off-by: Peter Watkins <treestem@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Add configuration variables for RM9xxx processorthomas@koeller.dyndns.org2006-09-27
| | | | | | | | | | | | | | | | | | This patch introduces a number of configuration variables. These allow to specify presence/absence of integrated peripherals found on the MIPS RM9xxx processor family, based on the particular processor model used. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Move excite_fpga.h to include/asm-mips/mach-excitethomas@koeller.dyndns.org2006-09-27
| | | | | | | | | | | | | | | | excite_fpga.h, like all platform headers, really belongs in the platform header directory. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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