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* OMAP3: clock: use autoidle clkops for all autoidle-controllable interface clocksPaul Walmsley2011-03-07
| | | | | | | | | | | Mark each interface clock with a corresponding CM_AUTOIDLE bit with a clkops that has the allow_idle/deny_idle function pointers populated. This allows the OMAP clock framework to enable and disable autoidle for these clocks. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2430: clock: use autoidle clkops for all autoidle-controllable interface ↵Paul Walmsley2011-03-07
| | | | | | | | | | | | | clocks Mark each interface clock with a corresponding CM_AUTOIDLE bit with a clkops that has the allow_idle/deny_idle function pointers populated. This allows the OMAP clock framework to enable and disable autoidle for these clocks. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2430/3xxx: clock: add modem clock autoidle supportPaul Walmsley2011-03-07
| | | | | | | | | | OMAP2430 and OMAP3xxx have modem autoidle bits that are actually attached to clocks with CM_FCLKEN bits; add the code and data to handle these. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2420: clock: use autoidle clkops for all autoidle-controllable interface ↵Paul Walmsley2011-03-07
| | | | | | | | | | | | | | clocks Mark each interface clock with a corresponding CM_AUTOIDLE bit with a clkops that has the allow_idle/deny_idle function pointers populated. This allows the OMAP clock framework to enable and disable autoidle for these clocks. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2420: clock: add sdrc_ickPaul Walmsley2011-03-07
| | | | | | | | | Add sdrc_ick to the OMAP2420 clock data so the clock code can control the CM_AUTOIDLE bit associated with this clock. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2+: clock: add interface clock type code with autoidle supportPaul Walmsley2011-03-07
| | | | | | | | | | | Add interface clock type code with autoidle enable/disable support. The clkops structures created in this file will be used for all OMAP2/3 interface clocks with autoidle support. They will enable the clock framework to control interface clock autoidle directly. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2+: clock: comment that osc_ck/osc_sys_ck should use clockfw autoidle ↵Paul Walmsley2011-03-07
| | | | | | | | | | | | control Place some comments in the OMAP oscillator clock control code to note that its autoidle mode should eventually be controlled via the new OMAP clockfw autoidle control interface. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2xxx: clock: add clockfw autoidle support for APLLsPaul Walmsley2011-03-07
| | | | | | | | | | | | | OMAP2xxx devices have two on-chip APLLs. These APLLs can automatically enter idle when not in use. Connect the APLL autoidle code to the clock code, so that the clock framework can handle this process. As part of this patch, remove the code in mach-omap2/pm24xx.c that previously handled APLL autoidle control. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2: clock: add DPLL autoidle supportPaul Walmsley2011-03-07
| | | | | | | | | | | | | | | Add the necessary code and data to allow the clock framework to enable and disable the OMAP2 DPLL autoidle state. This is so the direct register access can be moved out of the mach-omap2/pm24xx.c code, and other code that needs to control this (e.g., CPUIdle) can do so via an API. As part of this patch, remove the pm24xx.c code that formerly wrote directly to the autoidle bits. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* OMAP2+: clock: disable autoidle on all clocks during clock initPaul Walmsley2011-02-25
| | | | | | | | | | | | | | | | Disable autoidle on all clocks during clock framework initialization. (If CONFIG_PM is set, autoidle is re-enabled for all clocks later in the boot process.) The principle behind this patch, and some similar patches, is that the kernel should start with all power management features disabled. Later in the boot process, the PM code, if compiled in with CONFIG_PM, enables or re-enables power management features. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
* omap4: dpll: Enable auto gate control for all MX postdividersRajendra Nayak2011-02-25
| | | | | | | | | | Enable hardware gate control for all dpll MX and X2 postdividers. This requires the allow_idle/deny_idle functions to be populated for all clock nodes (mx/x2 post dividers) in clkops. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: DPLL: Add dpll api to control GATE_CTRLRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | | | | | On OMAP4, the dpll post divider outputs (MX outputs) along with clockout_x2 output provide a way to allow/deny hardware level autogating. Allowing autoidle would mean that the hw would autogate this clock when there is no dependency for it. Denying idle would mean that this clock output will be forced to stay enabled. Add dpll api's to read/allow/deny idle control for these dpll mx postdividers. NOTE: The gatectrl bit set to 0 allows gatectrl, and the bit set to 1 denies gatectrl. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: moved OMAP4-specific DPLL control code to mach-omap2/dpll44xx.c; added some documentation for CLOCK_CLKOUTX2] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2+: clock: autoidle as many clocks as possible if CONFIG_OMAP_RESET_CLOCKSPaul Walmsley2011-02-25
| | | | | | | | | | | | | | | | | | | | Attempt to enable autoidle for as many clocks as possible in the OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will enable autoidle for other clocks and the OMAP2 DPLL/APLLs. In the long run, we should probably get rid of CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it selects. Otherwise, the state of the clock tree won't match the hardware state - this could result in clocks being enabled or disabled unpredictably. Based on a patch by Rajendra Nayak <rnayak@ti.com> that did this in the pm34xx.c/pm44xx.c code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP3/4: DPLL: Add allow_idle/deny_idle support for all DPLL'sRajendra Nayak2011-02-25
| | | | | | | | | All OMAP3/4 dpll's support hardware level autogating. Populate allow_idle/deny_idle function pointers for all DPLL's in clkops. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clock: Add allow_idle/deny_idle support in clkopsRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | | | | | | On OMAP various clock nodes (dpll's, mx post dividers, interface clocks) support hardware level autogating which can be controlled from software. Support such functionality by adding two new function pointer allow_idle and deny_idle in the clkops structure. These function pointers can be populated for any clock node which supports hardware level autogating. Also add 2 new functions (omap_clk_enable_autoidle_all and omap_clk_disable_autoidle_all) which can be called from architecture specific PM core code, if hardware level autogating (for all supported clock nodes) is to be enabled or disabled. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: use spinlock rather than mutex due to race; renamed functions; functions now return ints] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap3: dpll: Populate clkops for dpll1_ckRajendra Nayak2011-02-25
| | | | | | | | | | | DPLL1 on omap3 is very similar to the rest of the non-core dpll's. Hence populate clkops_omap3_noncore_dpll_ops as the clkops for it, instead of the currently populated clkops_null. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* omap: clock: Check for enable/disable ops supportRajendra Nayak2011-02-25
| | | | | | | | Check if enable/disable operations are supported for a given clock node before attempting to call them. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clockdomain: Arch specific funcs for clkdm_clk_enable/disableRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | Define the following architecture specific funtions for omap2/3/4 .clkdm_clk_enable .clkdm_clk_disable Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_k_enable as clkdm_clk_enable and omap2_clkdm_clk_disable as clkdm_clk_disable.a Remove unused functions (_enable/_disable_hwsup) and unsed headers from clockdomain.c file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clockdomain: Arch specific funcs for hwsup control of clkdmRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | Define the following architecture specific funtions for omap2/3/4 .clkdm_allow_idle .clkdm_deny_idle Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and omap2_clkdm_deny_idle as clkdm_deny_idle. Make the _clkdm_add_autodeps and _clkdm_del_autodeps as non-static so they can be accessed from OMAP2/3 platform specific code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clockdomain: Arch specific funcs for sleep/wakeup of clkdmRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | | | Define the following architecture specific funtions for omap2/3/4 .clkdm_sleep .clkdm_wakeup Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_wakeup as clkdm_wakeup and omap2_clkdm_sleep as clkdm_sleep. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: fixed omap3_clkdm_clear_all_sleepdeps() and omap2_clkdm_clear_all_wkdeps() to test against the correct loop termination condition; thanks to Kevin Hilman for finding and helping fix] Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clockdomain: Arch specific funcs to handle depsRajendra Nayak2011-02-25
| | | | | | | | | | | | | | | | | | | | | | | Define the following architecture specific funtions for omap2/3 .clkdm_add_wkdep .clkdm_del_wkdep .clkdm_read_wkdep .clkdm_clear_all_wkdeps .clkdm_add_sleepdep .clkdm_del_sleepdep .clkdm_read_sleepdep .clkdm_clear_all_sleepdeps Convert the platform-independent framework to call these functions. With this also move the clkdm lookups for all wkdep_srcs and sleepdep_srcs at clkdm_init. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: fixed loop termination conditions in omap*_clkdm_clear_all_*(); thanks to Kevin Hilman for finding and helping fix those bugs; also avoid re-resolving clockdomains during init; abstracted out clkdm_dep walk] Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: clockdomain: Infrastructure to put arch specific codeRajendra Nayak2011-02-25
| | | | | | | | | | | | Put infrastructure in place, so arch specific func pointers can be hooked up to the platform-independent part of the framework. This is in preparation of splitting the clockdomain framework into platform-independent part (for all omaps) and platform-specific parts. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: powerdomain: remove unused func declarationRajendra Nayak2011-02-25
| | | | | | | | Trivial fix to remove the unused function declaration from the powerdomain header. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3: hwmod data: add DSS DISPC RFBI DSI VENCSenthilvadivu Guruswamy2011-02-23
| | | | | | | | | | | | | | | | | | | Hwmod needs database of all IPs in a system. This patch generates the hwmod database for Display Sub System applicable for OMAP3430 and OMAP36xx. DSS is also considered as an IP as DISPC, RFBI and named as dss_core. For all the IP modules in DSS, same clock is needed for enabling. Hwmod sees DSS IPs as independent IPs, so same clock has to be repeated for .main_clk in each IP. This patch defines separate hwmod databases for OMAP3430ES1 and (OMAP3430ES2 and OMAP36xx) as OMAP3430ES1 does not have IDLEST bit to poll on for dss IP, and also the firewall regions are different between 3430es1 and later. Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2430: hwmod data: add DSS DISPC RFBI VENCSenthilvadivu Guruswamy2011-02-23
| | | | | | | | | | | | | Hwmod needs database of all IPs in a system. This patch generates the hwmod database for OMAP2430 Display Sub System. Since DSS is also considered as an IP as DISPC, RFBI, name it as dss_core. Acked-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2420: hwmod data: add DSS DISPC RFBI VENCSenthilvadivu Guruswamy2011-02-23
| | | | | | | | | | | | | Hwmod needs database of all IPs in a system. This patch generates the hwmod database for OMAP2420 Display Sub System,. Since DSS is also considered as an IP as DISPC, RFBI, name it as dss_core. Acked-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* Merge branch 'for-tony' of git://gitorious.org/usb/usb into omap-for-linusTony Lindgren2011-02-22
|\ | | | | | | | | | | Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
| * OMAP2+: musb: hwmod adaptation for musb registrationHema HK2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Using omap_device_build API instead of platform_device_register for OMAP2430,OMAP3xxx, OMAP4430 and AM35x musb device registration. The device specific resources defined in centralized database will be used. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * AM35xx: hwmod data: Add USBOTGHema HK2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | AM35xx hwmod data structures are populated for USBOTG with base address, L3 and L4 interface clocks and IRQ. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * OMAP3xxx: hwmod data: Add USBOTGHema HK2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP3 hwmod data structures are populated for USBOTG with base address, L3 and L4 interface clocks, IRQs and sysconfig register details. This is applicable for OMAP3430 amd OMAP3630. As per OMAP USBOTG specification, need to configure the USBOTG to smart idle/standby or no idle/standby during data transfer and force idle/standby when not in use to support retention and offmode. By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags, framework will take care of configuring to no idle/standby when module is enabled and force idle/standby when idled. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * OMAP2430: hwmod data: Add USBOTGHema HK2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2430 hwmod data structures are populated with base address, L3 and L4 interface clocks, IRQs and sysconfig register details. As per OMAP USBOTG specification, need to configure the USBOTG to smart idle/standby or no idle/standby during data transfer and force idle/standby when not in use to support retention and off-mode. By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags, framework will take care of configuring to no idle/standby when module is enabled and force idle/standby when suspended. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap4: 4430sdp: drop ehci supportAnand Gadiyar2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most revisions of the OMAP4 Blaze/SDP platform do not have the EHCI signals routed by default. The pads are routed for the alternate HSI functionality instead, and explicit board modifications are needed to route the signals to the USB PHY on the board. Also, turning on the PHY connected to the EHCI port causes a board reboot during bootup due to an unintended short on the rails - this affects many initial revisions of the board, and needs a minor board mod to fix (or as a workaround, one should not attempt to power on the USB PHY). Given that these boards need explicit board mods to even get EHCI working (separate from the accidental short above), we should not attempt to enable EHCI by default. So drop the EHCI support from the board files for the Blaze/SDP platforms. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Keshava Munegowda <keshava_mgowda@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap4: usb: explicitly configure MUSB padsAnand Gadiyar2011-02-17
| | | | | | | | | | | | | | | | | | | | | | Use the mux framework APIs to explicitly configure the MUSB pads. The MUSB controller in OMAP4 can use either the old ULPI interface, or the new internal PHY. Configure the pads accordingly. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: musb: AM35x: moving internal phy functions out of usb_musb.c fileHema HK2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | Moved all the board specific internal PHY functions out of usb_musb.c file as this file is shared between the OMAP2+ and AM35xx platforms. There exists a file which has the functions specific to internal PHY used for OMAP4 platform. Moved all phy specific functions to this file and passing these functions through board data in the board file. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | OMAP4: hwmod data: Prevent timer1 to be reset and idle during initBenoit Cousson2011-02-22
| | | | | | | | | | | | | | | | | | | | | | | | Since the timer1 is now started before the hwmod_init, we cannot reset it and idle it anymore. Add the appropriate flags to prevent the hwmod framework to do that. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP4: hwmod data: Add rev and dev_attr fields in McSPIBenoit Cousson2011-02-21
| | | | | | | | | | | | | | | | | | | | | | - Add a rev attribute to identify various McSPI IP version. - Add a dev_attr structure to provide the number of chipselect supported by the instance. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branches 'devel-hwspinlock' and 'devel-mcspi' into omap-for-linusTony Lindgren2011-02-17
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| * | OMAP: runtime: McSPI driver runtime conversionGovindraj.R2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | McSPI runtime conversion. Changes involves: 1) remove clock framework apis to use runtime framework apis. 2) context restore from runtime resume which is a callback for get_sync. 3) Remove SYSCONFIG(sysc) register handling (a) Remove context save and restore of sysc reg and remove soft reset done from sysc reg as this will be done with hwmod framework. (b) Also cleanup sysc reg bit macros. 4) Rename the omap2_mcspi_reset function to omap2_mcspi_master_setup function as with hwmod changes soft reset will be done in hwmod framework itself and use the return value from clock enable function to return for failure scenarios. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Partha Basak <p-basak2@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP: devices: Modify McSPI device to adapt to hwmod frameworkCharulatha V2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleans up all base address definitions for omap_mcspi and adapts the device registration and driver to hwmod framework. Changes involves: 1) Removing all base address macro defines. 2) Using omap-device layer to register device and utilizing data from hwmod data file for base address, dma channel number, Irq_number, device attribute(number of chipselect). 3) Appending base address with pdata reg_offset for omap4 boards. For omap4 all regs used in driver deviate with reg_offset_macros defined with an value of 0x100. So pass this offset through pdata and append the same to base address retrieved from hwmod data file and we are not mapping *_HL_* regs which are not used in driver. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Partha Basak <p-basak2@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP3: hwmod data: Add McSPICharulatha V2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update omap3 hwmod data file with McSPI info. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP2430: hwmod data: Add McSPICharulatha V2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the 2430 hwmod data file with McSPI info. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP2420: hwmod data: Add McSPICharulatha V2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the omap2420 hwmod data with the McSPI info. Add a device attribute structure which will be used for passing number of chipselects from hwmod data. Add revision macros to be passed from rev field from hwmod. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | omap: add hwspinlock deviceSimon Que2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Build and register an hwspinlock platform device. Although only OMAP4 supports the hardware spinlock module (for now), it is still safe to run this initcall on all omaps, because hwmod lookup will simply fail on hwspinlock-less platforms. Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | drivers: hwspinlock: add OMAP implementationSimon Que2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add hwspinlock support for the OMAP4 Hardware Spinlock device. The Hardware Spinlock device on OMAP4 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP). [ohad@wizery.com: adapt to hwspinlock framework, tidy up] Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Krishnamoorthy, Balaji T <balajitk@ti.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | drivers: hwspinlock: add frameworkOhad Ben-Cohen2011-02-17
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a platform-independent hwspinlock framework. Hardware spinlock devices are needed, e.g., in order to access data that is shared between remote processors, that otherwise have no alternative mechanism to accomplish synchronization and mutual exclusion operations. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'for_2.6.39/omap4_hwmod_data' of ↵Tony Lindgren2011-02-17
|\ \ | | | | | | | | | git://gitorious.org/omap-pm/linux into omap-for-linus
| * | OMAP4: hwmod data: Add USBOTGBenoit Cousson2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 hwmod data structures are populated with base address, L3 and L4 interface clocks, IRQs and sysconfig register details. As per OMAP USBOTG specification, need to configure the USBOTG to smart idle/standby or no idle/standby during data transfer and force idle/standby when not in use to support retention and offmode. By setting HWMOD_SWSUP_SIDLE and HWMOD_SWSUP_MSTANDBY flags,framework will take care of configuring to no idle/standby when module is enabled and force idle/standby when idled. Signed-off-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com> [b-cousson@ti.com: Fix position, opt_clk, and author]
| * | OMAP4: hwmod data: Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPUBenoit Cousson2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add more hwmod structures but keep them commented out for the moment until the driver adaptation to hwmod / omap_device is done. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com>
| * | OMAP4: hwmod data: Add McBSPBenoit Cousson2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mcbsp data including a revision member in hwmod_class in order to provide mcbsp revision information in different omap. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Charulatha V <charu@ti.com> [b-cousson@ti.com: Remove the mcbsp4 memory name, re-order properly the structures]
| * | OMAP4: hwmod data: Add DMICBenoit Cousson2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add HWMOD entries for the OMAP DMIC. The HWMOD entires define the system resource requirements for the driver such as DMA addresses, channels, and IRQ's. Placing this information in the HWMOD database allows for more generic drivers to be written and having the specific implementation details defined in HWMOD. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: David Lambert <dlambert@ti.com> [b-cousson@ti.com: Change the wrong hwmod name, add missing flag and re-order structures]
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 18:27:49 -0500