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* [POWERPC] Add of_find_matching_node() helper functionGrant Likely2008-01-16
| | | | | | | | | | | | | | Similar to of_find_compatible_node(), of_find_matching_node() and for_each_matching_node() allow you to iterate over the device tree looking for specific nodes, except that they take of_device_id tables instead of strings. This also moves of_match_node() from driver/of/device.c to driver/of/base.c to colocate it with the of_find_matching_node which depends on it. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Kill sparse warning in HPTE_V_COMPARE()Geert Uytterhoeven2008-01-16
| | | | | | | | Fixes sparse warning: constant 0xffffffffffffff80 is so big it is unsigned long Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'virtex-for-2.6.25' of ↵Josh Boyer2008-01-11
|\ | | | | | | git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.25
| * [POWERPC] Xilinx uartlite: Section type fixupsStephen Neuendorffer2008-01-09
| | | | | | | | | | | | | | | | | | All the __devexit functions are now appropriately tagged. This fixes some ppc link warnings. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] Xilinx: updated device tree compatibility to match uboot bsp ↵Stephen Neuendorffer2008-01-09
| | | | | | | | | | | | | | | | | | generator. Missed this one in the boot loader before. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] Xilinx: Update booting-without-of.Stephen Neuendorffer2008-01-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This now better describes what the UBoot device tree generator actually does. In particular: 1) Nodes have a label derived from the device name, and a node name derived from a generic version of the device type, e.g. 'ethernet', 'serial', etc. 2) Usage of compound nodes (representing more than one device in the same IP) which actually works. This requires having a valid compatible node, and all the other things that a bus normally has. I've chosen 'xlnx,compound' as the bus name to describe these compound nodes. In addition, I've clarified some of the language relating to how mhs nodes should be represent in the device tree. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] Xilinx: Add correct compatible list for device tree bus bindings.Stephen Neuendorffer2008-01-09
| | | | | | | | | | | | | | | | | | Includes both flavors of plb, opb, dcr, and a pseudo 'compound' bus for representing compound peripherals containing more than one logical device. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] Xilinx: update compatible list for interrupt controllerStephen Neuendorffer2008-01-09
| | | | | | | | | | | | | | These values now match what is generated by the uboot BSP generator. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | [POWERPC] 4xx: PCIe: Increase max busses per port to 64Stefan Roese2008-01-08
| | | | | | | | | | | | | | | | | | | | | | Because of how big mapping the config space is (1M per bus), we limit how many busses we support for now. In the long run, we could replace that with something akin to kmap_atomic instead. This patch changes the limit from currently 16 to 64. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapperMatthias Fuchs2008-01-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for 405GPr processors with optional new mode strapping. ibm405gp_fixup_clocks() can now be used for 405GP and 405GPr CPUs. This is in preparation of porting the cpci405 platform support from arch/ppc to arch/powerpc. This patch also adds ibm405ep_fixup_clocks() to support 405EP CPUs from the boot wrapper. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: enable built-in networking for Sequoia defconfigHollis Blanchard2008-01-08
| | | | | | | | | | | | | | | | Enable EMAC driver for Sequoia (and while we're in there, disable Macintosh drivers for Sequoia and Bamboo). Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add EMAC support to Kilauea defconfigStefan Roese2008-01-04
| | | | | | | | | | | | | | | | Somehow the EMAC support was dropped (or never really added) to the Kilauea defconfig file. This patch finally adds EMAC support. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: typo in calling machine_device_initcall() for Sequoia boardGrant Likely2008-01-02
|/ | | | | | | Fix an obvious typo. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* Merge branch 'for-2.6.25' of ↵Paul Mackerras2007-12-30
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/olof/pasemi
| * [POWERPC] Enable CONFIG_PCI_MSI and CONFIG_MD in pasemi_defconfigOlof Johansson2007-12-28
| | | | | | | | | | | | | | Enable MSI now that we have an implementation, and enable CONFIG_MD and the raid options by default as well. Signed-off-by: Olof Johansson <olof@lixom.net>
| * [POWERPC] pasemi: Distribute interrupts evenly across cpusOlof Johansson2007-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the OpenPIC on PWRficient will bias to one core (since that will improve changes of the other core being able to stay idle/powered down). However, this conflicts with most irq load balancing schemes, since setting an interrupt to be delivered to either core doesn't really result in the load being shared. It also doesn't work well with the soft irq disable feature of PPC, since EE will stay on until the first interrupt is taken while soft disabled. Set the gconf0 config bit that enables even distribution of interrupts among the two cores. Signed-off-by: Olof Johansson <olof@lixom.net>
| * [POWERPC] pasemi: Implement NMI supportOlof Johansson2007-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PWRficient-based boards have a NMI button that's wired up to a GPIO as interrupt source. By configuring the openpic accordingly, these get delivered as a machine check with high priority, instead of as an external interrupt. The device tree contains a property "nmi-source" in the openpic node for these systems, and it's the (hwirq) source for the input. Also, for these interrupts, the IACK is read from another register than the regular (MCACK instead), but they are EOI'd as usual. So implement said function for the mpic driver. Finally, move a couple of external function defines to include/ instead of local under sysdev. Being able to mask/unmask and eoi directly saves us from setting up a dummy irq handler that will never be called. Signed-off-by: Olof Johansson <olof@lixom.net>
* | Revert "[POWERPC] Disable PCI IO/Mem on a device when resources can't be ↵Paul Mackerras2007-12-30
| | | | | | | | | | | | | | | | | | | | | | allocated" This reverts commit 553aa7659bc0e188348f64e978343ed984eb6e56 at Ben H's request, because it confused IORESOURCE_* flags with command register bits. Requested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] 4xx: Update defconfigsJosh Boyer2007-12-24
| | | | | | | | | | | | Update the 4xx board defconfigs Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Minor coding style cleanups for 4xx bootwrapperJosh Boyer2007-12-24
| | | | | | | | | | | | Remove some unneeded braces and make a busy loop more obvious. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Use machine_device_initcall for bus probeJosh Boyer2007-12-24
| | | | | | | | | | | | | | | | Some machine_xx_initcall macros were recently added that check for the machine type before calling the function. This converts the 4xx platforms to use those for bus probing. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] Remove unneeded variable declarations from mpc837x_mdsJosh Boyer2007-12-24
| | | | | | | | | | | | | | Remove the declarations for isa_io_base and isa_mem_base as they are declared in pci-common.c now. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] Conditionally compile e200 and e500 platforms in cputableJosh Boyer2007-12-24
| | | | | | | | | | | | | | | | The e200 and e500 platforms are separated in various parts of the kernel with ifdefs, most notably reg_booke.h and traps.c. The new machine_check rework requires them to be similarly separated in cputable.c to avoid compile errors. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Mark of_bus structures as __initdataJosh Boyer2007-12-24
| | | | | | | | | | | | | | Mark the of_device_id structures used to probe the various busses on 4xx as __initdata. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Update Kilauea, Rainier, and Walnut defconfigsJosh Boyer2007-12-23
| | | | | | | | | | | | | | Enable PCI support for these eval boards among other things. Also selects PCI for Rainier in the Kconfig file. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Makalu defconfigStefan Roese2007-12-23
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Makalu dtsStefan Roese2007-12-23
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add AMCC Makalu board support to platforms/40xStefan Roese2007-12-23
| | | | | | | | | | | | | | This patch adds basic support for the AMCC Makalu board to arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Change Kilauea PCIe bus ranges in dts fileStefan Roese2007-12-23
| | | | | | | | | | | | | | | | | | | | Currently we have some limitations in the 4xx PCIe driver and can't support all possible PCIe busses. But the current limits in the dts file are quite low (only 16 busses per RC). This patch increases the number to 64 per RC. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add aliases node to 4xx dts filesStefan Roese2007-12-23
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add PCI entry to 440GRx Rainier DTS.Valentine Barshak2007-12-23
| | | | | | | | | | | | | | This adds PCI entry to PowerPC 440GRx Rainier DTS. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: update 440EP(x)/440GR(x) identical PVR issue workaroundValentine Barshak2007-12-23
| | | | | | | | | | | | | | | | | | | | Renaming the CPU nodes with generic names put the CPU model in the "model" property and thus broke the PowerPC 440EP(x)/440GR(x) identical PVR workaround. The updates it to use the new model property for CPU identification. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibilityJosh Boyer2007-12-23
| | | | | | | | | | | | | | | | | | | | Recent DTC versions disallow certain special characters in full paths without being quoted with {}. That however breaks compatibility with older DTC versions. Work around this by renaming the CPU nodes for the 4xx files to a generic node name, and specify the processor type in the model property of the CPU node. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Set ibpre for 405EX in 4xx PCIe driverStefan Roese2007-12-23
| | | | | | | | | | | | | | | | This patch sets the ibpre flag (Inbound Presence) for the 405EX in the 4xx PCIe driver. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add Kilauea PCIe support to dts and KconfigStefan Roese2007-12-23
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Change Kilauea dts to support new EMAC device tree propertiesStefan Roese2007-12-23
| | | | | | | | | | | | | | | | | | | | | | The recent changes from Benjamin Herrenschmidt to the ibm_newemac now make it possible to support other 4xx variants by just defining the correct properties in the device tree. In this case of the 405EX we need to define "has-mdio" in the RGMII node and "has-inverted-stacr-oc" and "has-new-stacr-staopc" in the EMAC node same as on the 440EPx. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add 405EX CPU type needed for EMAC support on KilaueaStefan Roese2007-12-23
| | | | | | | | | | | | | | | | For EMAC support, 405EX needs to be defined to enable the corresponding EMAC features (IBM_NEW_EMAC_EMAC4, etc.). Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUGStefan Roese2007-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now TLB entry 0 ist used as UART0 mapping for the early debug output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many TLB's get used upon Linux bootup (e.g. while PCIe scanning behind bridges and/or switches on 440SPe platforms). This will overwrite the TLB 0 entry and further debug output's may crash/hang the system. This patch moves the early debug UART0 TLB entry from 0 to 62 as done in arch/powerpc. This way it is in the "pinned" area and will not get overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the newer code from arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: libfdt and pci fixes for RainierJosh Boyer2007-12-23
| | | | | | | | | | | | | | Update the Rainier wrapper for the libfdt merge and add the pci flags to the platform file. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Include missing headerJosh Boyer2007-12-23
| | | | | | | | | | | | | | A small error caused a header file to be removed making sequoia support no longer compile. Fix it. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 44x: Sequoia and Rainier updates for 2.6.25Valentine Barshak2007-12-23
| | | | | | | | | | | | | | PowerPC 440Epx/GRx Sequoia/Rainier updates for 2.6.25 Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Fix 440grx setup function to call 440A fixupJosh Boyer2007-12-23
| | | | | | | | | | | | | | The mechanism to do the setup for 440A cores changed recently. This fixes the 440grx setup function to call __fixup_440A_mcheck. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Add PCI entry to 440EPx Sequoia DTS.Valentine Barshak2007-12-23
| | | | | | | | | | | | | | This adds PCI entry to PowerPC 440EPx Sequoia DTS. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: Correct 440GRx machine_check callbackValentine Barshak2007-12-23
| | | | | | | | | | | | | | Correct the PowerPC 440GRx machine check callback. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: rework UIC cascade irq handlingValentine Barshak2007-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a UIC cascade handler rework to use set_irq_chained_handler() for cascade, just like othe ppc platforms do. With current implementation we have additional redirection for irq handler and we call generic_handle_irq twice (once for the primary uic and the other time for handling cascade interrupt). This causes Ingo's realtime support patch to stop working on 4xx. Not sure of any other possible problems though, but with set_irq_chained_handler() we can abolish "struct irqaction cascade" from the chip descriptor and call generic_handle_irq() once, directly for cascade irq. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: make UIC use generic level irq handlerValentine Barshak2007-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes PowerPC 4xx UIC use generic level irq handler instead of a custom handle_uic_irq() function. We ack only edge irqs in mask_ack callback, since acking a level irq on UIC has no effect if the interrupt is still asserted by the device, even if the interrupt is already masked. So, to really de-assert the interrupt we need to de-assert the external source first *and* ack it on UIC then. The handle_level_irq() function masks and ack's the interrupt with mask_ack callback prior to calling the actual ISR and unmasks it at the end. So, to use it with UIC interrupts we need to ack level irqs in the unmask callback instead, after the ISR has de-asserted the external interrupt source. Even if we ack the interrupt that we didn't handle (unmask/ack it at the end of the handler, while next irq is already pending) it will not de-assert the irq, untill we de-assert its exteral source. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: 440GRx Rainier default configValentine Barshak2007-12-23
| | | | | | | | | | | | | | PowerPC 440GRx Rainier default config. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: 440GRx Rainier board support.Valentine Barshak2007-12-23
| | | | | | | | | | | | | | PowerPC 440GRx Rainier board support. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: 440GRx Rainier DTS.Valentine Barshak2007-12-23
| | | | | | | | | | | | | | PowerPC 440GRx Rainier DTS. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 4xx: 440GRx Rainier bootwrapper.Valentine Barshak2007-12-23
| | | | | | | | | | | | | | Bootwrapper code for PowerPC 440GRx Rainier board. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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