diff options
Diffstat (limited to 'sound/sparc')
-rw-r--r-- | sound/sparc/dbri.c | 390 |
1 files changed, 208 insertions, 182 deletions
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c index e07085a7cfc3..bfc3930a6465 100644 --- a/sound/sparc/dbri.c +++ b/sound/sparc/dbri.c | |||
@@ -8,18 +8,18 @@ | |||
8 | * Copyright (C) 1997 Rudolf Koenig (rfkoenig@immd4.informatik.uni-erlangen.de) | 8 | * Copyright (C) 1997 Rudolf Koenig (rfkoenig@immd4.informatik.uni-erlangen.de) |
9 | * Copyright (C) 1998, 1999 Brent Baccala (baccala@freesoft.org) | 9 | * Copyright (C) 1998, 1999 Brent Baccala (baccala@freesoft.org) |
10 | * | 10 | * |
11 | * This is the lowlevel driver for the DBRI & MMCODEC duo used for ISDN & AUDIO | 11 | * This is the low level driver for the DBRI & MMCODEC duo used for ISDN & AUDIO |
12 | * on Sun SPARCstation 10, 20, LX and Voyager models. | 12 | * on Sun SPARCStation 10, 20, LX and Voyager models. |
13 | * | 13 | * |
14 | * - DBRI: AT&T T5900FX Dual Basic Rates ISDN Interface. It is a 32 channel | 14 | * - DBRI: AT&T T5900FX Dual Basic Rates ISDN Interface. It is a 32 channel |
15 | * data time multiplexer with ISDN support (aka T7259) | 15 | * data time multiplexer with ISDN support (aka T7259) |
16 | * Interfaces: SBus,ISDN NT & TE, CHI, 4 bits parallel. | 16 | * Interfaces: SBus,ISDN NT & TE, CHI, 4 bits parallel. |
17 | * CHI: (spelled ki) Concentration Highway Interface (AT&T or Intel bus ?). | 17 | * CHI: (spelled ki) Concentration Highway Interface (AT&T or Intel bus ?). |
18 | * Documentation: | 18 | * Documentation: |
19 | * - "STP 4000SBus Dual Basic Rate ISDN (DBRI) Tranceiver" from | 19 | * - "STP 4000SBus Dual Basic Rate ISDN (DBRI) Transceiver" from |
20 | * Sparc Technology Business (courtesy of Sun Support) | 20 | * Sparc Technology Business (courtesy of Sun Support) |
21 | * - Data sheet of the T7903, a newer but very similar ISA bus equivalent | 21 | * - Data sheet of the T7903, a newer but very similar ISA bus equivalent |
22 | * available from the Lucent (formarly AT&T microelectronics) home | 22 | * available from the Lucent (formerly AT&T microelectronics) home |
23 | * page. | 23 | * page. |
24 | * - http://www.freesoft.org/Linux/DBRI/ | 24 | * - http://www.freesoft.org/Linux/DBRI/ |
25 | * - MMCODEC: Crystal Semiconductor CS4215 16 bit Multimedia Audio Codec | 25 | * - MMCODEC: Crystal Semiconductor CS4215 16 bit Multimedia Audio Codec |
@@ -27,21 +27,21 @@ | |||
27 | * Documentation: from the Crystal Semiconductor home page. | 27 | * Documentation: from the Crystal Semiconductor home page. |
28 | * | 28 | * |
29 | * The DBRI is a 32 pipe machine, each pipe can transfer some bits between | 29 | * The DBRI is a 32 pipe machine, each pipe can transfer some bits between |
30 | * memory and a serial device (long pipes, nr 0-15) or between two serial | 30 | * memory and a serial device (long pipes, no. 0-15) or between two serial |
31 | * devices (short pipes, nr 16-31), or simply send a fixed data to a serial | 31 | * devices (short pipes, no. 16-31), or simply send a fixed data to a serial |
32 | * device (short pipes). | 32 | * device (short pipes). |
33 | * A timeslot defines the bit-offset and nr of bits read from a serial device. | 33 | * A timeslot defines the bit-offset and no. of bits read from a serial device. |
34 | * The timeslots are linked to 6 circular lists, one for each direction for | 34 | * The timeslots are linked to 6 circular lists, one for each direction for |
35 | * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes | 35 | * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes |
36 | * (the second one is a monitor/tee pipe, valid only for serial input). | 36 | * (the second one is a monitor/tee pipe, valid only for serial input). |
37 | * | 37 | * |
38 | * The mmcodec is connected via the CHI bus and needs the data & some | 38 | * The mmcodec is connected via the CHI bus and needs the data & some |
39 | * parameters (volume, output selection) timemultiplexed in 8 byte | 39 | * parameters (volume, output selection) time multiplexed in 8 byte |
40 | * chunks. It also has a control mode, which serves for audio format setting. | 40 | * chunks. It also has a control mode, which serves for audio format setting. |
41 | * | 41 | * |
42 | * Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on | 42 | * Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on |
43 | * the same CHI bus, so I thought perhaps it is possible to use the onboard | 43 | * the same CHI bus, so I thought perhaps it is possible to use the on-board |
44 | * & the speakerbox codec simultanously, giving 2 (not very independent :-) | 44 | * & the speakerbox codec simultaneously, giving 2 (not very independent :-) |
45 | * audio devices. But the SUN HW group decided against it, at least on my | 45 | * audio devices. But the SUN HW group decided against it, at least on my |
46 | * LX the speakerbox connector has at least 1 pin missing and 1 wrongly | 46 | * LX the speakerbox connector has at least 1 pin missing and 1 wrongly |
47 | * connected. | 47 | * connected. |
@@ -56,6 +56,8 @@ | |||
56 | #include <sound/driver.h> | 56 | #include <sound/driver.h> |
57 | #include <linux/interrupt.h> | 57 | #include <linux/interrupt.h> |
58 | #include <linux/delay.h> | 58 | #include <linux/delay.h> |
59 | #include <linux/irq.h> | ||
60 | #include <linux/io.h> | ||
59 | 61 | ||
60 | #include <sound/core.h> | 62 | #include <sound/core.h> |
61 | #include <sound/pcm.h> | 63 | #include <sound/pcm.h> |
@@ -64,8 +66,6 @@ | |||
64 | #include <sound/control.h> | 66 | #include <sound/control.h> |
65 | #include <sound/initval.h> | 67 | #include <sound/initval.h> |
66 | 68 | ||
67 | #include <asm/irq.h> | ||
68 | #include <asm/io.h> | ||
69 | #include <asm/sbus.h> | 69 | #include <asm/sbus.h> |
70 | #include <asm/atomic.h> | 70 | #include <asm/atomic.h> |
71 | 71 | ||
@@ -76,7 +76,8 @@ MODULE_SUPPORTED_DEVICE("{{Sun,DBRI}}"); | |||
76 | 76 | ||
77 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | 77 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
78 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | 78 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ |
79 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | 79 | /* Enable this card */ |
80 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | ||
80 | 81 | ||
81 | module_param_array(index, int, NULL, 0444); | 82 | module_param_array(index, int, NULL, 0444); |
82 | MODULE_PARM_DESC(index, "Index value for Sun DBRI soundcard."); | 83 | MODULE_PARM_DESC(index, "Index value for Sun DBRI soundcard."); |
@@ -104,7 +105,7 @@ static char *cmds[] = { | |||
104 | "SSP", "CHI", "NT", "TE", "CDEC", "TEST", "CDM", "RESRV" | 105 | "SSP", "CHI", "NT", "TE", "CDEC", "TEST", "CDM", "RESRV" |
105 | }; | 106 | }; |
106 | 107 | ||
107 | #define dprintk(a, x...) if(dbri_debug & a) printk(KERN_DEBUG x) | 108 | #define dprintk(a, x...) if (dbri_debug & a) printk(KERN_DEBUG x) |
108 | 109 | ||
109 | #else | 110 | #else |
110 | #define dprintk(a, x...) do { } while (0) | 111 | #define dprintk(a, x...) do { } while (0) |
@@ -131,7 +132,7 @@ struct cs4215 { | |||
131 | }; | 132 | }; |
132 | 133 | ||
133 | /* | 134 | /* |
134 | * Control mode first | 135 | * Control mode first |
135 | */ | 136 | */ |
136 | 137 | ||
137 | /* Time Slot 1, Status register */ | 138 | /* Time Slot 1, Status register */ |
@@ -219,7 +220,7 @@ static struct { | |||
219 | /* Time Slot 7, Input Setting */ | 220 | /* Time Slot 7, Input Setting */ |
220 | #define CS4215_LG(v) v /* Left Gain Setting 0xf: 22.5 dB */ | 221 | #define CS4215_LG(v) v /* Left Gain Setting 0xf: 22.5 dB */ |
221 | #define CS4215_IS (1<<4) /* Input Select: 1=Microphone, 0=Line */ | 222 | #define CS4215_IS (1<<4) /* Input Select: 1=Microphone, 0=Line */ |
222 | #define CS4215_OVR (1<<5) /* 1: Overrange condition occurred */ | 223 | #define CS4215_OVR (1<<5) /* 1: Over range condition occurred */ |
223 | #define CS4215_PIO0 (1<<6) /* Parallel I/O 0 */ | 224 | #define CS4215_PIO0 (1<<6) /* Parallel I/O 0 */ |
224 | #define CS4215_PIO1 (1<<7) | 225 | #define CS4215_PIO1 (1<<7) |
225 | 226 | ||
@@ -285,7 +286,7 @@ struct dbri_pipe { | |||
285 | /* Per stream (playback or record) information */ | 286 | /* Per stream (playback or record) information */ |
286 | struct dbri_streaminfo { | 287 | struct dbri_streaminfo { |
287 | struct snd_pcm_substream *substream; | 288 | struct snd_pcm_substream *substream; |
288 | u32 dvma_buffer; /* Device view of Alsa DMA buffer */ | 289 | u32 dvma_buffer; /* Device view of ALSA DMA buffer */ |
289 | int size; /* Size of DMA buffer */ | 290 | int size; /* Size of DMA buffer */ |
290 | size_t offset; /* offset in user buffer */ | 291 | size_t offset; /* offset in user buffer */ |
291 | int pipe; /* Data pipe used */ | 292 | int pipe; /* Data pipe used */ |
@@ -341,11 +342,11 @@ struct snd_dbri { | |||
341 | /* DBRI Reg1 - Mode and Interrupt Register - defines. (Page 18) */ | 342 | /* DBRI Reg1 - Mode and Interrupt Register - defines. (Page 18) */ |
342 | #define D_LITTLE_END (1<<8) /* Byte Order */ | 343 | #define D_LITTLE_END (1<<8) /* Byte Order */ |
343 | #define D_BIG_END (0<<8) /* Byte Order */ | 344 | #define D_BIG_END (0<<8) /* Byte Order */ |
344 | #define D_MRR (1<<4) /* Multiple Error Ack on SBus (readonly) */ | 345 | #define D_MRR (1<<4) /* Multiple Error Ack on SBus (read only) */ |
345 | #define D_MLE (1<<3) /* Multiple Late Error on SBus (readonly) */ | 346 | #define D_MLE (1<<3) /* Multiple Late Error on SBus (read only) */ |
346 | #define D_LBG (1<<2) /* Lost Bus Grant on SBus (readonly) */ | 347 | #define D_LBG (1<<2) /* Lost Bus Grant on SBus (read only) */ |
347 | #define D_MBE (1<<1) /* Burst Error on SBus (readonly) */ | 348 | #define D_MBE (1<<1) /* Burst Error on SBus (read only) */ |
348 | #define D_IR (1<<0) /* Interrupt Indicator (readonly) */ | 349 | #define D_IR (1<<0) /* Interrupt Indicator (read only) */ |
349 | 350 | ||
350 | /* DBRI Reg2 - Parallel IO Register - defines. (Page 18) */ | 351 | /* DBRI Reg2 - Parallel IO Register - defines. (Page 18) */ |
351 | #define D_ENPIO3 (1<<7) /* Enable Pin 3 */ | 352 | #define D_ENPIO3 (1<<7) /* Enable Pin 3 */ |
@@ -376,11 +377,11 @@ struct snd_dbri { | |||
376 | #define D_CDM 0xe /* CHI Data mode command */ | 377 | #define D_CDM 0xe /* CHI Data mode command */ |
377 | 378 | ||
378 | /* Special bits for some commands */ | 379 | /* Special bits for some commands */ |
379 | #define D_PIPE(v) ((v)<<0) /* Pipe Nr: 0-15 long, 16-21 short */ | 380 | #define D_PIPE(v) ((v)<<0) /* Pipe No.: 0-15 long, 16-21 short */ |
380 | 381 | ||
381 | /* Setup Data Pipe */ | 382 | /* Setup Data Pipe */ |
382 | /* IRM */ | 383 | /* IRM */ |
383 | #define D_SDP_2SAME (1<<18) /* Report 2nd time in a row value rcvd */ | 384 | #define D_SDP_2SAME (1<<18) /* Report 2nd time in a row value received */ |
384 | #define D_SDP_CHANGE (2<<18) /* Report any changes */ | 385 | #define D_SDP_CHANGE (2<<18) /* Report any changes */ |
385 | #define D_SDP_EVERY (3<<18) /* Report any changes */ | 386 | #define D_SDP_EVERY (3<<18) /* Report any changes */ |
386 | #define D_SDP_EOL (1<<17) /* EOL interrupt enable */ | 387 | #define D_SDP_EOL (1<<17) /* EOL interrupt enable */ |
@@ -419,7 +420,7 @@ struct snd_dbri { | |||
419 | #define D_TS_NONCONTIG (3<<10) /* Non contiguous mode */ | 420 | #define D_TS_NONCONTIG (3<<10) /* Non contiguous mode */ |
420 | #define D_TS_ANCHOR (7<<10) /* Starting short pipes */ | 421 | #define D_TS_ANCHOR (7<<10) /* Starting short pipes */ |
421 | #define D_TS_MON(v) ((v)<<5) /* Monitor Pipe */ | 422 | #define D_TS_MON(v) ((v)<<5) /* Monitor Pipe */ |
422 | #define D_TS_NEXT(v) ((v)<<0) /* Pipe Nr: 0-15 long, 16-21 short */ | 423 | #define D_TS_NEXT(v) ((v)<<0) /* Pipe no.: 0-15 long, 16-21 short */ |
423 | 424 | ||
424 | /* Concentration Highway Interface Modes */ | 425 | /* Concentration Highway Interface Modes */ |
425 | #define D_CHI_CHICM(v) ((v)<<16) /* Clock mode */ | 426 | #define D_CHI_CHICM(v) ((v)<<16) /* Clock mode */ |
@@ -435,7 +436,7 @@ struct snd_dbri { | |||
435 | #define D_NT_NBF (1<<16) /* Number of bad frames to loose framing */ | 436 | #define D_NT_NBF (1<<16) /* Number of bad frames to loose framing */ |
436 | #define D_NT_IRM_IMM (1<<15) /* Interrupt Report & Mask: Immediate */ | 437 | #define D_NT_IRM_IMM (1<<15) /* Interrupt Report & Mask: Immediate */ |
437 | #define D_NT_IRM_EN (1<<14) /* Interrupt Report & Mask: Enable */ | 438 | #define D_NT_IRM_EN (1<<14) /* Interrupt Report & Mask: Enable */ |
438 | #define D_NT_ISNT (1<<13) /* Configfure interface as NT */ | 439 | #define D_NT_ISNT (1<<13) /* Configure interface as NT */ |
439 | #define D_NT_FT (1<<12) /* Fixed Timing */ | 440 | #define D_NT_FT (1<<12) /* Fixed Timing */ |
440 | #define D_NT_EZ (1<<11) /* Echo Channel is Zeros */ | 441 | #define D_NT_EZ (1<<11) /* Echo Channel is Zeros */ |
441 | #define D_NT_IFA (1<<10) /* Inhibit Final Activation */ | 442 | #define D_NT_IFA (1<<10) /* Inhibit Final Activation */ |
@@ -455,7 +456,7 @@ struct snd_dbri { | |||
455 | #define D_TEST_RAM(v) ((v)<<16) /* RAM Pointer */ | 456 | #define D_TEST_RAM(v) ((v)<<16) /* RAM Pointer */ |
456 | #define D_TEST_SIZE(v) ((v)<<11) /* */ | 457 | #define D_TEST_SIZE(v) ((v)<<11) /* */ |
457 | #define D_TEST_ROMONOFF 0x5 /* Toggle ROM opcode monitor on/off */ | 458 | #define D_TEST_ROMONOFF 0x5 /* Toggle ROM opcode monitor on/off */ |
458 | #define D_TEST_PROC 0x6 /* MicroProcessor test */ | 459 | #define D_TEST_PROC 0x6 /* Microprocessor test */ |
459 | #define D_TEST_SER 0x7 /* Serial-Controller test */ | 460 | #define D_TEST_SER 0x7 /* Serial-Controller test */ |
460 | #define D_TEST_RAMREAD 0x8 /* Copy from Ram to system memory */ | 461 | #define D_TEST_RAMREAD 0x8 /* Copy from Ram to system memory */ |
461 | #define D_TEST_RAMWRITE 0x9 /* Copy into Ram from system memory */ | 462 | #define D_TEST_RAMWRITE 0x9 /* Copy into Ram from system memory */ |
@@ -464,12 +465,12 @@ struct snd_dbri { | |||
464 | #define D_TEST_DUMP 0xe /* ROM Dump */ | 465 | #define D_TEST_DUMP 0xe /* ROM Dump */ |
465 | 466 | ||
466 | /* CHI Data Mode */ | 467 | /* CHI Data Mode */ |
467 | #define D_CDM_THI (1<<8) /* Transmit Data on CHIDR Pin */ | 468 | #define D_CDM_THI (1 << 8) /* Transmit Data on CHIDR Pin */ |
468 | #define D_CDM_RHI (1<<7) /* Receive Data on CHIDX Pin */ | 469 | #define D_CDM_RHI (1 << 7) /* Receive Data on CHIDX Pin */ |
469 | #define D_CDM_RCE (1<<6) /* Receive on Rising Edge of CHICK */ | 470 | #define D_CDM_RCE (1 << 6) /* Receive on Rising Edge of CHICK */ |
470 | #define D_CDM_XCE (1<<2) /* Transmit Data on Rising Edge of CHICK */ | 471 | #define D_CDM_XCE (1 << 2) /* Transmit Data on Rising Edge of CHICK */ |
471 | #define D_CDM_XEN (1<<1) /* Transmit Highway Enable */ | 472 | #define D_CDM_XEN (1 << 1) /* Transmit Highway Enable */ |
472 | #define D_CDM_REN (1<<0) /* Receive Highway Enable */ | 473 | #define D_CDM_REN (1 << 0) /* Receive Highway Enable */ |
473 | 474 | ||
474 | /* The Interrupts */ | 475 | /* The Interrupts */ |
475 | #define D_INTR_BRDY 1 /* Buffer Ready for processing */ | 476 | #define D_INTR_BRDY 1 /* Buffer Ready for processing */ |
@@ -493,9 +494,9 @@ struct snd_dbri { | |||
493 | #define D_INTR_CHI 36 | 494 | #define D_INTR_CHI 36 |
494 | #define D_INTR_CMD 38 | 495 | #define D_INTR_CMD 38 |
495 | 496 | ||
496 | #define D_INTR_GETCHAN(v) (((v)>>24) & 0x3f) | 497 | #define D_INTR_GETCHAN(v) (((v) >> 24) & 0x3f) |
497 | #define D_INTR_GETCODE(v) (((v)>>20) & 0xf) | 498 | #define D_INTR_GETCODE(v) (((v) >> 20) & 0xf) |
498 | #define D_INTR_GETCMD(v) (((v)>>16) & 0xf) | 499 | #define D_INTR_GETCMD(v) (((v) >> 16) & 0xf) |
499 | #define D_INTR_GETVAL(v) ((v) & 0xffff) | 500 | #define D_INTR_GETVAL(v) ((v) & 0xffff) |
500 | #define D_INTR_GETRVAL(v) ((v) & 0xfffff) | 501 | #define D_INTR_GETRVAL(v) ((v) & 0xfffff) |
501 | 502 | ||
@@ -533,41 +534,42 @@ struct snd_dbri { | |||
533 | #define D_P_31 31 /* */ | 534 | #define D_P_31 31 /* */ |
534 | 535 | ||
535 | /* Transmit descriptor defines */ | 536 | /* Transmit descriptor defines */ |
536 | #define DBRI_TD_F (1<<31) /* End of Frame */ | 537 | #define DBRI_TD_F (1 << 31) /* End of Frame */ |
537 | #define DBRI_TD_D (1<<30) /* Do not append CRC */ | 538 | #define DBRI_TD_D (1 << 30) /* Do not append CRC */ |
538 | #define DBRI_TD_CNT(v) ((v)<<16) /* Number of valid bytes in the buffer */ | 539 | #define DBRI_TD_CNT(v) ((v) << 16) /* Number of valid bytes in the buffer */ |
539 | #define DBRI_TD_B (1<<15) /* Final interrupt */ | 540 | #define DBRI_TD_B (1 << 15) /* Final interrupt */ |
540 | #define DBRI_TD_M (1<<14) /* Marker interrupt */ | 541 | #define DBRI_TD_M (1 << 14) /* Marker interrupt */ |
541 | #define DBRI_TD_I (1<<13) /* Transmit Idle Characters */ | 542 | #define DBRI_TD_I (1 << 13) /* Transmit Idle Characters */ |
542 | #define DBRI_TD_FCNT(v) (v) /* Flag Count */ | 543 | #define DBRI_TD_FCNT(v) (v) /* Flag Count */ |
543 | #define DBRI_TD_UNR (1<<3) /* Underrun: transmitter is out of data */ | 544 | #define DBRI_TD_UNR (1 << 3) /* Underrun: transmitter is out of data */ |
544 | #define DBRI_TD_ABT (1<<2) /* Abort: frame aborted */ | 545 | #define DBRI_TD_ABT (1 << 2) /* Abort: frame aborted */ |
545 | #define DBRI_TD_TBC (1<<0) /* Transmit buffer Complete */ | 546 | #define DBRI_TD_TBC (1 << 0) /* Transmit buffer Complete */ |
546 | #define DBRI_TD_STATUS(v) ((v)&0xff) /* Transmit status */ | 547 | #define DBRI_TD_STATUS(v) ((v) & 0xff) /* Transmit status */ |
547 | /* Maximum buffer size per TD: almost 8Kb */ | 548 | /* Maximum buffer size per TD: almost 8KB */ |
548 | #define DBRI_TD_MAXCNT ((1 << 13) - 4) | 549 | #define DBRI_TD_MAXCNT ((1 << 13) - 4) |
549 | 550 | ||
550 | /* Receive descriptor defines */ | 551 | /* Receive descriptor defines */ |
551 | #define DBRI_RD_F (1<<31) /* End of Frame */ | 552 | #define DBRI_RD_F (1 << 31) /* End of Frame */ |
552 | #define DBRI_RD_C (1<<30) /* Completed buffer */ | 553 | #define DBRI_RD_C (1 << 30) /* Completed buffer */ |
553 | #define DBRI_RD_B (1<<15) /* Final interrupt */ | 554 | #define DBRI_RD_B (1 << 15) /* Final interrupt */ |
554 | #define DBRI_RD_M (1<<14) /* Marker interrupt */ | 555 | #define DBRI_RD_M (1 << 14) /* Marker interrupt */ |
555 | #define DBRI_RD_BCNT(v) (v) /* Buffer size */ | 556 | #define DBRI_RD_BCNT(v) (v) /* Buffer size */ |
556 | #define DBRI_RD_CRC (1<<7) /* 0: CRC is correct */ | 557 | #define DBRI_RD_CRC (1 << 7) /* 0: CRC is correct */ |
557 | #define DBRI_RD_BBC (1<<6) /* 1: Bad Byte received */ | 558 | #define DBRI_RD_BBC (1 << 6) /* 1: Bad Byte received */ |
558 | #define DBRI_RD_ABT (1<<5) /* Abort: frame aborted */ | 559 | #define DBRI_RD_ABT (1 << 5) /* Abort: frame aborted */ |
559 | #define DBRI_RD_OVRN (1<<3) /* Overrun: data lost */ | 560 | #define DBRI_RD_OVRN (1 << 3) /* Overrun: data lost */ |
560 | #define DBRI_RD_STATUS(v) ((v)&0xff) /* Receive status */ | 561 | #define DBRI_RD_STATUS(v) ((v) & 0xff) /* Receive status */ |
561 | #define DBRI_RD_CNT(v) (((v)>>16)&0x1fff) /* Valid bytes in the buffer */ | 562 | #define DBRI_RD_CNT(v) (((v) >> 16) & 0x1fff) /* Valid bytes in the buffer */ |
562 | 563 | ||
563 | /* stream_info[] access */ | 564 | /* stream_info[] access */ |
564 | /* Translate the ALSA direction into the array index */ | 565 | /* Translate the ALSA direction into the array index */ |
565 | #define DBRI_STREAMNO(substream) \ | 566 | #define DBRI_STREAMNO(substream) \ |
566 | (substream->stream == \ | 567 | (substream->stream == \ |
567 | SNDRV_PCM_STREAM_PLAYBACK? DBRI_PLAY: DBRI_REC) | 568 | SNDRV_PCM_STREAM_PLAYBACK? DBRI_PLAY: DBRI_REC) |
568 | 569 | ||
569 | /* Return a pointer to dbri_streaminfo */ | 570 | /* Return a pointer to dbri_streaminfo */ |
570 | #define DBRI_STREAM(dbri, substream) &dbri->stream_info[DBRI_STREAMNO(substream)] | 571 | #define DBRI_STREAM(dbri, substream) \ |
572 | &dbri->stream_info[DBRI_STREAMNO(substream)] | ||
571 | 573 | ||
572 | static struct snd_dbri *dbri_list; /* All DBRI devices */ | 574 | static struct snd_dbri *dbri_list; /* All DBRI devices */ |
573 | 575 | ||
@@ -612,18 +614,18 @@ Since the DBRI can run in parallel with the CPU, several means of | |||
612 | synchronization present themselves. The method implemented here is only | 614 | synchronization present themselves. The method implemented here is only |
613 | use of the dbri_cmdwait() to wait for execution of batch of sent commands. | 615 | use of the dbri_cmdwait() to wait for execution of batch of sent commands. |
614 | 616 | ||
615 | A circular command buffer is used here. A new command is being added | 617 | A circular command buffer is used here. A new command is being added |
616 | while another can be executed. The scheme works by adding two WAIT commands | 618 | while another can be executed. The scheme works by adding two WAIT commands |
617 | after each sent batch of commands. When the next batch is prepared it is | 619 | after each sent batch of commands. When the next batch is prepared it is |
618 | added after the WAIT commands then the WAITs are replaced with single JUMP | 620 | added after the WAIT commands then the WAITs are replaced with single JUMP |
619 | command to the new batch. The the DBRI is forced to reread the last WAIT | 621 | command to the new batch. The the DBRI is forced to reread the last WAIT |
620 | command (replaced by the JUMP by then). If the DBRI is still executing | 622 | command (replaced by the JUMP by then). If the DBRI is still executing |
621 | previous commands the request to reread the WAIT command is ignored. | 623 | previous commands the request to reread the WAIT command is ignored. |
622 | 624 | ||
623 | Every time a routine wants to write commands to the DBRI, it must | 625 | Every time a routine wants to write commands to the DBRI, it must |
624 | first call dbri_cmdlock() and get pointer to a free space in | 626 | first call dbri_cmdlock() and get pointer to a free space in |
625 | dbri->dma->cmd buffer. After this, the commands can be written to | 627 | dbri->dma->cmd buffer. After this, the commands can be written to |
626 | the buffer, and dbri_cmdsend() is called with the final pointer value | 628 | the buffer, and dbri_cmdsend() is called with the final pointer value |
627 | to send them to the DBRI. | 629 | to send them to the DBRI. |
628 | 630 | ||
629 | */ | 631 | */ |
@@ -657,7 +659,7 @@ static void dbri_cmdwait(struct snd_dbri *dbri) | |||
657 | * Lock the command queue and returns pointer to a space for len cmd words | 659 | * Lock the command queue and returns pointer to a space for len cmd words |
658 | * It locks the cmdlock spinlock. | 660 | * It locks the cmdlock spinlock. |
659 | */ | 661 | */ |
660 | static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len) | 662 | static s32 *dbri_cmdlock(struct snd_dbri *dbri, int len) |
661 | { | 663 | { |
662 | /* Space for 2 WAIT cmds (replaced later by 1 JUMP cmd) */ | 664 | /* Space for 2 WAIT cmds (replaced later by 1 JUMP cmd) */ |
663 | len += 2; | 665 | len += 2; |
@@ -680,7 +682,7 @@ static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len) | |||
680 | * | 682 | * |
681 | * Lock must be held before calling this. | 683 | * Lock must be held before calling this. |
682 | */ | 684 | */ |
683 | static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len) | 685 | static void dbri_cmdsend(struct snd_dbri *dbri, s32 *cmd, int len) |
684 | { | 686 | { |
685 | s32 tmp, addr; | 687 | s32 tmp, addr; |
686 | static int wait_id = 0; | 688 | static int wait_id = 0; |
@@ -700,16 +702,17 @@ static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len) | |||
700 | s32 *ptr; | 702 | s32 *ptr; |
701 | 703 | ||
702 | for (ptr = dbri->cmdptr; ptr < cmd+2; ptr++) | 704 | for (ptr = dbri->cmdptr; ptr < cmd+2; ptr++) |
703 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); | 705 | dprintk(D_CMD, "cmd: %lx:%08x\n", |
706 | (unsigned long)ptr, *ptr); | ||
704 | } else { | 707 | } else { |
705 | s32 *ptr = dbri->cmdptr; | 708 | s32 *ptr = dbri->cmdptr; |
706 | 709 | ||
707 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); | 710 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); |
708 | ptr++; | 711 | ptr++; |
709 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); | 712 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); |
710 | for (ptr = dbri->dma->cmd; ptr < cmd+2; ptr++) { | 713 | for (ptr = dbri->dma->cmd; ptr < cmd+2; ptr++) |
711 | dprintk(D_CMD, "cmd: %lx:%08x\n", (unsigned long)ptr, *ptr); | 714 | dprintk(D_CMD, "cmd: %lx:%08x\n", |
712 | } | 715 | (unsigned long)ptr, *ptr); |
713 | } | 716 | } |
714 | #endif | 717 | #endif |
715 | 718 | ||
@@ -723,7 +726,7 @@ static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len) | |||
723 | } | 726 | } |
724 | 727 | ||
725 | /* Lock must be held when calling this */ | 728 | /* Lock must be held when calling this */ |
726 | static void dbri_reset(struct snd_dbri * dbri) | 729 | static void dbri_reset(struct snd_dbri *dbri) |
727 | { | 730 | { |
728 | int i; | 731 | int i; |
729 | u32 tmp; | 732 | u32 tmp; |
@@ -746,7 +749,7 @@ static void dbri_reset(struct snd_dbri * dbri) | |||
746 | } | 749 | } |
747 | 750 | ||
748 | /* Lock must not be held before calling this */ | 751 | /* Lock must not be held before calling this */ |
749 | static void dbri_initialize(struct snd_dbri * dbri) | 752 | static void dbri_initialize(struct snd_dbri *dbri) |
750 | { | 753 | { |
751 | s32 *cmd; | 754 | s32 *cmd; |
752 | u32 dma_addr; | 755 | u32 dma_addr; |
@@ -763,7 +766,7 @@ static void dbri_initialize(struct snd_dbri * dbri) | |||
763 | 766 | ||
764 | spin_lock_init(&dbri->cmdlock); | 767 | spin_lock_init(&dbri->cmdlock); |
765 | /* | 768 | /* |
766 | * Initialize the interrupt ringbuffer. | 769 | * Initialize the interrupt ring buffer. |
767 | */ | 770 | */ |
768 | dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0); | 771 | dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0); |
769 | dbri->dma->intr[0] = dma_addr; | 772 | dbri->dma->intr[0] = dma_addr; |
@@ -801,7 +804,7 @@ list ordering, among other things. The transmit and receive functions | |||
801 | here interface closely with the transmit and receive interrupt code. | 804 | here interface closely with the transmit and receive interrupt code. |
802 | 805 | ||
803 | */ | 806 | */ |
804 | static int pipe_active(struct snd_dbri * dbri, int pipe) | 807 | static int pipe_active(struct snd_dbri *dbri, int pipe) |
805 | { | 808 | { |
806 | return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1)); | 809 | return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1)); |
807 | } | 810 | } |
@@ -811,20 +814,22 @@ static int pipe_active(struct snd_dbri * dbri, int pipe) | |||
811 | * Called on an in-use pipe to clear anything being transmitted or received | 814 | * Called on an in-use pipe to clear anything being transmitted or received |
812 | * Lock must be held before calling this. | 815 | * Lock must be held before calling this. |
813 | */ | 816 | */ |
814 | static void reset_pipe(struct snd_dbri * dbri, int pipe) | 817 | static void reset_pipe(struct snd_dbri *dbri, int pipe) |
815 | { | 818 | { |
816 | int sdp; | 819 | int sdp; |
817 | int desc; | 820 | int desc; |
818 | s32 *cmd; | 821 | s32 *cmd; |
819 | 822 | ||
820 | if (pipe < 0 || pipe > DBRI_MAX_PIPE) { | 823 | if (pipe < 0 || pipe > DBRI_MAX_PIPE) { |
821 | printk(KERN_ERR "DBRI: reset_pipe called with illegal pipe number\n"); | 824 | printk(KERN_ERR "DBRI: reset_pipe called with " |
825 | "illegal pipe number\n"); | ||
822 | return; | 826 | return; |
823 | } | 827 | } |
824 | 828 | ||
825 | sdp = dbri->pipes[pipe].sdp; | 829 | sdp = dbri->pipes[pipe].sdp; |
826 | if (sdp == 0) { | 830 | if (sdp == 0) { |
827 | printk(KERN_ERR "DBRI: reset_pipe called on uninitialized pipe\n"); | 831 | printk(KERN_ERR "DBRI: reset_pipe called " |
832 | "on uninitialized pipe\n"); | ||
828 | return; | 833 | return; |
829 | } | 834 | } |
830 | 835 | ||
@@ -835,9 +840,10 @@ static void reset_pipe(struct snd_dbri * dbri, int pipe) | |||
835 | dbri_cmdsend(dbri, cmd, 3); | 840 | dbri_cmdsend(dbri, cmd, 3); |
836 | 841 | ||
837 | desc = dbri->pipes[pipe].first_desc; | 842 | desc = dbri->pipes[pipe].first_desc; |
838 | if ( desc >= 0) | 843 | if (desc >= 0) |
839 | do { | 844 | do { |
840 | dbri->dma->desc[desc].nda = dbri->dma->desc[desc].ba = 0; | 845 | dbri->dma->desc[desc].ba = 0; |
846 | dbri->dma->desc[desc].nda = 0; | ||
841 | desc = dbri->next_desc[desc]; | 847 | desc = dbri->next_desc[desc]; |
842 | } while (desc != -1 && desc != dbri->pipes[pipe].first_desc); | 848 | } while (desc != -1 && desc != dbri->pipes[pipe].first_desc); |
843 | 849 | ||
@@ -848,15 +854,17 @@ static void reset_pipe(struct snd_dbri * dbri, int pipe) | |||
848 | /* | 854 | /* |
849 | * Lock must be held before calling this. | 855 | * Lock must be held before calling this. |
850 | */ | 856 | */ |
851 | static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp) | 857 | static void setup_pipe(struct snd_dbri *dbri, int pipe, int sdp) |
852 | { | 858 | { |
853 | if (pipe < 0 || pipe > DBRI_MAX_PIPE) { | 859 | if (pipe < 0 || pipe > DBRI_MAX_PIPE) { |
854 | printk(KERN_ERR "DBRI: setup_pipe called with illegal pipe number\n"); | 860 | printk(KERN_ERR "DBRI: setup_pipe called " |
861 | "with illegal pipe number\n"); | ||
855 | return; | 862 | return; |
856 | } | 863 | } |
857 | 864 | ||
858 | if ((sdp & 0xf800) != sdp) { | 865 | if ((sdp & 0xf800) != sdp) { |
859 | printk(KERN_ERR "DBRI: setup_pipe called with strange SDP value\n"); | 866 | printk(KERN_ERR "DBRI: setup_pipe called " |
867 | "with strange SDP value\n"); | ||
860 | /* sdp &= 0xf800; */ | 868 | /* sdp &= 0xf800; */ |
861 | } | 869 | } |
862 | 870 | ||
@@ -877,25 +885,26 @@ static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp) | |||
877 | /* | 885 | /* |
878 | * Lock must be held before calling this. | 886 | * Lock must be held before calling this. |
879 | */ | 887 | */ |
880 | static void link_time_slot(struct snd_dbri * dbri, int pipe, | 888 | static void link_time_slot(struct snd_dbri *dbri, int pipe, |
881 | int prevpipe, int nextpipe, | 889 | int prevpipe, int nextpipe, |
882 | int length, int cycle) | 890 | int length, int cycle) |
883 | { | 891 | { |
884 | s32 *cmd; | 892 | s32 *cmd; |
885 | int val; | 893 | int val; |
886 | 894 | ||
887 | if (pipe < 0 || pipe > DBRI_MAX_PIPE | 895 | if (pipe < 0 || pipe > DBRI_MAX_PIPE |
888 | || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE | 896 | || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE |
889 | || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { | 897 | || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { |
890 | printk(KERN_ERR | 898 | printk(KERN_ERR |
891 | "DBRI: link_time_slot called with illegal pipe number\n"); | 899 | "DBRI: link_time_slot called with illegal pipe number\n"); |
892 | return; | 900 | return; |
893 | } | 901 | } |
894 | 902 | ||
895 | if (dbri->pipes[pipe].sdp == 0 | 903 | if (dbri->pipes[pipe].sdp == 0 |
896 | || dbri->pipes[prevpipe].sdp == 0 | 904 | || dbri->pipes[prevpipe].sdp == 0 |
897 | || dbri->pipes[nextpipe].sdp == 0) { | 905 | || dbri->pipes[nextpipe].sdp == 0) { |
898 | printk(KERN_ERR "DBRI: link_time_slot called on uninitialized pipe\n"); | 906 | printk(KERN_ERR "DBRI: link_time_slot called " |
907 | "on uninitialized pipe\n"); | ||
899 | return; | 908 | return; |
900 | } | 909 | } |
901 | 910 | ||
@@ -935,17 +944,17 @@ static void link_time_slot(struct snd_dbri * dbri, int pipe, | |||
935 | /* | 944 | /* |
936 | * Lock must be held before calling this. | 945 | * Lock must be held before calling this. |
937 | */ | 946 | */ |
938 | static void unlink_time_slot(struct snd_dbri * dbri, int pipe, | 947 | static void unlink_time_slot(struct snd_dbri *dbri, int pipe, |
939 | enum in_or_out direction, int prevpipe, | 948 | enum in_or_out direction, int prevpipe, |
940 | int nextpipe) | 949 | int nextpipe) |
941 | { | 950 | { |
942 | s32 *cmd; | 951 | s32 *cmd; |
943 | int val; | 952 | int val; |
944 | 953 | ||
945 | if (pipe < 0 || pipe > DBRI_MAX_PIPE | 954 | if (pipe < 0 || pipe > DBRI_MAX_PIPE |
946 | || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE | 955 | || prevpipe < 0 || prevpipe > DBRI_MAX_PIPE |
947 | || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { | 956 | || nextpipe < 0 || nextpipe > DBRI_MAX_PIPE) { |
948 | printk(KERN_ERR | 957 | printk(KERN_ERR |
949 | "DBRI: unlink_time_slot called with illegal pipe number\n"); | 958 | "DBRI: unlink_time_slot called with illegal pipe number\n"); |
950 | return; | 959 | return; |
951 | } | 960 | } |
@@ -985,7 +994,7 @@ static void unlink_time_slot(struct snd_dbri * dbri, int pipe, | |||
985 | * | 994 | * |
986 | * Lock must not be held before calling it. | 995 | * Lock must not be held before calling it. |
987 | */ | 996 | */ |
988 | static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data) | 997 | static void xmit_fixed(struct snd_dbri *dbri, int pipe, unsigned int data) |
989 | { | 998 | { |
990 | s32 *cmd; | 999 | s32 *cmd; |
991 | unsigned long flags; | 1000 | unsigned long flags; |
@@ -996,7 +1005,8 @@ static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data) | |||
996 | } | 1005 | } |
997 | 1006 | ||
998 | if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) { | 1007 | if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) { |
999 | printk(KERN_ERR "DBRI: xmit_fixed: Uninitialized pipe %d\n", pipe); | 1008 | printk(KERN_ERR "DBRI: xmit_fixed: " |
1009 | "Uninitialized pipe %d\n", pipe); | ||
1000 | return; | 1010 | return; |
1001 | } | 1011 | } |
1002 | 1012 | ||
@@ -1006,7 +1016,8 @@ static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data) | |||
1006 | } | 1016 | } |
1007 | 1017 | ||
1008 | if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) { | 1018 | if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) { |
1009 | printk(KERN_ERR "DBRI: xmit_fixed: Called on receive pipe %d\n", pipe); | 1019 | printk(KERN_ERR "DBRI: xmit_fixed: Called on receive pipe %d\n", |
1020 | pipe); | ||
1010 | return; | 1021 | return; |
1011 | } | 1022 | } |
1012 | 1023 | ||
@@ -1028,20 +1039,23 @@ static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data) | |||
1028 | 1039 | ||
1029 | } | 1040 | } |
1030 | 1041 | ||
1031 | static void recv_fixed(struct snd_dbri * dbri, int pipe, volatile __u32 * ptr) | 1042 | static void recv_fixed(struct snd_dbri *dbri, int pipe, volatile __u32 *ptr) |
1032 | { | 1043 | { |
1033 | if (pipe < 16 || pipe > DBRI_MAX_PIPE) { | 1044 | if (pipe < 16 || pipe > DBRI_MAX_PIPE) { |
1034 | printk(KERN_ERR "DBRI: recv_fixed called with illegal pipe number\n"); | 1045 | printk(KERN_ERR "DBRI: recv_fixed called with " |
1046 | "illegal pipe number\n"); | ||
1035 | return; | 1047 | return; |
1036 | } | 1048 | } |
1037 | 1049 | ||
1038 | if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { | 1050 | if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { |
1039 | printk(KERN_ERR "DBRI: recv_fixed called on non-fixed pipe %d\n", pipe); | 1051 | printk(KERN_ERR "DBRI: recv_fixed called on " |
1052 | "non-fixed pipe %d\n", pipe); | ||
1040 | return; | 1053 | return; |
1041 | } | 1054 | } |
1042 | 1055 | ||
1043 | if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { | 1056 | if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { |
1044 | printk(KERN_ERR "DBRI: recv_fixed called on transmit pipe %d\n", pipe); | 1057 | printk(KERN_ERR "DBRI: recv_fixed called on " |
1058 | "transmit pipe %d\n", pipe); | ||
1045 | return; | 1059 | return; |
1046 | } | 1060 | } |
1047 | 1061 | ||
@@ -1064,7 +1078,7 @@ static void recv_fixed(struct snd_dbri * dbri, int pipe, volatile __u32 * ptr) | |||
1064 | * | 1078 | * |
1065 | * Lock must be held before calling this. | 1079 | * Lock must be held before calling this. |
1066 | */ | 1080 | */ |
1067 | static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period) | 1081 | static int setup_descs(struct snd_dbri *dbri, int streamno, unsigned int period) |
1068 | { | 1082 | { |
1069 | struct dbri_streaminfo *info = &dbri->stream_info[streamno]; | 1083 | struct dbri_streaminfo *info = &dbri->stream_info[streamno]; |
1070 | __u32 dvma_buffer; | 1084 | __u32 dvma_buffer; |
@@ -1089,21 +1103,23 @@ static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period | |||
1089 | 1103 | ||
1090 | if (streamno == DBRI_PLAY) { | 1104 | if (streamno == DBRI_PLAY) { |
1091 | if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) { | 1105 | if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) { |
1092 | printk(KERN_ERR "DBRI: setup_descs: Called on receive pipe %d\n", | 1106 | printk(KERN_ERR "DBRI: setup_descs: " |
1093 | info->pipe); | 1107 | "Called on receive pipe %d\n", info->pipe); |
1094 | return -2; | 1108 | return -2; |
1095 | } | 1109 | } |
1096 | } else { | 1110 | } else { |
1097 | if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) { | 1111 | if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) { |
1098 | printk(KERN_ERR | 1112 | printk(KERN_ERR |
1099 | "DBRI: setup_descs: Called on transmit pipe %d\n", | 1113 | "DBRI: setup_descs: Called on transmit pipe %d\n", |
1100 | info->pipe); | 1114 | info->pipe); |
1101 | return -2; | 1115 | return -2; |
1102 | } | 1116 | } |
1103 | /* Should be able to queue multiple buffers to receive on a pipe */ | 1117 | /* Should be able to queue multiple buffers |
1118 | * to receive on a pipe | ||
1119 | */ | ||
1104 | if (pipe_active(dbri, info->pipe)) { | 1120 | if (pipe_active(dbri, info->pipe)) { |
1105 | printk(KERN_ERR "DBRI: recv_on_pipe: Called on active pipe %d\n", | 1121 | printk(KERN_ERR "DBRI: recv_on_pipe: " |
1106 | info->pipe); | 1122 | "Called on active pipe %d\n", info->pipe); |
1107 | return -2; | 1123 | return -2; |
1108 | } | 1124 | } |
1109 | 1125 | ||
@@ -1113,11 +1129,13 @@ static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period | |||
1113 | 1129 | ||
1114 | /* Free descriptors if pipe has any */ | 1130 | /* Free descriptors if pipe has any */ |
1115 | desc = dbri->pipes[info->pipe].first_desc; | 1131 | desc = dbri->pipes[info->pipe].first_desc; |
1116 | if ( desc >= 0) | 1132 | if (desc >= 0) |
1117 | do { | 1133 | do { |
1118 | dbri->dma->desc[desc].nda = dbri->dma->desc[desc].ba = 0; | 1134 | dbri->dma->desc[desc].ba = 0; |
1135 | dbri->dma->desc[desc].nda = 0; | ||
1119 | desc = dbri->next_desc[desc]; | 1136 | desc = dbri->next_desc[desc]; |
1120 | } while (desc != -1 && desc != dbri->pipes[info->pipe].first_desc); | 1137 | } while (desc != -1 && |
1138 | desc != dbri->pipes[info->pipe].first_desc); | ||
1121 | 1139 | ||
1122 | dbri->pipes[info->pipe].desc = -1; | 1140 | dbri->pipes[info->pipe].desc = -1; |
1123 | dbri->pipes[info->pipe].first_desc = -1; | 1141 | dbri->pipes[info->pipe].first_desc = -1; |
@@ -1150,8 +1168,7 @@ static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period | |||
1150 | if (streamno == DBRI_PLAY) { | 1168 | if (streamno == DBRI_PLAY) { |
1151 | dbri->dma->desc[desc].word1 = DBRI_TD_CNT(mylen); | 1169 | dbri->dma->desc[desc].word1 = DBRI_TD_CNT(mylen); |
1152 | dbri->dma->desc[desc].word4 = 0; | 1170 | dbri->dma->desc[desc].word4 = 0; |
1153 | dbri->dma->desc[desc].word1 |= | 1171 | dbri->dma->desc[desc].word1 |= DBRI_TD_F | DBRI_TD_B; |
1154 | DBRI_TD_F | DBRI_TD_B; | ||
1155 | } else { | 1172 | } else { |
1156 | dbri->dma->desc[desc].word1 = 0; | 1173 | dbri->dma->desc[desc].word1 = 0; |
1157 | dbri->dma->desc[desc].word4 = | 1174 | dbri->dma->desc[desc].word4 = |
@@ -1172,7 +1189,8 @@ static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period | |||
1172 | } | 1189 | } |
1173 | 1190 | ||
1174 | if (first_desc == -1 || last_desc == -1) { | 1191 | if (first_desc == -1 || last_desc == -1) { |
1175 | printk(KERN_ERR "DBRI: setup_descs: Not enough descriptors available\n"); | 1192 | printk(KERN_ERR "DBRI: setup_descs: " |
1193 | " Not enough descriptors available\n"); | ||
1176 | return -1; | 1194 | return -1; |
1177 | } | 1195 | } |
1178 | 1196 | ||
@@ -1183,14 +1201,14 @@ static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period | |||
1183 | dbri->pipes[info->pipe].desc = first_desc; | 1201 | dbri->pipes[info->pipe].desc = first_desc; |
1184 | 1202 | ||
1185 | #ifdef DBRI_DEBUG | 1203 | #ifdef DBRI_DEBUG |
1186 | for (desc = first_desc; desc != -1; ) { | 1204 | for (desc = first_desc; desc != -1;) { |
1187 | dprintk(D_DESC, "DESC %d: %08x %08x %08x %08x\n", | 1205 | dprintk(D_DESC, "DESC %d: %08x %08x %08x %08x\n", |
1188 | desc, | 1206 | desc, |
1189 | dbri->dma->desc[desc].word1, | 1207 | dbri->dma->desc[desc].word1, |
1190 | dbri->dma->desc[desc].ba, | 1208 | dbri->dma->desc[desc].ba, |
1191 | dbri->dma->desc[desc].nda, dbri->dma->desc[desc].word4); | 1209 | dbri->dma->desc[desc].nda, dbri->dma->desc[desc].word4); |
1192 | desc = dbri->next_desc[desc]; | 1210 | desc = dbri->next_desc[desc]; |
1193 | if ( desc == first_desc ) | 1211 | if (desc == first_desc) |
1194 | break; | 1212 | break; |
1195 | } | 1213 | } |
1196 | #endif | 1214 | #endif |
@@ -1213,7 +1231,8 @@ enum master_or_slave { CHImaster, CHIslave }; | |||
1213 | /* | 1231 | /* |
1214 | * Lock must not be held before calling it. | 1232 | * Lock must not be held before calling it. |
1215 | */ | 1233 | */ |
1216 | static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_slave, | 1234 | static void reset_chi(struct snd_dbri *dbri, |
1235 | enum master_or_slave master_or_slave, | ||
1217 | int bits_per_frame) | 1236 | int bits_per_frame) |
1218 | { | 1237 | { |
1219 | s32 *cmd; | 1238 | s32 *cmd; |
@@ -1222,7 +1241,7 @@ static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_sla | |||
1222 | /* Set CHI Anchor: Pipe 16 */ | 1241 | /* Set CHI Anchor: Pipe 16 */ |
1223 | 1242 | ||
1224 | cmd = dbri_cmdlock(dbri, 4); | 1243 | cmd = dbri_cmdlock(dbri, 4); |
1225 | val = D_DTS_VO | D_DTS_VI | D_DTS_INS | 1244 | val = D_DTS_VO | D_DTS_VI | D_DTS_INS |
1226 | | D_DTS_PRVIN(16) | D_PIPE(16) | D_DTS_PRVOUT(16); | 1245 | | D_DTS_PRVIN(16) | D_PIPE(16) | D_DTS_PRVOUT(16); |
1227 | *(cmd++) = DBRI_CMD(D_DTS, 0, val); | 1246 | *(cmd++) = DBRI_CMD(D_DTS, 0, val); |
1228 | *(cmd++) = D_TS_ANCHOR | D_TS_NEXT(16); | 1247 | *(cmd++) = D_TS_ANCHOR | D_TS_NEXT(16); |
@@ -1246,15 +1265,16 @@ static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_sla | |||
1246 | } else { | 1265 | } else { |
1247 | /* Setup DBRI for CHI Master - generate clock, FS | 1266 | /* Setup DBRI for CHI Master - generate clock, FS |
1248 | * | 1267 | * |
1249 | * BPF = bits per 8 kHz frame | 1268 | * BPF = bits per 8 kHz frame |
1250 | * 12.288 MHz / CHICM_divisor = clock rate | 1269 | * 12.288 MHz / CHICM_divisor = clock rate |
1251 | * FD = 1 - drive CHIFS on rising edge of CHICK | 1270 | * FD = 1 - drive CHIFS on rising edge of CHICK |
1252 | */ | 1271 | */ |
1253 | int clockrate = bits_per_frame * 8; | 1272 | int clockrate = bits_per_frame * 8; |
1254 | int divisor = 12288 / clockrate; | 1273 | int divisor = 12288 / clockrate; |
1255 | 1274 | ||
1256 | if (divisor > 255 || divisor * clockrate != 12288) | 1275 | if (divisor > 255 || divisor * clockrate != 12288) |
1257 | printk(KERN_ERR "DBRI: illegal bits_per_frame in setup_chi\n"); | 1276 | printk(KERN_ERR "DBRI: illegal bits_per_frame " |
1277 | "in setup_chi\n"); | ||
1258 | 1278 | ||
1259 | *(cmd++) = DBRI_CMD(D_CHI, 0, D_CHI_CHICM(divisor) | D_CHI_FD | 1279 | *(cmd++) = DBRI_CMD(D_CHI, 0, D_CHI_CHICM(divisor) | D_CHI_FD |
1260 | | D_CHI_BPF(bits_per_frame)); | 1280 | | D_CHI_BPF(bits_per_frame)); |
@@ -1288,7 +1308,7 @@ to the DBRI via the CHI interface and few of the DBRI's PIO pins. | |||
1288 | * Lock must not be held before calling it. | 1308 | * Lock must not be held before calling it. |
1289 | 1309 | ||
1290 | */ | 1310 | */ |
1291 | static void cs4215_setup_pipes(struct snd_dbri * dbri) | 1311 | static void cs4215_setup_pipes(struct snd_dbri *dbri) |
1292 | { | 1312 | { |
1293 | unsigned long flags; | 1313 | unsigned long flags; |
1294 | 1314 | ||
@@ -1303,9 +1323,9 @@ static void cs4215_setup_pipes(struct snd_dbri * dbri) | |||
1303 | * not relevant for us (only for doublechecking). | 1323 | * not relevant for us (only for doublechecking). |
1304 | * | 1324 | * |
1305 | * Control mode: | 1325 | * Control mode: |
1306 | * Pipe 17: Send timeslots 1-4 (slots 5-8 are readonly) | 1326 | * Pipe 17: Send timeslots 1-4 (slots 5-8 are read only) |
1307 | * Pipe 18: Receive timeslot 1 (clb). | 1327 | * Pipe 18: Receive timeslot 1 (clb). |
1308 | * Pipe 19: Receive timeslot 7 (version). | 1328 | * Pipe 19: Receive timeslot 7 (version). |
1309 | */ | 1329 | */ |
1310 | 1330 | ||
1311 | setup_pipe(dbri, 4, D_SDP_MEM | D_SDP_TO_SER | D_SDP_MSB); | 1331 | setup_pipe(dbri, 4, D_SDP_MEM | D_SDP_TO_SER | D_SDP_MSB); |
@@ -1355,7 +1375,7 @@ static int cs4215_init_data(struct cs4215 *mm) | |||
1355 | return 0; | 1375 | return 0; |
1356 | } | 1376 | } |
1357 | 1377 | ||
1358 | static void cs4215_setdata(struct snd_dbri * dbri, int muted) | 1378 | static void cs4215_setdata(struct snd_dbri *dbri, int muted) |
1359 | { | 1379 | { |
1360 | if (muted) { | 1380 | if (muted) { |
1361 | dbri->mm.data[0] |= 63; | 1381 | dbri->mm.data[0] |= 63; |
@@ -1387,7 +1407,7 @@ static void cs4215_setdata(struct snd_dbri * dbri, int muted) | |||
1387 | /* | 1407 | /* |
1388 | * Set the CS4215 to data mode. | 1408 | * Set the CS4215 to data mode. |
1389 | */ | 1409 | */ |
1390 | static void cs4215_open(struct snd_dbri * dbri) | 1410 | static void cs4215_open(struct snd_dbri *dbri) |
1391 | { | 1411 | { |
1392 | int data_width; | 1412 | int data_width; |
1393 | u32 tmp; | 1413 | u32 tmp; |
@@ -1452,7 +1472,7 @@ static void cs4215_open(struct snd_dbri * dbri) | |||
1452 | /* | 1472 | /* |
1453 | * Send the control information (i.e. audio format) | 1473 | * Send the control information (i.e. audio format) |
1454 | */ | 1474 | */ |
1455 | static int cs4215_setctrl(struct snd_dbri * dbri) | 1475 | static int cs4215_setctrl(struct snd_dbri *dbri) |
1456 | { | 1476 | { |
1457 | int i, val; | 1477 | int i, val; |
1458 | u32 tmp; | 1478 | u32 tmp; |
@@ -1502,9 +1522,9 @@ static int cs4215_setctrl(struct snd_dbri * dbri) | |||
1502 | 1522 | ||
1503 | /* | 1523 | /* |
1504 | * Control mode: | 1524 | * Control mode: |
1505 | * Pipe 17: Send timeslots 1-4 (slots 5-8 are readonly) | 1525 | * Pipe 17: Send timeslots 1-4 (slots 5-8 are read only) |
1506 | * Pipe 18: Receive timeslot 1 (clb). | 1526 | * Pipe 18: Receive timeslot 1 (clb). |
1507 | * Pipe 19: Receive timeslot 7 (version). | 1527 | * Pipe 19: Receive timeslot 7 (version). |
1508 | */ | 1528 | */ |
1509 | 1529 | ||
1510 | link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset); | 1530 | link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset); |
@@ -1522,9 +1542,9 @@ static int cs4215_setctrl(struct snd_dbri * dbri) | |||
1522 | sbus_writel(tmp, dbri->regs + REG0); | 1542 | sbus_writel(tmp, dbri->regs + REG0); |
1523 | spin_unlock_irqrestore(&dbri->lock, flags); | 1543 | spin_unlock_irqrestore(&dbri->lock, flags); |
1524 | 1544 | ||
1525 | for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i) { | 1545 | for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i) |
1526 | msleep_interruptible(1); | 1546 | msleep_interruptible(1); |
1527 | } | 1547 | |
1528 | if (i == 0) { | 1548 | if (i == 0) { |
1529 | dprintk(D_MM, "CS4215 didn't respond to CLB (0x%02x)\n", | 1549 | dprintk(D_MM, "CS4215 didn't respond to CLB (0x%02x)\n", |
1530 | dbri->mm.status); | 1550 | dbri->mm.status); |
@@ -1556,7 +1576,7 @@ static int cs4215_setctrl(struct snd_dbri * dbri) | |||
1556 | * As part of the process we resend the settings for the data | 1576 | * As part of the process we resend the settings for the data |
1557 | * timeslots as well. | 1577 | * timeslots as well. |
1558 | */ | 1578 | */ |
1559 | static int cs4215_prepare(struct snd_dbri * dbri, unsigned int rate, | 1579 | static int cs4215_prepare(struct snd_dbri *dbri, unsigned int rate, |
1560 | snd_pcm_format_t format, unsigned int channels) | 1580 | snd_pcm_format_t format, unsigned int channels) |
1561 | { | 1581 | { |
1562 | int freq_idx; | 1582 | int freq_idx; |
@@ -1613,7 +1633,7 @@ static int cs4215_prepare(struct snd_dbri * dbri, unsigned int rate, | |||
1613 | /* | 1633 | /* |
1614 | * | 1634 | * |
1615 | */ | 1635 | */ |
1616 | static int cs4215_init(struct snd_dbri * dbri) | 1636 | static int cs4215_init(struct snd_dbri *dbri) |
1617 | { | 1637 | { |
1618 | u32 reg2 = sbus_readl(dbri->regs + REG2); | 1638 | u32 reg2 = sbus_readl(dbri->regs + REG2); |
1619 | dprintk(D_MM, "cs4215_init: reg2=0x%x\n", reg2); | 1639 | dprintk(D_MM, "cs4215_init: reg2=0x%x\n", reg2); |
@@ -1674,7 +1694,7 @@ interrupts are disabled. | |||
1674 | 1694 | ||
1675 | /* xmit_descs() | 1695 | /* xmit_descs() |
1676 | * | 1696 | * |
1677 | * Starts transmiting the current TD's for recording/playing. | 1697 | * Starts transmitting the current TD's for recording/playing. |
1678 | * For playback, ALSA has filled the DMA memory with new data (we hope). | 1698 | * For playback, ALSA has filled the DMA memory with new data (we hope). |
1679 | */ | 1699 | */ |
1680 | static void xmit_descs(struct snd_dbri *dbri) | 1700 | static void xmit_descs(struct snd_dbri *dbri) |
@@ -1701,7 +1721,8 @@ static void xmit_descs(struct snd_dbri *dbri) | |||
1701 | *(cmd++) = DBRI_CMD(D_SDP, 0, | 1721 | *(cmd++) = DBRI_CMD(D_SDP, 0, |
1702 | dbri->pipes[info->pipe].sdp | 1722 | dbri->pipes[info->pipe].sdp |
1703 | | D_SDP_P | D_SDP_EVERY | D_SDP_C); | 1723 | | D_SDP_P | D_SDP_EVERY | D_SDP_C); |
1704 | *(cmd++) = dbri->dma_dvma + dbri_dma_off(desc, first_td); | 1724 | *(cmd++) = dbri->dma_dvma + |
1725 | dbri_dma_off(desc, first_td); | ||
1705 | dbri_cmdsend(dbri, cmd, 2); | 1726 | dbri_cmdsend(dbri, cmd, 2); |
1706 | 1727 | ||
1707 | /* Reset our admin of the pipe. */ | 1728 | /* Reset our admin of the pipe. */ |
@@ -1722,7 +1743,8 @@ static void xmit_descs(struct snd_dbri *dbri) | |||
1722 | *(cmd++) = DBRI_CMD(D_SDP, 0, | 1743 | *(cmd++) = DBRI_CMD(D_SDP, 0, |
1723 | dbri->pipes[info->pipe].sdp | 1744 | dbri->pipes[info->pipe].sdp |
1724 | | D_SDP_P | D_SDP_EVERY | D_SDP_C); | 1745 | | D_SDP_P | D_SDP_EVERY | D_SDP_C); |
1725 | *(cmd++) = dbri->dma_dvma + dbri_dma_off(desc, first_td); | 1746 | *(cmd++) = dbri->dma_dvma + |
1747 | dbri_dma_off(desc, first_td); | ||
1726 | dbri_cmdsend(dbri, cmd, 2); | 1748 | dbri_cmdsend(dbri, cmd, 2); |
1727 | 1749 | ||
1728 | /* Reset our admin of the pipe. */ | 1750 | /* Reset our admin of the pipe. */ |
@@ -1747,7 +1769,7 @@ static void xmit_descs(struct snd_dbri *dbri) | |||
1747 | * | 1769 | * |
1748 | */ | 1770 | */ |
1749 | 1771 | ||
1750 | static void transmission_complete_intr(struct snd_dbri * dbri, int pipe) | 1772 | static void transmission_complete_intr(struct snd_dbri *dbri, int pipe) |
1751 | { | 1773 | { |
1752 | struct dbri_streaminfo *info; | 1774 | struct dbri_streaminfo *info; |
1753 | int td; | 1775 | int td; |
@@ -1763,9 +1785,8 @@ static void transmission_complete_intr(struct snd_dbri * dbri, int pipe) | |||
1763 | } | 1785 | } |
1764 | 1786 | ||
1765 | status = DBRI_TD_STATUS(dbri->dma->desc[td].word4); | 1787 | status = DBRI_TD_STATUS(dbri->dma->desc[td].word4); |
1766 | if (!(status & DBRI_TD_TBC)) { | 1788 | if (!(status & DBRI_TD_TBC)) |
1767 | break; | 1789 | break; |
1768 | } | ||
1769 | 1790 | ||
1770 | dprintk(D_INT, "TD %d, status 0x%02x\n", td, status); | 1791 | dprintk(D_INT, "TD %d, status 0x%02x\n", td, status); |
1771 | 1792 | ||
@@ -1785,7 +1806,7 @@ static void transmission_complete_intr(struct snd_dbri * dbri, int pipe) | |||
1785 | snd_pcm_period_elapsed(info->substream); | 1806 | snd_pcm_period_elapsed(info->substream); |
1786 | } | 1807 | } |
1787 | 1808 | ||
1788 | static void reception_complete_intr(struct snd_dbri * dbri, int pipe) | 1809 | static void reception_complete_intr(struct snd_dbri *dbri, int pipe) |
1789 | { | 1810 | { |
1790 | struct dbri_streaminfo *info; | 1811 | struct dbri_streaminfo *info; |
1791 | int rd = dbri->pipes[pipe].desc; | 1812 | int rd = dbri->pipes[pipe].desc; |
@@ -1817,7 +1838,7 @@ static void reception_complete_intr(struct snd_dbri * dbri, int pipe) | |||
1817 | snd_pcm_period_elapsed(info->substream); | 1838 | snd_pcm_period_elapsed(info->substream); |
1818 | } | 1839 | } |
1819 | 1840 | ||
1820 | static void dbri_process_one_interrupt(struct snd_dbri * dbri, int x) | 1841 | static void dbri_process_one_interrupt(struct snd_dbri *dbri, int x) |
1821 | { | 1842 | { |
1822 | int val = D_INTR_GETVAL(x); | 1843 | int val = D_INTR_GETVAL(x); |
1823 | int channel = D_INTR_GETCHAN(x); | 1844 | int channel = D_INTR_GETCHAN(x); |
@@ -1889,7 +1910,7 @@ static void dbri_process_one_interrupt(struct snd_dbri * dbri, int x) | |||
1889 | * right now). Non-zero words require processing and are handed off | 1910 | * right now). Non-zero words require processing and are handed off |
1890 | * to dbri_process_one_interrupt AFTER advancing the pointer. | 1911 | * to dbri_process_one_interrupt AFTER advancing the pointer. |
1891 | */ | 1912 | */ |
1892 | static void dbri_process_interrupt_buffer(struct snd_dbri * dbri) | 1913 | static void dbri_process_interrupt_buffer(struct snd_dbri *dbri) |
1893 | { | 1914 | { |
1894 | s32 x; | 1915 | s32 x; |
1895 | 1916 | ||
@@ -1965,15 +1986,15 @@ static irqreturn_t snd_dbri_interrupt(int irq, void *dev_id) | |||
1965 | PCM Interface | 1986 | PCM Interface |
1966 | ****************************************************************************/ | 1987 | ****************************************************************************/ |
1967 | static struct snd_pcm_hardware snd_dbri_pcm_hw = { | 1988 | static struct snd_pcm_hardware snd_dbri_pcm_hw = { |
1968 | .info = (SNDRV_PCM_INFO_MMAP | | 1989 | .info = (SNDRV_PCM_INFO_MMAP | |
1969 | SNDRV_PCM_INFO_INTERLEAVED | | 1990 | SNDRV_PCM_INFO_INTERLEAVED | |
1970 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 1991 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
1971 | SNDRV_PCM_INFO_MMAP_VALID), | 1992 | SNDRV_PCM_INFO_MMAP_VALID), |
1972 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | 1993 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | |
1973 | SNDRV_PCM_FMTBIT_A_LAW | | 1994 | SNDRV_PCM_FMTBIT_A_LAW | |
1974 | SNDRV_PCM_FMTBIT_U8 | | 1995 | SNDRV_PCM_FMTBIT_U8 | |
1975 | SNDRV_PCM_FMTBIT_S16_BE, | 1996 | SNDRV_PCM_FMTBIT_S16_BE, |
1976 | .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_5512, | 1997 | .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_5512, |
1977 | .rate_min = 5512, | 1998 | .rate_min = 5512, |
1978 | .rate_max = 48000, | 1999 | .rate_max = 48000, |
1979 | .channels_min = 1, | 2000 | .channels_min = 1, |
@@ -2011,7 +2032,8 @@ static int snd_hw_rule_channels(struct snd_pcm_hw_params *params, | |||
2011 | 2032 | ||
2012 | snd_interval_any(&ch); | 2033 | snd_interval_any(&ch); |
2013 | if (!(f->bits[0] & SNDRV_PCM_FMTBIT_S16_BE)) { | 2034 | if (!(f->bits[0] & SNDRV_PCM_FMTBIT_S16_BE)) { |
2014 | ch.min = ch.max = 1; | 2035 | ch.min = 1; |
2036 | ch.max = 1; | ||
2015 | ch.integer = 1; | 2037 | ch.integer = 1; |
2016 | return snd_interval_refine(c, &ch); | 2038 | return snd_interval_refine(c, &ch); |
2017 | } | 2039 | } |
@@ -2035,14 +2057,14 @@ static int snd_dbri_open(struct snd_pcm_substream *substream) | |||
2035 | info->pipe = -1; | 2057 | info->pipe = -1; |
2036 | spin_unlock_irqrestore(&dbri->lock, flags); | 2058 | spin_unlock_irqrestore(&dbri->lock, flags); |
2037 | 2059 | ||
2038 | snd_pcm_hw_rule_add(runtime,0,SNDRV_PCM_HW_PARAM_CHANNELS, | 2060 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, |
2039 | snd_hw_rule_format, NULL, SNDRV_PCM_HW_PARAM_FORMAT, | 2061 | snd_hw_rule_format, NULL, SNDRV_PCM_HW_PARAM_FORMAT, |
2040 | -1); | 2062 | -1); |
2041 | snd_pcm_hw_rule_add(runtime,0,SNDRV_PCM_HW_PARAM_FORMAT, | 2063 | snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_FORMAT, |
2042 | snd_hw_rule_channels, NULL, | 2064 | snd_hw_rule_channels, NULL, |
2043 | SNDRV_PCM_HW_PARAM_CHANNELS, | 2065 | SNDRV_PCM_HW_PARAM_CHANNELS, |
2044 | -1); | 2066 | -1); |
2045 | 2067 | ||
2046 | cs4215_open(dbri); | 2068 | cs4215_open(dbri); |
2047 | 2069 | ||
2048 | return 0; | 2070 | return 0; |
@@ -2145,7 +2167,7 @@ static int snd_dbri_prepare(struct snd_pcm_substream *substream) | |||
2145 | spin_lock_irq(&dbri->lock); | 2167 | spin_lock_irq(&dbri->lock); |
2146 | info->offset = 0; | 2168 | info->offset = 0; |
2147 | 2169 | ||
2148 | /* Setup the all the transmit/receive desciptors to cover the | 2170 | /* Setup the all the transmit/receive descriptors to cover the |
2149 | * whole DMA buffer. | 2171 | * whole DMA buffer. |
2150 | */ | 2172 | */ |
2151 | ret = setup_descs(dbri, DBRI_STREAMNO(substream), | 2173 | ret = setup_descs(dbri, DBRI_STREAMNO(substream), |
@@ -2205,7 +2227,7 @@ static struct snd_pcm_ops snd_dbri_ops = { | |||
2205 | .pointer = snd_dbri_pointer, | 2227 | .pointer = snd_dbri_pointer, |
2206 | }; | 2228 | }; |
2207 | 2229 | ||
2208 | static int __devinit snd_dbri_pcm(struct snd_dbri * dbri) | 2230 | static int __devinit snd_dbri_pcm(struct snd_dbri *dbri) |
2209 | { | 2231 | { |
2210 | struct snd_pcm *pcm; | 2232 | struct snd_pcm *pcm; |
2211 | int err; | 2233 | int err; |
@@ -2228,9 +2250,8 @@ static int __devinit snd_dbri_pcm(struct snd_dbri * dbri) | |||
2228 | if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, | 2250 | if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, |
2229 | SNDRV_DMA_TYPE_CONTINUOUS, | 2251 | SNDRV_DMA_TYPE_CONTINUOUS, |
2230 | snd_dma_continuous_data(GFP_KERNEL), | 2252 | snd_dma_continuous_data(GFP_KERNEL), |
2231 | 64 * 1024, 64 * 1024)) < 0) { | 2253 | 64 * 1024, 64 * 1024)) < 0) |
2232 | return err; | 2254 | return err; |
2233 | } | ||
2234 | 2255 | ||
2235 | return 0; | 2256 | return 0; |
2236 | } | 2257 | } |
@@ -2271,7 +2292,8 @@ static int snd_cs4215_put_volume(struct snd_kcontrol *kcontrol, | |||
2271 | struct snd_ctl_elem_value *ucontrol) | 2292 | struct snd_ctl_elem_value *ucontrol) |
2272 | { | 2293 | { |
2273 | struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); | 2294 | struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol); |
2274 | struct dbri_streaminfo *info = &dbri->stream_info[kcontrol->private_value]; | 2295 | struct dbri_streaminfo *info = |
2296 | &dbri->stream_info[kcontrol->private_value]; | ||
2275 | int changed = 0; | 2297 | int changed = 0; |
2276 | 2298 | ||
2277 | if (info->left_gain != ucontrol->value.integer.value[0]) { | 2299 | if (info->left_gain != ucontrol->value.integer.value[0]) { |
@@ -2316,18 +2338,16 @@ static int snd_cs4215_get_single(struct snd_kcontrol *kcontrol, | |||
2316 | int invert = (kcontrol->private_value >> 24) & 1; | 2338 | int invert = (kcontrol->private_value >> 24) & 1; |
2317 | snd_assert(dbri != NULL, return -EINVAL); | 2339 | snd_assert(dbri != NULL, return -EINVAL); |
2318 | 2340 | ||
2319 | if (elem < 4) { | 2341 | if (elem < 4) |
2320 | ucontrol->value.integer.value[0] = | 2342 | ucontrol->value.integer.value[0] = |
2321 | (dbri->mm.data[elem] >> shift) & mask; | 2343 | (dbri->mm.data[elem] >> shift) & mask; |
2322 | } else { | 2344 | else |
2323 | ucontrol->value.integer.value[0] = | 2345 | ucontrol->value.integer.value[0] = |
2324 | (dbri->mm.ctrl[elem - 4] >> shift) & mask; | 2346 | (dbri->mm.ctrl[elem - 4] >> shift) & mask; |
2325 | } | ||
2326 | 2347 | ||
2327 | if (invert == 1) { | 2348 | if (invert == 1) |
2328 | ucontrol->value.integer.value[0] = | 2349 | ucontrol->value.integer.value[0] = |
2329 | mask - ucontrol->value.integer.value[0]; | 2350 | mask - ucontrol->value.integer.value[0]; |
2330 | } | ||
2331 | return 0; | 2351 | return 0; |
2332 | } | 2352 | } |
2333 | 2353 | ||
@@ -2378,11 +2398,12 @@ static int snd_cs4215_put_single(struct snd_kcontrol *kcontrol, | |||
2378 | timeslots. Shift is the bit offset in the timeslot, mask defines the | 2398 | timeslots. Shift is the bit offset in the timeslot, mask defines the |
2379 | number of bits. invert is a boolean for use with attenuation. | 2399 | number of bits. invert is a boolean for use with attenuation. |
2380 | */ | 2400 | */ |
2381 | #define CS4215_SINGLE(xname, entry, shift, mask, invert) \ | 2401 | #define CS4215_SINGLE(xname, entry, shift, mask, invert) \ |
2382 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | 2402 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
2383 | .info = snd_cs4215_info_single, \ | 2403 | .info = snd_cs4215_info_single, \ |
2384 | .get = snd_cs4215_get_single, .put = snd_cs4215_put_single, \ | 2404 | .get = snd_cs4215_get_single, .put = snd_cs4215_put_single, \ |
2385 | .private_value = entry | (shift << 8) | (mask << 16) | (invert << 24) }, | 2405 | .private_value = (entry) | ((shift) << 8) | ((mask) << 16) | \ |
2406 | ((invert) << 24) }, | ||
2386 | 2407 | ||
2387 | static struct snd_kcontrol_new dbri_controls[] __devinitdata = { | 2408 | static struct snd_kcontrol_new dbri_controls[] __devinitdata = { |
2388 | { | 2409 | { |
@@ -2411,7 +2432,7 @@ static struct snd_kcontrol_new dbri_controls[] __devinitdata = { | |||
2411 | CS4215_SINGLE("Mic boost", 4, 4, 1, 1) | 2432 | CS4215_SINGLE("Mic boost", 4, 4, 1, 1) |
2412 | }; | 2433 | }; |
2413 | 2434 | ||
2414 | static int __init snd_dbri_mixer(struct snd_dbri * dbri) | 2435 | static int __init snd_dbri_mixer(struct snd_dbri *dbri) |
2415 | { | 2436 | { |
2416 | struct snd_card *card; | 2437 | struct snd_card *card; |
2417 | int idx, err; | 2438 | int idx, err; |
@@ -2438,7 +2459,8 @@ static int __init snd_dbri_mixer(struct snd_dbri * dbri) | |||
2438 | /**************************************************************************** | 2459 | /**************************************************************************** |
2439 | /proc interface | 2460 | /proc interface |
2440 | ****************************************************************************/ | 2461 | ****************************************************************************/ |
2441 | static void dbri_regs_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer) | 2462 | static void dbri_regs_read(struct snd_info_entry *entry, |
2463 | struct snd_info_buffer *buffer) | ||
2442 | { | 2464 | { |
2443 | struct snd_dbri *dbri = entry->private_data; | 2465 | struct snd_dbri *dbri = entry->private_data; |
2444 | 2466 | ||
@@ -2449,7 +2471,7 @@ static void dbri_regs_read(struct snd_info_entry * entry, struct snd_info_buffer | |||
2449 | } | 2471 | } |
2450 | 2472 | ||
2451 | #ifdef DBRI_DEBUG | 2473 | #ifdef DBRI_DEBUG |
2452 | static void dbri_debug_read(struct snd_info_entry * entry, | 2474 | static void dbri_debug_read(struct snd_info_entry *entry, |
2453 | struct snd_info_buffer *buffer) | 2475 | struct snd_info_buffer *buffer) |
2454 | { | 2476 | { |
2455 | struct snd_dbri *dbri = entry->private_data; | 2477 | struct snd_dbri *dbri = entry->private_data; |
@@ -2463,7 +2485,8 @@ static void dbri_debug_read(struct snd_info_entry * entry, | |||
2463 | "Pipe %d: %s SDP=0x%x desc=%d, " | 2485 | "Pipe %d: %s SDP=0x%x desc=%d, " |
2464 | "len=%d next %d\n", | 2486 | "len=%d next %d\n", |
2465 | pipe, | 2487 | pipe, |
2466 | ((pptr->sdp & D_SDP_TO_SER) ? "output" : "input"), | 2488 | ((pptr->sdp & D_SDP_TO_SER) ? "output" : |
2489 | "input"), | ||
2467 | pptr->sdp, pptr->desc, | 2490 | pptr->sdp, pptr->desc, |
2468 | pptr->length, pptr->nextpipe); | 2491 | pptr->length, pptr->nextpipe); |
2469 | } | 2492 | } |
@@ -2471,11 +2494,11 @@ static void dbri_debug_read(struct snd_info_entry * entry, | |||
2471 | } | 2494 | } |
2472 | #endif | 2495 | #endif |
2473 | 2496 | ||
2474 | void snd_dbri_proc(struct snd_dbri * dbri) | 2497 | void snd_dbri_proc(struct snd_dbri *dbri) |
2475 | { | 2498 | { |
2476 | struct snd_info_entry *entry; | 2499 | struct snd_info_entry *entry; |
2477 | 2500 | ||
2478 | if (! snd_card_proc_new(dbri->card, "regs", &entry)) | 2501 | if (!snd_card_proc_new(dbri->card, "regs", &entry)) |
2479 | snd_info_set_text_ops(entry, dbri, dbri_regs_read); | 2502 | snd_info_set_text_ops(entry, dbri, dbri_regs_read); |
2480 | 2503 | ||
2481 | #ifdef DBRI_DEBUG | 2504 | #ifdef DBRI_DEBUG |
@@ -2491,7 +2514,7 @@ void snd_dbri_proc(struct snd_dbri * dbri) | |||
2491 | **************************** Initialization ******************************** | 2514 | **************************** Initialization ******************************** |
2492 | **************************************************************************** | 2515 | **************************************************************************** |
2493 | */ | 2516 | */ |
2494 | static void snd_dbri_free(struct snd_dbri * dbri); | 2517 | static void snd_dbri_free(struct snd_dbri *dbri); |
2495 | 2518 | ||
2496 | static int __init snd_dbri_create(struct snd_card *card, | 2519 | static int __init snd_dbri_create(struct snd_card *card, |
2497 | struct sbus_dev *sdev, | 2520 | struct sbus_dev *sdev, |
@@ -2547,7 +2570,7 @@ static int __init snd_dbri_create(struct snd_card *card, | |||
2547 | return 0; | 2570 | return 0; |
2548 | } | 2571 | } |
2549 | 2572 | ||
2550 | static void snd_dbri_free(struct snd_dbri * dbri) | 2573 | static void snd_dbri_free(struct snd_dbri *dbri) |
2551 | { | 2574 | { |
2552 | dprintk(D_GEN, "snd_dbri_free\n"); | 2575 | dprintk(D_GEN, "snd_dbri_free\n"); |
2553 | dbri_reset(dbri); | 2576 | dbri_reset(dbri); |
@@ -2587,7 +2610,8 @@ static int __init dbri_attach(int prom_node, struct sbus_dev *sdev) | |||
2587 | 2610 | ||
2588 | err = prom_getproperty(prom_node, "intr", (char *)&irq, sizeof(irq)); | 2611 | err = prom_getproperty(prom_node, "intr", (char *)&irq, sizeof(irq)); |
2589 | if (err < 0) { | 2612 | if (err < 0) { |
2590 | printk(KERN_ERR "DBRI-%d: Firmware node lacks IRQ property.\n", dev); | 2613 | printk(KERN_ERR "DBRI-%d: Firmware node lacks IRQ property.\n", |
2614 | dev); | ||
2591 | return -ENODEV; | 2615 | return -ENODEV; |
2592 | } | 2616 | } |
2593 | 2617 | ||
@@ -2613,12 +2637,14 @@ static int __init dbri_attach(int prom_node, struct sbus_dev *sdev) | |||
2613 | goto _err; | 2637 | goto _err; |
2614 | 2638 | ||
2615 | if ((err = snd_dbri_mixer(dbri)) < 0) | 2639 | if ((err = snd_dbri_mixer(dbri)) < 0) |
2640 | if ((err = snd_dbri_mixer(dbri)) < 0) | ||
2616 | goto _err; | 2641 | goto _err; |
2617 | 2642 | ||
2618 | /* /proc file handling */ | 2643 | /* /proc file handling */ |
2619 | snd_dbri_proc(dbri); | 2644 | snd_dbri_proc(dbri); |
2620 | 2645 | ||
2621 | if ((err = snd_card_register(card)) < 0) | 2646 | err = snd_card_register(card); |
2647 | if (err < 0) | ||
2622 | goto _err; | 2648 | goto _err; |
2623 | 2649 | ||
2624 | printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n", | 2650 | printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n", |
@@ -2628,7 +2654,7 @@ static int __init dbri_attach(int prom_node, struct sbus_dev *sdev) | |||
2628 | 2654 | ||
2629 | return 0; | 2655 | return 0; |
2630 | 2656 | ||
2631 | _err: | 2657 | _err: |
2632 | snd_dbri_free(dbri); | 2658 | snd_dbri_free(dbri); |
2633 | snd_card_free(card); | 2659 | snd_card_free(card); |
2634 | return err; | 2660 | return err; |