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-rw-r--r--sound/soc/samsung/pcm.c118
1 files changed, 108 insertions, 10 deletions
diff --git a/sound/soc/samsung/pcm.c b/sound/soc/samsung/pcm.c
index 48d0b750406b..38aac7d57a59 100644
--- a/sound/soc/samsung/pcm.c
+++ b/sound/soc/samsung/pcm.c
@@ -11,20 +11,11 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 */ 12 */
13 13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/delay.h>
18#include <linux/clk.h> 14#include <linux/clk.h>
19#include <linux/kernel.h>
20#include <linux/gpio.h>
21#include <linux/io.h> 15#include <linux/io.h>
22 16
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/initval.h>
27#include <sound/soc.h> 17#include <sound/soc.h>
18#include <sound/pcm_params.h>
28 19
29#include <plat/audio.h> 20#include <plat/audio.h>
30#include <plat/dma.h> 21#include <plat/dma.h>
@@ -32,6 +23,113 @@
32#include "dma.h" 23#include "dma.h"
33#include "pcm.h" 24#include "pcm.h"
34 25
26/*Register Offsets */
27#define S3C_PCM_CTL 0x00
28#define S3C_PCM_CLKCTL 0x04
29#define S3C_PCM_TXFIFO 0x08
30#define S3C_PCM_RXFIFO 0x0C
31#define S3C_PCM_IRQCTL 0x10
32#define S3C_PCM_IRQSTAT 0x14
33#define S3C_PCM_FIFOSTAT 0x18
34#define S3C_PCM_CLRINT 0x20
35
36/* PCM_CTL Bit-Fields */
37#define S3C_PCM_CTL_TXDIPSTICK_MASK 0x3f
38#define S3C_PCM_CTL_TXDIPSTICK_SHIFT 13
39#define S3C_PCM_CTL_RXDIPSTICK_MASK 0x3f
40#define S3C_PCM_CTL_RXDIPSTICK_SHIFT 7
41#define S3C_PCM_CTL_TXDMA_EN (0x1 << 6)
42#define S3C_PCM_CTL_RXDMA_EN (0x1 << 5)
43#define S3C_PCM_CTL_TXMSB_AFTER_FSYNC (0x1 << 4)
44#define S3C_PCM_CTL_RXMSB_AFTER_FSYNC (0x1 << 3)
45#define S3C_PCM_CTL_TXFIFO_EN (0x1 << 2)
46#define S3C_PCM_CTL_RXFIFO_EN (0x1 << 1)
47#define S3C_PCM_CTL_ENABLE (0x1 << 0)
48
49/* PCM_CLKCTL Bit-Fields */
50#define S3C_PCM_CLKCTL_SERCLK_EN (0x1 << 19)
51#define S3C_PCM_CLKCTL_SERCLKSEL_PCLK (0x1 << 18)
52#define S3C_PCM_CLKCTL_SCLKDIV_MASK 0x1ff
53#define S3C_PCM_CLKCTL_SYNCDIV_MASK 0x1ff
54#define S3C_PCM_CLKCTL_SCLKDIV_SHIFT 9
55#define S3C_PCM_CLKCTL_SYNCDIV_SHIFT 0
56
57/* PCM_TXFIFO Bit-Fields */
58#define S3C_PCM_TXFIFO_DVALID (0x1 << 16)
59#define S3C_PCM_TXFIFO_DATA_MSK (0xffff << 0)
60
61/* PCM_RXFIFO Bit-Fields */
62#define S3C_PCM_RXFIFO_DVALID (0x1 << 16)
63#define S3C_PCM_RXFIFO_DATA_MSK (0xffff << 0)
64
65/* PCM_IRQCTL Bit-Fields */
66#define S3C_PCM_IRQCTL_IRQEN (0x1 << 14)
67#define S3C_PCM_IRQCTL_WRDEN (0x1 << 12)
68#define S3C_PCM_IRQCTL_TXEMPTYEN (0x1 << 11)
69#define S3C_PCM_IRQCTL_TXALMSTEMPTYEN (0x1 << 10)
70#define S3C_PCM_IRQCTL_TXFULLEN (0x1 << 9)
71#define S3C_PCM_IRQCTL_TXALMSTFULLEN (0x1 << 8)
72#define S3C_PCM_IRQCTL_TXSTARVEN (0x1 << 7)
73#define S3C_PCM_IRQCTL_TXERROVRFLEN (0x1 << 6)
74#define S3C_PCM_IRQCTL_RXEMPTEN (0x1 << 5)
75#define S3C_PCM_IRQCTL_RXALMSTEMPTEN (0x1 << 4)
76#define S3C_PCM_IRQCTL_RXFULLEN (0x1 << 3)
77#define S3C_PCM_IRQCTL_RXALMSTFULLEN (0x1 << 2)
78#define S3C_PCM_IRQCTL_RXSTARVEN (0x1 << 1)
79#define S3C_PCM_IRQCTL_RXERROVRFLEN (0x1 << 0)
80
81/* PCM_IRQSTAT Bit-Fields */
82#define S3C_PCM_IRQSTAT_IRQPND (0x1 << 13)
83#define S3C_PCM_IRQSTAT_WRD_XFER (0x1 << 12)
84#define S3C_PCM_IRQSTAT_TXEMPTY (0x1 << 11)
85#define S3C_PCM_IRQSTAT_TXALMSTEMPTY (0x1 << 10)
86#define S3C_PCM_IRQSTAT_TXFULL (0x1 << 9)
87#define S3C_PCM_IRQSTAT_TXALMSTFULL (0x1 << 8)
88#define S3C_PCM_IRQSTAT_TXSTARV (0x1 << 7)
89#define S3C_PCM_IRQSTAT_TXERROVRFL (0x1 << 6)
90#define S3C_PCM_IRQSTAT_RXEMPT (0x1 << 5)
91#define S3C_PCM_IRQSTAT_RXALMSTEMPT (0x1 << 4)
92#define S3C_PCM_IRQSTAT_RXFULL (0x1 << 3)
93#define S3C_PCM_IRQSTAT_RXALMSTFULL (0x1 << 2)
94#define S3C_PCM_IRQSTAT_RXSTARV (0x1 << 1)
95#define S3C_PCM_IRQSTAT_RXERROVRFL (0x1 << 0)
96
97/* PCM_FIFOSTAT Bit-Fields */
98#define S3C_PCM_FIFOSTAT_TXCNT_MSK (0x3f << 14)
99#define S3C_PCM_FIFOSTAT_TXFIFOEMPTY (0x1 << 13)
100#define S3C_PCM_FIFOSTAT_TXFIFOALMSTEMPTY (0x1 << 12)
101#define S3C_PCM_FIFOSTAT_TXFIFOFULL (0x1 << 11)
102#define S3C_PCM_FIFOSTAT_TXFIFOALMSTFULL (0x1 << 10)
103#define S3C_PCM_FIFOSTAT_RXCNT_MSK (0x3f << 4)
104#define S3C_PCM_FIFOSTAT_RXFIFOEMPTY (0x1 << 3)
105#define S3C_PCM_FIFOSTAT_RXFIFOALMSTEMPTY (0x1 << 2)
106#define S3C_PCM_FIFOSTAT_RXFIFOFULL (0x1 << 1)
107#define S3C_PCM_FIFOSTAT_RXFIFOALMSTFULL (0x1 << 0)
108
109/**
110 * struct s3c_pcm_info - S3C PCM Controller information
111 * @dev: The parent device passed to use from the probe.
112 * @regs: The pointer to the device register block.
113 * @dma_playback: DMA information for playback channel.
114 * @dma_capture: DMA information for capture channel.
115 */
116struct s3c_pcm_info {
117 spinlock_t lock;
118 struct device *dev;
119 void __iomem *regs;
120
121 unsigned int sclk_per_fs;
122
123 /* Whether to keep PCMSCLK enabled even when idle(no active xfer) */
124 unsigned int idleclk;
125
126 struct clk *pclk;
127 struct clk *cclk;
128
129 struct s3c_dma_params *dma_playback;
130 struct s3c_dma_params *dma_capture;
131};
132
35static struct s3c2410_dma_client s3c_pcm_dma_client_out = { 133static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
36 .name = "PCM Stereo out" 134 .name = "PCM Stereo out"
37}; 135};