diff options
Diffstat (limited to 'sound/soc/omap')
-rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 2952fb046ed6..0199e95a5d63 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c | |||
@@ -331,7 +331,8 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, | |||
331 | 331 | ||
332 | format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK; | 332 | format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
333 | wpf = channels = params_channels(params); | 333 | wpf = channels = params_channels(params); |
334 | if (channels == 2 && format == SND_SOC_DAIFMT_I2S) { | 334 | if (channels == 2 && (format == SND_SOC_DAIFMT_I2S || |
335 | format == SND_SOC_DAIFMT_LEFT_J)) { | ||
335 | /* Use dual-phase frames */ | 336 | /* Use dual-phase frames */ |
336 | regs->rcr2 |= RPHASE; | 337 | regs->rcr2 |= RPHASE; |
337 | regs->xcr2 |= XPHASE; | 338 | regs->xcr2 |= XPHASE; |
@@ -376,6 +377,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, | |||
376 | /* Set FS period and length in terms of bit clock periods */ | 377 | /* Set FS period and length in terms of bit clock periods */ |
377 | switch (format) { | 378 | switch (format) { |
378 | case SND_SOC_DAIFMT_I2S: | 379 | case SND_SOC_DAIFMT_I2S: |
380 | case SND_SOC_DAIFMT_LEFT_J: | ||
379 | regs->srgr2 |= FPER(framesize - 1); | 381 | regs->srgr2 |= FPER(framesize - 1); |
380 | regs->srgr1 |= FWID((framesize >> 1) - 1); | 382 | regs->srgr1 |= FWID((framesize >> 1) - 1); |
381 | break; | 383 | break; |
@@ -427,6 +429,14 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
427 | regs->rcr2 |= RDATDLY(1); | 429 | regs->rcr2 |= RDATDLY(1); |
428 | regs->xcr2 |= XDATDLY(1); | 430 | regs->xcr2 |= XDATDLY(1); |
429 | break; | 431 | break; |
432 | case SND_SOC_DAIFMT_LEFT_J: | ||
433 | /* 0-bit data delay */ | ||
434 | regs->rcr2 |= RDATDLY(0); | ||
435 | regs->xcr2 |= XDATDLY(0); | ||
436 | regs->spcr1 |= RJUST(2); | ||
437 | /* Invert FS polarity configuration */ | ||
438 | temp_fmt ^= SND_SOC_DAIFMT_NB_IF; | ||
439 | break; | ||
430 | case SND_SOC_DAIFMT_DSP_A: | 440 | case SND_SOC_DAIFMT_DSP_A: |
431 | /* 1-bit data delay */ | 441 | /* 1-bit data delay */ |
432 | regs->rcr2 |= RDATDLY(1); | 442 | regs->rcr2 |= RDATDLY(1); |