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path: root/sound/soc/omap/omap-mcbsp.c
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Diffstat (limited to 'sound/soc/omap/omap-mcbsp.c')
-rw-r--r--sound/soc/omap/omap-mcbsp.c53
1 files changed, 34 insertions, 19 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 912614283848..6a837ffd5d0b 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -183,21 +183,21 @@ static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd,
183 struct snd_soc_pcm_runtime *rtd = substream->private_data; 183 struct snd_soc_pcm_runtime *rtd = substream->private_data;
184 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; 184 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
185 struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); 185 struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
186 int err = 0; 186 int err = 0, play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
187 187
188 switch (cmd) { 188 switch (cmd) {
189 case SNDRV_PCM_TRIGGER_START: 189 case SNDRV_PCM_TRIGGER_START:
190 case SNDRV_PCM_TRIGGER_RESUME: 190 case SNDRV_PCM_TRIGGER_RESUME:
191 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 191 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
192 if (!mcbsp_data->active++) 192 mcbsp_data->active++;
193 omap_mcbsp_start(mcbsp_data->bus_id); 193 omap_mcbsp_start(mcbsp_data->bus_id, play, !play);
194 break; 194 break;
195 195
196 case SNDRV_PCM_TRIGGER_STOP: 196 case SNDRV_PCM_TRIGGER_STOP:
197 case SNDRV_PCM_TRIGGER_SUSPEND: 197 case SNDRV_PCM_TRIGGER_SUSPEND:
198 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 198 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
199 if (!--mcbsp_data->active) 199 omap_mcbsp_stop(mcbsp_data->bus_id, play, !play);
200 omap_mcbsp_stop(mcbsp_data->bus_id); 200 mcbsp_data->active--;
201 break; 201 break;
202 default: 202 default:
203 err = -EINVAL; 203 err = -EINVAL;
@@ -215,8 +215,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
215 struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); 215 struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
216 struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; 216 struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
217 int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id; 217 int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id;
218 int wlen, channels; 218 int wlen, channels, wpf;
219 unsigned long port; 219 unsigned long port;
220 unsigned int format;
220 221
221 if (cpu_class_is_omap1()) { 222 if (cpu_class_is_omap1()) {
222 dma = omap1_dma_reqs[bus_id][substream->stream]; 223 dma = omap1_dma_reqs[bus_id][substream->stream];
@@ -244,18 +245,24 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
244 return 0; 245 return 0;
245 } 246 }
246 247
247 channels = params_channels(params); 248 format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
249 wpf = channels = params_channels(params);
248 switch (channels) { 250 switch (channels) {
249 case 2: 251 case 2:
250 /* Use dual-phase frames */ 252 if (format == SND_SOC_DAIFMT_I2S) {
251 regs->rcr2 |= RPHASE; 253 /* Use dual-phase frames */
252 regs->xcr2 |= XPHASE; 254 regs->rcr2 |= RPHASE;
255 regs->xcr2 |= XPHASE;
256 /* Set 1 word per (McBSP) frame for phase1 and phase2 */
257 wpf--;
258 regs->rcr2 |= RFRLEN2(wpf - 1);
259 regs->xcr2 |= XFRLEN2(wpf - 1);
260 }
253 case 1: 261 case 1:
254 /* Set 1 word per (McBSP) frame */ 262 case 4:
255 regs->rcr2 |= RFRLEN2(1 - 1); 263 /* Set word per (McBSP) frame for phase1 */
256 regs->rcr1 |= RFRLEN1(1 - 1); 264 regs->rcr1 |= RFRLEN1(wpf - 1);
257 regs->xcr2 |= XFRLEN2(1 - 1); 265 regs->xcr1 |= XFRLEN1(wpf - 1);
258 regs->xcr1 |= XFRLEN1(1 - 1);
259 break; 266 break;
260 default: 267 default:
261 /* Unsupported number of channels */ 268 /* Unsupported number of channels */
@@ -277,11 +284,12 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
277 } 284 }
278 285
279 /* Set FS period and length in terms of bit clock periods */ 286 /* Set FS period and length in terms of bit clock periods */
280 switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 287 switch (format) {
281 case SND_SOC_DAIFMT_I2S: 288 case SND_SOC_DAIFMT_I2S:
282 regs->srgr2 |= FPER(wlen * 2 - 1); 289 regs->srgr2 |= FPER(wlen * channels - 1);
283 regs->srgr1 |= FWID(wlen - 1); 290 regs->srgr1 |= FWID(wlen - 1);
284 break; 291 break;
292 case SND_SOC_DAIFMT_DSP_A:
285 case SND_SOC_DAIFMT_DSP_B: 293 case SND_SOC_DAIFMT_DSP_B:
286 regs->srgr2 |= FPER(wlen * channels - 1); 294 regs->srgr2 |= FPER(wlen * channels - 1);
287 regs->srgr1 |= FWID(0); 295 regs->srgr1 |= FWID(0);
@@ -326,6 +334,13 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
326 regs->rcr2 |= RDATDLY(1); 334 regs->rcr2 |= RDATDLY(1);
327 regs->xcr2 |= XDATDLY(1); 335 regs->xcr2 |= XDATDLY(1);
328 break; 336 break;
337 case SND_SOC_DAIFMT_DSP_A:
338 /* 1-bit data delay */
339 regs->rcr2 |= RDATDLY(1);
340 regs->xcr2 |= XDATDLY(1);
341 /* Invert FS polarity configuration */
342 temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
343 break;
329 case SND_SOC_DAIFMT_DSP_B: 344 case SND_SOC_DAIFMT_DSP_B:
330 /* 0-bit data delay */ 345 /* 0-bit data delay */
331 regs->rcr2 |= RDATDLY(0); 346 regs->rcr2 |= RDATDLY(0);
@@ -492,13 +507,13 @@ static struct snd_soc_dai_ops omap_mcbsp_dai_ops = {
492 .id = (link_id), \ 507 .id = (link_id), \
493 .playback = { \ 508 .playback = { \
494 .channels_min = 1, \ 509 .channels_min = 1, \
495 .channels_max = 2, \ 510 .channels_max = 4, \
496 .rates = OMAP_MCBSP_RATES, \ 511 .rates = OMAP_MCBSP_RATES, \
497 .formats = SNDRV_PCM_FMTBIT_S16_LE, \ 512 .formats = SNDRV_PCM_FMTBIT_S16_LE, \
498 }, \ 513 }, \
499 .capture = { \ 514 .capture = { \
500 .channels_min = 1, \ 515 .channels_min = 1, \
501 .channels_max = 2, \ 516 .channels_max = 4, \
502 .rates = OMAP_MCBSP_RATES, \ 517 .rates = OMAP_MCBSP_RATES, \
503 .formats = SNDRV_PCM_FMTBIT_S16_LE, \ 518 .formats = SNDRV_PCM_FMTBIT_S16_LE, \
504 }, \ 519 }, \