diff options
Diffstat (limited to 'sound/soc/omap/omap-mcbsp.c')
-rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 126 |
1 files changed, 4 insertions, 122 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index d203f4da18a0..2175f09e57b6 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c | |||
@@ -69,110 +69,6 @@ static struct omap_mcbsp_data mcbsp_data[NUM_LINKS]; | |||
69 | */ | 69 | */ |
70 | static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2]; | 70 | static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2]; |
71 | 71 | ||
72 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) | ||
73 | static const int omap1_dma_reqs[][2] = { | ||
74 | { OMAP_DMA_MCBSP1_TX, OMAP_DMA_MCBSP1_RX }, | ||
75 | { OMAP_DMA_MCBSP2_TX, OMAP_DMA_MCBSP2_RX }, | ||
76 | { OMAP_DMA_MCBSP3_TX, OMAP_DMA_MCBSP3_RX }, | ||
77 | }; | ||
78 | static const unsigned long omap1_mcbsp_port[][2] = { | ||
79 | { OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, | ||
80 | OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, | ||
81 | { OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, | ||
82 | OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, | ||
83 | { OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DXR1, | ||
84 | OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DRR1 }, | ||
85 | }; | ||
86 | #else | ||
87 | static const int omap1_dma_reqs[][2] = {}; | ||
88 | static const unsigned long omap1_mcbsp_port[][2] = {}; | ||
89 | #endif | ||
90 | |||
91 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | ||
92 | static const int omap24xx_dma_reqs[][2] = { | ||
93 | { OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX }, | ||
94 | { OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX }, | ||
95 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | ||
96 | { OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX }, | ||
97 | { OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX }, | ||
98 | { OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX }, | ||
99 | #endif | ||
100 | }; | ||
101 | #else | ||
102 | static const int omap24xx_dma_reqs[][2] = {}; | ||
103 | #endif | ||
104 | |||
105 | #if defined(CONFIG_ARCH_OMAP4) | ||
106 | static const int omap44xx_dma_reqs[][2] = { | ||
107 | { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX }, | ||
108 | { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX }, | ||
109 | { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX }, | ||
110 | { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX }, | ||
111 | }; | ||
112 | #else | ||
113 | static const int omap44xx_dma_reqs[][2] = {}; | ||
114 | #endif | ||
115 | |||
116 | #if defined(CONFIG_ARCH_OMAP2420) | ||
117 | static const unsigned long omap2420_mcbsp_port[][2] = { | ||
118 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, | ||
119 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, | ||
120 | { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, | ||
121 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, | ||
122 | }; | ||
123 | #else | ||
124 | static const unsigned long omap2420_mcbsp_port[][2] = {}; | ||
125 | #endif | ||
126 | |||
127 | #if defined(CONFIG_ARCH_OMAP2430) | ||
128 | static const unsigned long omap2430_mcbsp_port[][2] = { | ||
129 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
130 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
131 | { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
132 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
133 | { OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
134 | OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
135 | { OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
136 | OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
137 | { OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, | ||
138 | OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, | ||
139 | }; | ||
140 | #else | ||
141 | static const unsigned long omap2430_mcbsp_port[][2] = {}; | ||
142 | #endif | ||
143 | |||
144 | #if defined(CONFIG_ARCH_OMAP3) | ||
145 | static const unsigned long omap34xx_mcbsp_port[][2] = { | ||
146 | { OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
147 | OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
148 | { OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
149 | OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
150 | { OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
151 | OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
152 | { OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
153 | OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
154 | { OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, | ||
155 | OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, | ||
156 | }; | ||
157 | #else | ||
158 | static const unsigned long omap34xx_mcbsp_port[][2] = {}; | ||
159 | #endif | ||
160 | |||
161 | #if defined(CONFIG_ARCH_OMAP4) | ||
162 | static const unsigned long omap44xx_mcbsp_port[][2] = { | ||
163 | { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
164 | OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
165 | { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
166 | OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
167 | { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
168 | OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
169 | { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
170 | OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
171 | }; | ||
172 | #else | ||
173 | static const unsigned long omap44xx_mcbsp_port[][2] = {}; | ||
174 | #endif | ||
175 | |||
176 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) | 72 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) |
177 | { | 73 | { |
178 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 74 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
@@ -346,24 +242,10 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, | |||
346 | unsigned int format, div, framesize, master; | 242 | unsigned int format, div, framesize, master; |
347 | 243 | ||
348 | dma_data = &omap_mcbsp_dai_dma_params[cpu_dai->id][substream->stream]; | 244 | dma_data = &omap_mcbsp_dai_dma_params[cpu_dai->id][substream->stream]; |
349 | if (cpu_class_is_omap1()) { | 245 | |
350 | dma = omap1_dma_reqs[bus_id][substream->stream]; | 246 | dma = omap_mcbsp_dma_ch_params(bus_id, substream->stream); |
351 | port = omap1_mcbsp_port[bus_id][substream->stream]; | 247 | port = omap_mcbsp_dma_reg_params(bus_id, substream->stream); |
352 | } else if (cpu_is_omap2420()) { | 248 | |
353 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | ||
354 | port = omap2420_mcbsp_port[bus_id][substream->stream]; | ||
355 | } else if (cpu_is_omap2430()) { | ||
356 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | ||
357 | port = omap2430_mcbsp_port[bus_id][substream->stream]; | ||
358 | } else if (cpu_is_omap343x()) { | ||
359 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | ||
360 | port = omap34xx_mcbsp_port[bus_id][substream->stream]; | ||
361 | } else if (cpu_is_omap44xx()) { | ||
362 | dma = omap44xx_dma_reqs[bus_id][substream->stream]; | ||
363 | port = omap44xx_mcbsp_port[bus_id][substream->stream]; | ||
364 | } else { | ||
365 | return -ENODEV; | ||
366 | } | ||
367 | switch (params_format(params)) { | 249 | switch (params_format(params)) { |
368 | case SNDRV_PCM_FORMAT_S16_LE: | 250 | case SNDRV_PCM_FORMAT_S16_LE: |
369 | dma_data->data_type = OMAP_DMA_DATA_TYPE_S16; | 251 | dma_data->data_type = OMAP_DMA_DATA_TYPE_S16; |