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-rw-r--r--sound/soc/omap/mcpdm.c548
1 files changed, 274 insertions, 274 deletions
diff --git a/sound/soc/omap/mcpdm.c b/sound/soc/omap/mcpdm.c
index 1dab4c14874d..90b8bf71c893 100644
--- a/sound/soc/omap/mcpdm.c
+++ b/sound/soc/omap/mcpdm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * mcpdm.c -- McPDM interface driver 2 * mcpdm.c -- McPDM interface driver
3 * 3 *
4 * Author: Jorge Eduardo Candelaria <x0107209@ti.com> 4 * Author: Jorge Eduardo Candelaria <x0107209@ti.com>
5 * Copyright (C) 2009 - Texas Instruments, Inc. 5 * Copyright (C) 2009 - Texas Instruments, Inc.
@@ -39,46 +39,46 @@ static struct omap_mcpdm *mcpdm;
39 39
40static inline void omap_mcpdm_write(u16 reg, u32 val) 40static inline void omap_mcpdm_write(u16 reg, u32 val)
41{ 41{
42 __raw_writel(val, mcpdm->io_base + reg); 42 __raw_writel(val, mcpdm->io_base + reg);
43} 43}
44 44
45static inline int omap_mcpdm_read(u16 reg) 45static inline int omap_mcpdm_read(u16 reg)
46{ 46{
47 return __raw_readl(mcpdm->io_base + reg); 47 return __raw_readl(mcpdm->io_base + reg);
48} 48}
49 49
50static void omap_mcpdm_reg_dump(void) 50static void omap_mcpdm_reg_dump(void)
51{ 51{
52 dev_dbg(mcpdm->dev, "***********************\n"); 52 dev_dbg(mcpdm->dev, "***********************\n");
53 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", 53 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
54 omap_mcpdm_read(MCPDM_IRQSTATUS_RAW)); 54 omap_mcpdm_read(MCPDM_IRQSTATUS_RAW));
55 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n", 55 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
56 omap_mcpdm_read(MCPDM_IRQSTATUS)); 56 omap_mcpdm_read(MCPDM_IRQSTATUS));
57 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n", 57 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
58 omap_mcpdm_read(MCPDM_IRQENABLE_SET)); 58 omap_mcpdm_read(MCPDM_IRQENABLE_SET));
59 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n", 59 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
60 omap_mcpdm_read(MCPDM_IRQENABLE_CLR)); 60 omap_mcpdm_read(MCPDM_IRQENABLE_CLR));
61 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n", 61 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
62 omap_mcpdm_read(MCPDM_IRQWAKE_EN)); 62 omap_mcpdm_read(MCPDM_IRQWAKE_EN));
63 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n", 63 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
64 omap_mcpdm_read(MCPDM_DMAENABLE_SET)); 64 omap_mcpdm_read(MCPDM_DMAENABLE_SET));
65 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n", 65 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
66 omap_mcpdm_read(MCPDM_DMAENABLE_CLR)); 66 omap_mcpdm_read(MCPDM_DMAENABLE_CLR));
67 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n", 67 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
68 omap_mcpdm_read(MCPDM_DMAWAKEEN)); 68 omap_mcpdm_read(MCPDM_DMAWAKEEN));
69 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n", 69 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
70 omap_mcpdm_read(MCPDM_CTRL)); 70 omap_mcpdm_read(MCPDM_CTRL));
71 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n", 71 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
72 omap_mcpdm_read(MCPDM_DN_DATA)); 72 omap_mcpdm_read(MCPDM_DN_DATA));
73 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n", 73 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
74 omap_mcpdm_read(MCPDM_UP_DATA)); 74 omap_mcpdm_read(MCPDM_UP_DATA));
75 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n", 75 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
76 omap_mcpdm_read(MCPDM_FIFO_CTRL_DN)); 76 omap_mcpdm_read(MCPDM_FIFO_CTRL_DN));
77 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n", 77 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
78 omap_mcpdm_read(MCPDM_FIFO_CTRL_UP)); 78 omap_mcpdm_read(MCPDM_FIFO_CTRL_UP));
79 dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n", 79 dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n",
80 omap_mcpdm_read(MCPDM_DN_OFFSET)); 80 omap_mcpdm_read(MCPDM_DN_OFFSET));
81 dev_dbg(mcpdm->dev, "***********************\n"); 81 dev_dbg(mcpdm->dev, "***********************\n");
82} 82}
83 83
84/* 84/*
@@ -87,26 +87,26 @@ static void omap_mcpdm_reg_dump(void)
87 */ 87 */
88static void omap_mcpdm_reset_capture(int reset) 88static void omap_mcpdm_reset_capture(int reset)
89{ 89{
90 int ctrl = omap_mcpdm_read(MCPDM_CTRL); 90 int ctrl = omap_mcpdm_read(MCPDM_CTRL);
91 91
92 if (reset) 92 if (reset)
93 ctrl |= SW_UP_RST; 93 ctrl |= SW_UP_RST;
94 else 94 else
95 ctrl &= ~SW_UP_RST; 95 ctrl &= ~SW_UP_RST;
96 96
97 omap_mcpdm_write(MCPDM_CTRL, ctrl); 97 omap_mcpdm_write(MCPDM_CTRL, ctrl);
98} 98}
99 99
100static void omap_mcpdm_reset_playback(int reset) 100static void omap_mcpdm_reset_playback(int reset)
101{ 101{
102 int ctrl = omap_mcpdm_read(MCPDM_CTRL); 102 int ctrl = omap_mcpdm_read(MCPDM_CTRL);
103 103
104 if (reset) 104 if (reset)
105 ctrl |= SW_DN_RST; 105 ctrl |= SW_DN_RST;
106 else 106 else
107 ctrl &= ~SW_DN_RST; 107 ctrl &= ~SW_DN_RST;
108 108
109 omap_mcpdm_write(MCPDM_CTRL, ctrl); 109 omap_mcpdm_write(MCPDM_CTRL, ctrl);
110} 110}
111 111
112/* 112/*
@@ -115,14 +115,14 @@ static void omap_mcpdm_reset_playback(int reset)
115 */ 115 */
116void omap_mcpdm_start(int stream) 116void omap_mcpdm_start(int stream)
117{ 117{
118 int ctrl = omap_mcpdm_read(MCPDM_CTRL); 118 int ctrl = omap_mcpdm_read(MCPDM_CTRL);
119 119
120 if (stream) 120 if (stream)
121 ctrl |= mcpdm->up_channels; 121 ctrl |= mcpdm->up_channels;
122 else 122 else
123 ctrl |= mcpdm->dn_channels; 123 ctrl |= mcpdm->dn_channels;
124 124
125 omap_mcpdm_write(MCPDM_CTRL, ctrl); 125 omap_mcpdm_write(MCPDM_CTRL, ctrl);
126} 126}
127 127
128/* 128/*
@@ -131,14 +131,14 @@ void omap_mcpdm_start(int stream)
131 */ 131 */
132void omap_mcpdm_stop(int stream) 132void omap_mcpdm_stop(int stream)
133{ 133{
134 int ctrl = omap_mcpdm_read(MCPDM_CTRL); 134 int ctrl = omap_mcpdm_read(MCPDM_CTRL);
135 135
136 if (stream) 136 if (stream)
137 ctrl &= ~mcpdm->up_channels; 137 ctrl &= ~mcpdm->up_channels;
138 else 138 else
139 ctrl &= ~mcpdm->dn_channels; 139 ctrl &= ~mcpdm->dn_channels;
140 140
141 omap_mcpdm_write(MCPDM_CTRL, ctrl); 141 omap_mcpdm_write(MCPDM_CTRL, ctrl);
142} 142}
143 143
144/* 144/*
@@ -147,38 +147,38 @@ void omap_mcpdm_stop(int stream)
147 */ 147 */
148int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink) 148int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
149{ 149{
150 int irq_mask = 0; 150 int irq_mask = 0;
151 int ctrl; 151 int ctrl;
152 152
153 if (!uplink) 153 if (!uplink)
154 return -EINVAL; 154 return -EINVAL;
155 155
156 mcpdm->uplink = uplink; 156 mcpdm->uplink = uplink;
157 157
158 /* Enable irq request generation */ 158 /* Enable irq request generation */
159 irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; 159 irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
160 omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); 160 omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
161 161
162 /* Configure uplink threshold */ 162 /* Configure uplink threshold */
163 if (uplink->threshold > UP_THRES_MAX) 163 if (uplink->threshold > UP_THRES_MAX)
164 uplink->threshold = UP_THRES_MAX; 164 uplink->threshold = UP_THRES_MAX;
165 165
166 omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold); 166 omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold);
167 167
168 /* Configure DMA controller */ 168 /* Configure DMA controller */
169 omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE); 169 omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE);
170 170
171 /* Set pdm out format */ 171 /* Set pdm out format */
172 ctrl = omap_mcpdm_read(MCPDM_CTRL); 172 ctrl = omap_mcpdm_read(MCPDM_CTRL);
173 ctrl &= ~PDMOUTFORMAT; 173 ctrl &= ~PDMOUTFORMAT;
174 ctrl |= uplink->format & PDMOUTFORMAT; 174 ctrl |= uplink->format & PDMOUTFORMAT;
175 175
176 /* Uplink channels */ 176 /* Uplink channels */
177 mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK); 177 mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK);
178 178
179 omap_mcpdm_write(MCPDM_CTRL, ctrl); 179 omap_mcpdm_write(MCPDM_CTRL, ctrl);
180 180
181 return 0; 181 return 0;
182} 182}
183 183
184/* 184/*
@@ -187,38 +187,38 @@ int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
187 */ 187 */
188int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink) 188int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
189{ 189{
190 int irq_mask = 0; 190 int irq_mask = 0;
191 int ctrl; 191 int ctrl;
192 192
193 if (!downlink) 193 if (!downlink)
194 return -EINVAL; 194 return -EINVAL;
195 195
196 mcpdm->downlink = downlink; 196 mcpdm->downlink = downlink;
197 197
198 /* Enable irq request generation */ 198 /* Enable irq request generation */
199 irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; 199 irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
200 omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); 200 omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
201 201
202 /* Configure uplink threshold */ 202 /* Configure uplink threshold */
203 if (downlink->threshold > DN_THRES_MAX) 203 if (downlink->threshold > DN_THRES_MAX)
204 downlink->threshold = DN_THRES_MAX; 204 downlink->threshold = DN_THRES_MAX;
205 205
206 omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold); 206 omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold);
207 207
208 /* Enable DMA request generation */ 208 /* Enable DMA request generation */
209 omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE); 209 omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE);
210 210
211 /* Set pdm out format */ 211 /* Set pdm out format */
212 ctrl = omap_mcpdm_read(MCPDM_CTRL); 212 ctrl = omap_mcpdm_read(MCPDM_CTRL);
213 ctrl &= ~PDMOUTFORMAT; 213 ctrl &= ~PDMOUTFORMAT;
214 ctrl |= downlink->format & PDMOUTFORMAT; 214 ctrl |= downlink->format & PDMOUTFORMAT;
215 215
216 /* Downlink channels */ 216 /* Downlink channels */
217 mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK); 217 mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK);
218 218
219 omap_mcpdm_write(MCPDM_CTRL, ctrl); 219 omap_mcpdm_write(MCPDM_CTRL, ctrl);
220 220
221 return 0; 221 return 0;
222} 222}
223 223
224/* 224/*
@@ -227,24 +227,24 @@ int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
227 */ 227 */
228int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink) 228int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
229{ 229{
230 int irq_mask = 0; 230 int irq_mask = 0;
231 231
232 if (!uplink) 232 if (!uplink)
233 return -EINVAL; 233 return -EINVAL;
234 234
235 /* Disable irq request generation */ 235 /* Disable irq request generation */
236 irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; 236 irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
237 omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); 237 omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
238 238
239 /* Disable DMA request generation */ 239 /* Disable DMA request generation */
240 omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE); 240 omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE);
241 241
242 /* Clear Downlink channels */ 242 /* Clear Downlink channels */
243 mcpdm->up_channels = 0; 243 mcpdm->up_channels = 0;
244 244
245 mcpdm->uplink = NULL; 245 mcpdm->uplink = NULL;
246 246
247 return 0; 247 return 0;
248} 248}
249 249
250/* 250/*
@@ -253,124 +253,124 @@ int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
253 */ 253 */
254int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink) 254int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink)
255{ 255{
256 int irq_mask = 0; 256 int irq_mask = 0;
257 257
258 if (!downlink) 258 if (!downlink)
259 return -EINVAL; 259 return -EINVAL;
260 260
261 /* Disable irq request generation */ 261 /* Disable irq request generation */
262 irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; 262 irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
263 omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); 263 omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
264 264
265 /* Disable DMA request generation */ 265 /* Disable DMA request generation */
266 omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE); 266 omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE);
267 267
268 /* clear Downlink channels */ 268 /* clear Downlink channels */
269 mcpdm->dn_channels = 0; 269 mcpdm->dn_channels = 0;
270 270
271 mcpdm->downlink = NULL; 271 mcpdm->downlink = NULL;
272 272
273 return 0; 273 return 0;
274} 274}
275 275
276static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id) 276static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
277{ 277{
278 struct omap_mcpdm *mcpdm_irq = dev_id; 278 struct omap_mcpdm *mcpdm_irq = dev_id;
279 int irq_status; 279 int irq_status;
280 280
281 irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS); 281 irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS);
282 282
283 /* Acknowledge irq event */ 283 /* Acknowledge irq event */
284 omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status); 284 omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status);
285 285
286 if (irq & MCPDM_DN_IRQ_FULL) { 286 if (irq & MCPDM_DN_IRQ_FULL) {
287 dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); 287 dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
288 omap_mcpdm_reset_playback(1); 288 omap_mcpdm_reset_playback(1);
289 omap_mcpdm_playback_open(mcpdm_irq->downlink); 289 omap_mcpdm_playback_open(mcpdm_irq->downlink);
290 omap_mcpdm_reset_playback(0); 290 omap_mcpdm_reset_playback(0);
291 } 291 }
292 292
293 if (irq & MCPDM_DN_IRQ_EMPTY) { 293 if (irq & MCPDM_DN_IRQ_EMPTY) {
294 dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); 294 dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
295 omap_mcpdm_reset_playback(1); 295 omap_mcpdm_reset_playback(1);
296 omap_mcpdm_playback_open(mcpdm_irq->downlink); 296 omap_mcpdm_playback_open(mcpdm_irq->downlink);
297 omap_mcpdm_reset_playback(0); 297 omap_mcpdm_reset_playback(0);
298 } 298 }
299 299
300 if (irq & MCPDM_DN_IRQ) { 300 if (irq & MCPDM_DN_IRQ) {
301 dev_dbg(mcpdm_irq->dev, "DN write request\n"); 301 dev_dbg(mcpdm_irq->dev, "DN write request\n");
302 } 302 }
303 303
304 if (irq & MCPDM_UP_IRQ_FULL) { 304 if (irq & MCPDM_UP_IRQ_FULL) {
305 dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); 305 dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
306 omap_mcpdm_reset_capture(1); 306 omap_mcpdm_reset_capture(1);
307 omap_mcpdm_capture_open(mcpdm_irq->uplink); 307 omap_mcpdm_capture_open(mcpdm_irq->uplink);
308 omap_mcpdm_reset_capture(0); 308 omap_mcpdm_reset_capture(0);
309 } 309 }
310 310
311 if (irq & MCPDM_UP_IRQ_EMPTY) { 311 if (irq & MCPDM_UP_IRQ_EMPTY) {
312 dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); 312 dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
313 omap_mcpdm_reset_capture(1); 313 omap_mcpdm_reset_capture(1);
314 omap_mcpdm_capture_open(mcpdm_irq->uplink); 314 omap_mcpdm_capture_open(mcpdm_irq->uplink);
315 omap_mcpdm_reset_capture(0); 315 omap_mcpdm_reset_capture(0);
316 } 316 }
317 317
318 if (irq & MCPDM_UP_IRQ) { 318 if (irq & MCPDM_UP_IRQ) {
319 dev_dbg(mcpdm_irq->dev, "UP write request\n"); 319 dev_dbg(mcpdm_irq->dev, "UP write request\n");
320 } 320 }
321 321
322 return IRQ_HANDLED; 322 return IRQ_HANDLED;
323} 323}
324 324
325int omap_mcpdm_request(void) 325int omap_mcpdm_request(void)
326{ 326{
327 int ret; 327 int ret;
328 328
329 clk_enable(mcpdm->clk); 329 clk_enable(mcpdm->clk);
330 330
331 spin_lock(&mcpdm->lock); 331 spin_lock(&mcpdm->lock);
332 332
333 if (!mcpdm->free) { 333 if (!mcpdm->free) {
334 dev_err(mcpdm->dev, "McPDM interface is in use\n"); 334 dev_err(mcpdm->dev, "McPDM interface is in use\n");
335 spin_unlock(&mcpdm->lock); 335 spin_unlock(&mcpdm->lock);
336 ret = -EBUSY; 336 ret = -EBUSY;
337 goto err; 337 goto err;
338 } 338 }
339 mcpdm->free = 0; 339 mcpdm->free = 0;
340 340
341 spin_unlock(&mcpdm->lock); 341 spin_unlock(&mcpdm->lock);
342 342
343 /* Disable lines while request is ongoing */ 343 /* Disable lines while request is ongoing */
344 omap_mcpdm_write(MCPDM_CTRL, 0x00); 344 omap_mcpdm_write(MCPDM_CTRL, 0x00);
345 345
346 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler, 346 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
347 0, "McPDM", (void *)mcpdm); 347 0, "McPDM", (void *)mcpdm);
348 if (ret) { 348 if (ret) {
349 dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n"); 349 dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n");
350 goto err; 350 goto err;
351 } 351 }
352 352
353 return 0; 353 return 0;
354 354
355err: 355err:
356 clk_disable(mcpdm->clk); 356 clk_disable(mcpdm->clk);
357 return ret; 357 return ret;
358} 358}
359 359
360void omap_mcpdm_free(void) 360void omap_mcpdm_free(void)
361{ 361{
362 spin_lock(&mcpdm->lock); 362 spin_lock(&mcpdm->lock);
363 if (mcpdm->free) { 363 if (mcpdm->free) {
364 dev_err(mcpdm->dev, "McPDM interface is already free\n"); 364 dev_err(mcpdm->dev, "McPDM interface is already free\n");
365 spin_unlock(&mcpdm->lock); 365 spin_unlock(&mcpdm->lock);
366 return; 366 return;
367 } 367 }
368 mcpdm->free = 1; 368 mcpdm->free = 1;
369 spin_unlock(&mcpdm->lock); 369 spin_unlock(&mcpdm->lock);
370 370
371 clk_disable(mcpdm->clk); 371 clk_disable(mcpdm->clk);
372 372
373 free_irq(mcpdm->irq, (void *)mcpdm); 373 free_irq(mcpdm->irq, (void *)mcpdm);
374} 374}
375 375
376/* Enable/disable DC offset cancelation for the analog 376/* Enable/disable DC offset cancelation for the analog
@@ -378,108 +378,108 @@ void omap_mcpdm_free(void)
378 */ 378 */
379int omap_mcpdm_set_offset(int offset1, int offset2) 379int omap_mcpdm_set_offset(int offset1, int offset2)
380{ 380{
381 int offset; 381 int offset;
382 382
383 if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX)) 383 if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX))
384 return -EINVAL; 384 return -EINVAL;
385 385
386 offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2); 386 offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2);
387 387
388 /* offset cancellation for channel 1 */ 388 /* offset cancellation for channel 1 */
389 if (offset1) 389 if (offset1)
390 offset |= DN_OFST_RX1_EN; 390 offset |= DN_OFST_RX1_EN;
391 else 391 else
392 offset &= ~DN_OFST_RX1_EN; 392 offset &= ~DN_OFST_RX1_EN;
393 393
394 /* offset cancellation for channel 2 */ 394 /* offset cancellation for channel 2 */
395 if (offset2) 395 if (offset2)
396 offset |= DN_OFST_RX2_EN; 396 offset |= DN_OFST_RX2_EN;
397 else 397 else
398 offset &= ~DN_OFST_RX2_EN; 398 offset &= ~DN_OFST_RX2_EN;
399 399
400 omap_mcpdm_write(MCPDM_DN_OFFSET, offset); 400 omap_mcpdm_write(MCPDM_DN_OFFSET, offset);
401 401
402 return 0; 402 return 0;
403} 403}
404 404
405static int __devinit omap_mcpdm_probe(struct platform_device *pdev) 405static int __devinit omap_mcpdm_probe(struct platform_device *pdev)
406{ 406{
407 struct resource *res; 407 struct resource *res;
408 int ret = 0; 408 int ret = 0;
409 409
410 mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL); 410 mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
411 if (!mcpdm) { 411 if (!mcpdm) {
412 ret = -ENOMEM; 412 ret = -ENOMEM;
413 goto exit; 413 goto exit;
414 } 414 }
415 415
416 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 416 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
417 if (res == NULL) { 417 if (res == NULL) {
418 dev_err(&pdev->dev, "no resource\n"); 418 dev_err(&pdev->dev, "no resource\n");
419 goto err_resource; 419 goto err_resource;
420 } 420 }
421 421
422 spin_lock_init(&mcpdm->lock); 422 spin_lock_init(&mcpdm->lock);
423 mcpdm->free = 1; 423 mcpdm->free = 1;
424 mcpdm->io_base = ioremap(res->start, resource_size(res)); 424 mcpdm->io_base = ioremap(res->start, resource_size(res));
425 if (!mcpdm->io_base) { 425 if (!mcpdm->io_base) {
426 ret = -ENOMEM; 426 ret = -ENOMEM;
427 goto err_resource; 427 goto err_resource;
428 } 428 }
429 429
430 mcpdm->irq = platform_get_irq(pdev, 0); 430 mcpdm->irq = platform_get_irq(pdev, 0);
431 431
432 mcpdm->clk = clk_get(&pdev->dev, "pdm_ck"); 432 mcpdm->clk = clk_get(&pdev->dev, "pdm_ck");
433 if (IS_ERR(mcpdm->clk)) { 433 if (IS_ERR(mcpdm->clk)) {
434 ret = PTR_ERR(mcpdm->clk); 434 ret = PTR_ERR(mcpdm->clk);
435 dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret); 435 dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret);
436 goto err_clk; 436 goto err_clk;
437 } 437 }
438 438
439 mcpdm->dev = &pdev->dev; 439 mcpdm->dev = &pdev->dev;
440 platform_set_drvdata(pdev, mcpdm); 440 platform_set_drvdata(pdev, mcpdm);
441 441
442 return 0; 442 return 0;
443 443
444err_clk: 444err_clk:
445 iounmap(mcpdm->io_base); 445 iounmap(mcpdm->io_base);
446err_resource: 446err_resource:
447 kfree(mcpdm); 447 kfree(mcpdm);
448exit: 448exit:
449 return ret; 449 return ret;
450} 450}
451 451
452static int __devexit omap_mcpdm_remove(struct platform_device *pdev) 452static int __devexit omap_mcpdm_remove(struct platform_device *pdev)
453{ 453{
454 struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev); 454 struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev);
455 455
456 platform_set_drvdata(pdev, NULL); 456 platform_set_drvdata(pdev, NULL);
457 457
458 clk_put(mcpdm_ptr->clk); 458 clk_put(mcpdm_ptr->clk);
459 459
460 iounmap(mcpdm_ptr->io_base); 460 iounmap(mcpdm_ptr->io_base);
461 461
462 mcpdm_ptr->clk = NULL; 462 mcpdm_ptr->clk = NULL;
463 mcpdm_ptr->free = 0; 463 mcpdm_ptr->free = 0;
464 mcpdm_ptr->dev = NULL; 464 mcpdm_ptr->dev = NULL;
465 465
466 kfree(mcpdm_ptr); 466 kfree(mcpdm_ptr);
467 467
468 return 0; 468 return 0;
469} 469}
470 470
471static struct platform_driver omap_mcpdm_driver = { 471static struct platform_driver omap_mcpdm_driver = {
472 .probe = omap_mcpdm_probe, 472 .probe = omap_mcpdm_probe,
473 .remove = __devexit_p(omap_mcpdm_remove), 473 .remove = __devexit_p(omap_mcpdm_remove),
474 .driver = { 474 .driver = {
475 .name = "omap-mcpdm", 475 .name = "omap-mcpdm",
476 }, 476 },
477}; 477};
478 478
479static struct platform_device *omap_mcpdm_device; 479static struct platform_device *omap_mcpdm_device;
480 480
481static int __init omap_mcpdm_init(void) 481static int __init omap_mcpdm_init(void)
482{ 482{
483 return platform_driver_register(&omap_mcpdm_driver); 483 return platform_driver_register(&omap_mcpdm_driver);
484} 484}
485arch_initcall(omap_mcpdm_init); 485arch_initcall(omap_mcpdm_init);