1 files changed, 138 insertions, 117 deletions

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 56da8c8c5960..c5a0e8af8226 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -22,6 +22,7 @@
 #include <sound/pcm_params.h>
 
 #include "fsl_sai.h"
+#include "imx-pcm.h"
 
 #define FSL_SAI_FLAGS (FSL_SAI_CSR_SEIE |\
                        FSL_SAI_CSR_FEIE)
@@ -30,78 +31,96 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
 {
         struct fsl_sai *sai = (struct fsl_sai *)devid;
         struct device *dev = &sai->pdev->dev;
-        u32 xcsr, mask;
+        u32 flags, xcsr, mask;
+        bool irq_none = true;
 
-        /* Only handle those what we enabled */
+        /*
+         * Both IRQ status bits and IRQ mask bits are in the xCSR but
+         * different shifts. And we here create a mask only for those
+         * IRQs that we activated.
+         */
         mask = (FSL_SAI_FLAGS >> FSL_SAI_CSR_xIE_SHIFT) << FSL_SAI_CSR_xF_SHIFT;
 
         /* Tx IRQ */
         regmap_read(sai->regmap, FSL_SAI_TCSR, &xcsr);
-        xcsr &= mask;
+        flags = xcsr & mask;
+
+        if (flags)
+                irq_none = false;
+        else
+                goto irq_rx;
 
-        if (xcsr & FSL_SAI_CSR_WSF)
+        if (flags & FSL_SAI_CSR_WSF)
                 dev_dbg(dev, "isr: Start of Tx word detected\n");
 
-        if (xcsr & FSL_SAI_CSR_SEF)
+        if (flags & FSL_SAI_CSR_SEF)
                 dev_warn(dev, "isr: Tx Frame sync error detected\n");
 
-        if (xcsr & FSL_SAI_CSR_FEF) {
+        if (flags & FSL_SAI_CSR_FEF) {
                 dev_warn(dev, "isr: Transmit underrun detected\n");
                 /* FIFO reset for safety */
                 xcsr |= FSL_SAI_CSR_FR;
         }
 
-        if (xcsr & FSL_SAI_CSR_FWF)
+        if (flags & FSL_SAI_CSR_FWF)
                 dev_dbg(dev, "isr: Enabled transmit FIFO is empty\n");
 
-        if (xcsr & FSL_SAI_CSR_FRF)
+        if (flags & FSL_SAI_CSR_FRF)
                 dev_dbg(dev, "isr: Transmit FIFO watermark has been reached\n");
 
-        regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
-                           FSL_SAI_CSR_xF_W_MASK | FSL_SAI_CSR_FR, xcsr);
+        flags &= FSL_SAI_CSR_xF_W_MASK;
+        xcsr &= ~FSL_SAI_CSR_xF_MASK;
+
+        if (flags)
+                regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr);
 
+irq_rx:
         /* Rx IRQ */
         regmap_read(sai->regmap, FSL_SAI_RCSR, &xcsr);
-        xcsr &= mask;
+        flags = xcsr & mask;
 
-        if (xcsr & FSL_SAI_CSR_WSF)
+        if (flags)
+                irq_none = false;
+        else
+                goto out;
+
+        if (flags & FSL_SAI_CSR_WSF)
                 dev_dbg(dev, "isr: Start of Rx word detected\n");
 
-        if (xcsr & FSL_SAI_CSR_SEF)
+        if (flags & FSL_SAI_CSR_SEF)
                 dev_warn(dev, "isr: Rx Frame sync error detected\n");
 
-        if (xcsr & FSL_SAI_CSR_FEF) {
+        if (flags & FSL_SAI_CSR_FEF) {
                 dev_warn(dev, "isr: Receive overflow detected\n");
                 /* FIFO reset for safety */
                 xcsr |= FSL_SAI_CSR_FR;
         }
 
-        if (xcsr & FSL_SAI_CSR_FWF)
+        if (flags & FSL_SAI_CSR_FWF)
                 dev_dbg(dev, "isr: Enabled receive FIFO is full\n");
 
-        if (xcsr & FSL_SAI_CSR_FRF)
+        if (flags & FSL_SAI_CSR_FRF)
                 dev_dbg(dev, "isr: Receive FIFO watermark has been reached\n");
 
-        regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
-                           FSL_SAI_CSR_xF_W_MASK | FSL_SAI_CSR_FR, xcsr);
+        flags &= FSL_SAI_CSR_xF_W_MASK;
+        xcsr &= ~FSL_SAI_CSR_xF_MASK;
+
+        if (flags)
+                regmap_write(sai->regmap, FSL_SAI_TCSR, flags | xcsr);
 
-        return IRQ_HANDLED;
+out:
+        if (irq_none)
+                return IRQ_NONE;
+        else
+                return IRQ_HANDLED;
 }
 
 static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
                 int clk_id, unsigned int freq, int fsl_dir)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
-        u32 val_cr2, reg_cr2;
-
-        if (fsl_dir == FSL_FMT_TRANSMITTER)
-                reg_cr2 = FSL_SAI_TCR2;
-        else
-                reg_cr2 = FSL_SAI_RCR2;
-
-        regmap_read(sai->regmap, reg_cr2, &val_cr2);
-
-        val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK;
+        bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
+        u32 val_cr2 = 0;
 
         switch (clk_id) {
         case FSL_SAI_CLK_BUS:
@@ -120,7 +139,8 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
                 return -EINVAL;
         }
 
-        regmap_write(sai->regmap, reg_cr2, val_cr2);
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
+                           FSL_SAI_CR2_MSEL_MASK, val_cr2);
 
         return 0;
 }
@@ -152,22 +172,10 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
                                 unsigned int fmt, int fsl_dir)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
-        u32 val_cr2, val_cr4, reg_cr2, reg_cr4;
-
-        if (fsl_dir == FSL_FMT_TRANSMITTER) {
-                reg_cr2 = FSL_SAI_TCR2;
-                reg_cr4 = FSL_SAI_TCR4;
-        } else {
-                reg_cr2 = FSL_SAI_RCR2;
-                reg_cr4 = FSL_SAI_RCR4;
-        }
+        bool tx = fsl_dir == FSL_FMT_TRANSMITTER;
+        u32 val_cr2 = 0, val_cr4 = 0;
 
-        regmap_read(sai->regmap, reg_cr2, &val_cr2);
-        regmap_read(sai->regmap, reg_cr4, &val_cr4);
-
-        if (sai->big_endian_data)
-                val_cr4 &= ~FSL_SAI_CR4_MF;
-        else
+        if (!sai->big_endian_data)
                 val_cr4 |= FSL_SAI_CR4_MF;
 
         /* DAI mode */
@@ -188,7 +196,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
                  * frame sync asserts with the first bit of the frame.
                  */
                 val_cr2 |= FSL_SAI_CR2_BCP;
-                val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
                 break;
         case SND_SOC_DAIFMT_DSP_A:
                 /*
@@ -198,7 +205,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
                  * data word.
                  */
                 val_cr2 |= FSL_SAI_CR2_BCP;
-                val_cr4 &= ~FSL_SAI_CR4_FSP;
                 val_cr4 |= FSL_SAI_CR4_FSE;
                 sai->is_dsp_mode = true;
                 break;
@@ -208,7 +214,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
                  * frame sync asserts with the first bit of the frame.
                  */
                 val_cr2 |= FSL_SAI_CR2_BCP;
-                val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
                 sai->is_dsp_mode = true;
                 break;
         case SND_SOC_DAIFMT_RIGHT_J:
@@ -246,23 +251,22 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
                 val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
                 break;
         case SND_SOC_DAIFMT_CBM_CFM:
-                val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
-                val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
                 break;
         case SND_SOC_DAIFMT_CBS_CFM:
                 val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
-                val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
                 break;
         case SND_SOC_DAIFMT_CBM_CFS:
-                val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
                 val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
                 break;
         default:
                 return -EINVAL;
         }
 
-        regmap_write(sai->regmap, reg_cr2, val_cr2);
-        regmap_write(sai->regmap, reg_cr4, val_cr4);
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx),
+                           FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR, val_cr2);
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
+                           FSL_SAI_CR4_MF | FSL_SAI_CR4_FSE |
+                           FSL_SAI_CR4_FSP | FSL_SAI_CR4_FSD_MSTR, val_cr4);
 
         return 0;
 }
@@ -289,29 +293,10 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
                 struct snd_soc_dai *cpu_dai)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
-        u32 val_cr4, val_cr5, val_mr, reg_cr4, reg_cr5, reg_mr;
+        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
         unsigned int channels = params_channels(params);
         u32 word_width = snd_pcm_format_width(params_format(params));
-
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-                reg_cr4 = FSL_SAI_TCR4;
-                reg_cr5 = FSL_SAI_TCR5;
-                reg_mr = FSL_SAI_TMR;
-        } else {
-                reg_cr4 = FSL_SAI_RCR4;
-                reg_cr5 = FSL_SAI_RCR5;
-                reg_mr = FSL_SAI_RMR;
-        }
-
-        regmap_read(sai->regmap, reg_cr4, &val_cr4);
-        regmap_read(sai->regmap, reg_cr4, &val_cr5);
-
-        val_cr4 &= ~FSL_SAI_CR4_SYWD_MASK;
-        val_cr4 &= ~FSL_SAI_CR4_FRSZ_MASK;
-
-        val_cr5 &= ~FSL_SAI_CR5_WNW_MASK;
-        val_cr5 &= ~FSL_SAI_CR5_W0W_MASK;
-        val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
+        u32 val_cr4 = 0, val_cr5 = 0;
 
         if (!sai->is_dsp_mode)
                 val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
@@ -319,18 +304,20 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
         val_cr5 |= FSL_SAI_CR5_WNW(word_width);
         val_cr5 |= FSL_SAI_CR5_W0W(word_width);
 
-        val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
         if (sai->big_endian_data)
                 val_cr5 |= FSL_SAI_CR5_FBT(0);
         else
                 val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
 
         val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
-        val_mr = ~0UL - ((1 << channels) - 1);
 
-        regmap_write(sai->regmap, reg_cr4, val_cr4);
-        regmap_write(sai->regmap, reg_cr5, val_cr5);
-        regmap_write(sai->regmap, reg_mr, val_mr);
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx),
+                           FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
+                           val_cr4);
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx),
+                           FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
+                           FSL_SAI_CR5_FBT_MASK, val_cr5);
+        regmap_write(sai->regmap, FSL_SAI_xMR(tx), ~0UL - ((1 << channels) - 1));
 
         return 0;
 }
@@ -339,6 +326,7 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
                 struct snd_soc_dai *cpu_dai)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
         u32 tcsr, rcsr;
 
         /*
@@ -353,14 +341,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
         regmap_read(sai->regmap, FSL_SAI_TCSR, &tcsr);
         regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr);
 
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-                tcsr |= FSL_SAI_CSR_FRDE;
-                rcsr &= ~FSL_SAI_CSR_FRDE;
-        } else {
-                rcsr |= FSL_SAI_CSR_FRDE;
-                tcsr &= ~FSL_SAI_CSR_FRDE;
-        }
-
         /*
          * It is recommended that the transmitter is the last enabled
          * and the first disabled.
@@ -369,22 +349,33 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
         case SNDRV_PCM_TRIGGER_START:
         case SNDRV_PCM_TRIGGER_RESUME:
         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
-                tcsr |= FSL_SAI_CSR_TERE;
-                rcsr |= FSL_SAI_CSR_TERE;
+                if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
+                        regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
+                                           FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
+                        regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
+                                           FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
+                }
 
-                regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
-                regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
+                regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+                                   FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
+                regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+                                   FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
                 break;
         case SNDRV_PCM_TRIGGER_STOP:
         case SNDRV_PCM_TRIGGER_SUSPEND:
         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-                if (!(cpu_dai->playback_active || cpu_dai->capture_active)) {
-                        tcsr &= ~FSL_SAI_CSR_TERE;
-                        rcsr &= ~FSL_SAI_CSR_TERE;
+                regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+                                   FSL_SAI_CSR_FRDE, 0);
+                regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+                                   FSL_SAI_CSR_xIE_MASK, 0);
+
+                /* Check if the opposite FRDE is also disabled */
+                if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) {
+                        regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
+                                           FSL_SAI_CSR_TERE, 0);
+                        regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
+                                           FSL_SAI_CSR_TERE, 0);
                 }
-
-                regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
-                regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
                 break;
         default:
                 return -EINVAL;
@@ -397,14 +388,17 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
                 struct snd_soc_dai *cpu_dai)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
-        u32 reg;
+        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+        struct device *dev = &sai->pdev->dev;
+        int ret;
 
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
-                reg = FSL_SAI_TCR3;
-        else
-                reg = FSL_SAI_RCR3;
+        ret = clk_prepare_enable(sai->bus_clk);
+        if (ret) {
+                dev_err(dev, "failed to enable bus clock: %d\n", ret);
+                return ret;
+        }
 
-        regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE,
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,
                            FSL_SAI_CR3_TRCE);
 
         return 0;
@@ -414,15 +408,11 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
                 struct snd_soc_dai *cpu_dai)
 {
         struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
-        u32 reg;
+        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 
-        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
-                reg = FSL_SAI_TCR3;
-        else
-                reg = FSL_SAI_RCR3;
+        regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);
 
-        regmap_update_bits(sai->regmap, reg, FSL_SAI_CR3_TRCE,
-                           ~FSL_SAI_CR3_TRCE);
+        clk_disable_unprepare(sai->bus_clk);
 }
 
 static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
@@ -438,8 +428,8 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
 {
         struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
 
-        regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS);
-        regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS);
+        regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
+        regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
         regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
                            FSL_SAI_MAXBURST_TX * 2);
         regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
@@ -555,7 +545,8 @@ static int fsl_sai_probe(struct platform_device *pdev)
         struct fsl_sai *sai;
         struct resource *res;
         void __iomem *base;
-        int irq, ret;
+        char tmp[8];
+        int irq, ret, i;
 
         sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
         if (!sai)
@@ -563,6 +554,9 @@ static int fsl_sai_probe(struct platform_device *pdev)
 
         sai->pdev = pdev;
 
+        if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx6sx-sai"))
+                sai->sai_on_imx = true;
+
         sai->big_endian_regs = of_property_read_bool(np, "big-endian-regs");
         if (sai->big_endian_regs)
                 fsl_sai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
@@ -575,12 +569,35 @@ static int fsl_sai_probe(struct platform_device *pdev)
                 return PTR_ERR(base);
 
         sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
-                        "sai", base, &fsl_sai_regmap_config);
+                        "bus", base, &fsl_sai_regmap_config);
+
+        /* Compatible with old DTB cases */
+        if (IS_ERR(sai->regmap))
+                sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
+                                "sai", base, &fsl_sai_regmap_config);
         if (IS_ERR(sai->regmap)) {
                 dev_err(&pdev->dev, "regmap init failed\n");
                 return PTR_ERR(sai->regmap);
         }
 
+        /* No error out for old DTB cases but only mark the clock NULL */
+        sai->bus_clk = devm_clk_get(&pdev->dev, "bus");
+        if (IS_ERR(sai->bus_clk)) {
+                dev_err(&pdev->dev, "failed to get bus clock: %ld\n",
+                                PTR_ERR(sai->bus_clk));
+                sai->bus_clk = NULL;
+        }
+
+        for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
+                sprintf(tmp, "mclk%d", i + 1);
+                sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
+                if (IS_ERR(sai->mclk_clk[i])) {
+                        dev_err(&pdev->dev, "failed to get mclk%d clock: %ld\n",
+                                        i + 1, PTR_ERR(sai->mclk_clk[i]));
+                        sai->mclk_clk[i] = NULL;
+                }
+        }
+
         irq = platform_get_irq(pdev, 0);
         if (irq < 0) {
                 dev_err(&pdev->dev, "no irq for node %s\n", np->full_name);
@@ -605,12 +622,16 @@ static int fsl_sai_probe(struct platform_device *pdev)
         if (ret)
                 return ret;
 
-        return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
-                        SND_DMAENGINE_PCM_FLAG_NO_RESIDUE);
+        if (sai->sai_on_imx)
+                return imx_pcm_dma_init(pdev);
+        else
+                return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL,
+                                SND_DMAENGINE_PCM_FLAG_NO_RESIDUE);
 }
 
 static const struct of_device_id fsl_sai_ids[] = {
         { .compatible = "fsl,vf610-sai", },
+        { .compatible = "fsl,imx6sx-sai", },
         { /* sentinel */ }
 };