aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/codecs
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/codecs')
-rw-r--r--sound/soc/codecs/wm8731.c789
-rw-r--r--sound/soc/codecs/wm8731.h41
2 files changed, 830 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
new file mode 100644
index 000000000000..cd0ece650f31
--- /dev/null
+++ b/sound/soc/codecs/wm8731.c
@@ -0,0 +1,789 @@
1/*
2 * wm8731.c -- WM8731 ALSA SoC Audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on wm8753.c by Liam Girdwood
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
22#include <sound/driver.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8731.h"
31
32#define AUDIO_NAME "wm8731"
33#define WM8731_VERSION "0.12"
34
35/*
36 * Debug
37 */
38
39#define WM8731_DEBUG 0
40
41#ifdef WM8731_DEBUG
42#define dbg(format, arg...) \
43 printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
44#else
45#define dbg(format, arg...) do {} while (0)
46#endif
47#define err(format, arg...) \
48 printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
49#define info(format, arg...) \
50 printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
51#define warn(format, arg...) \
52 printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
53
54struct snd_soc_codec_device soc_codec_dev_wm8731;
55
56/*
57 * wm8731 register cache
58 * We can't read the WM8731 register space when we are
59 * using 2 wire for device control, so we cache them instead.
60 * There is no point in caching the reset register
61 */
62static const u16 wm8731_reg[WM8731_CACHEREGNUM] = {
63 0x0097, 0x0097, 0x0079, 0x0079,
64 0x000a, 0x0008, 0x009f, 0x000a,
65 0x0000, 0x0000
66};
67
68#define WM8731_DAIFMT \
69 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \
70 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \
71 SND_SOC_DAIFMT_IB_IF)
72
73#define WM8731_DIR \
74 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
75
76#define WM8731_RATES \
77 (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
78 SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
79 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
80
81#define WM8731_HIFI_BITS \
82 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
83 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
84
85static struct snd_soc_dai_mode wm8731_modes[] = {
86 /* codec frame and clock master modes */
87 /* 8k */
88 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
89 WM8731_HIFI_BITS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0,
90 1536, SND_SOC_FSB(64)},
91 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
92 WM8731_HIFI_BITS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0,
93 2304, SND_SOC_FSB(64)},
94 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
95 WM8731_HIFI_BITS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0,
96 1408, SND_SOC_FSB(64)},
97 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
98 WM8731_HIFI_BITS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0,
99 2112, SND_SOC_FSB(64)},
100
101 /* 32k */
102 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
103 WM8731_HIFI_BITS, SNDRV_PCM_RATE_32000, WM8731_DIR, 0,
104 384, SND_SOC_FSB(64)},
105 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
106 WM8731_HIFI_BITS, SNDRV_PCM_RATE_32000, WM8731_DIR, 0,
107 576, SND_SOC_FSB(64)},
108
109 /* 44.1k & 48k */
110 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
111 WM8731_HIFI_BITS, SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
112 WM8731_DIR, 0, 256, SND_SOC_FSB(64)},
113 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
114 WM8731_HIFI_BITS, SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
115 WM8731_DIR, 0, 384, SND_SOC_FSB(64)},
116
117 /* 88.2 & 96k */
118 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
119 WM8731_HIFI_BITS, SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
120 WM8731_DIR, 0, 128, SND_SOC_FSB(64)},
121 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
122 WM8731_HIFI_BITS, SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
123 WM8731_DIR, 0, 192, SND_SOC_FSB(64)},
124
125
126 /* USB codec frame and clock master modes */
127 /* 8k */
128 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
129 WM8731_HIFI_BITS, SNDRV_PCM_RATE_8000, WM8731_DIR,
130 SND_SOC_DAI_BFS_DIV, 1500, SND_SOC_FSBD(1)},
131
132 /* 44.1k */
133 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
134 WM8731_HIFI_BITS, SNDRV_PCM_RATE_44100, WM8731_DIR,
135 SND_SOC_DAI_BFS_DIV, 272, SND_SOC_FSBD(1)},
136
137 /* 48k */
138 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
139 WM8731_HIFI_BITS, SNDRV_PCM_RATE_48000, WM8731_DIR,
140 SND_SOC_DAI_BFS_DIV, 250, SND_SOC_FSBD(1)},
141
142 /* 88.2k */
143 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
144 WM8731_HIFI_BITS, SNDRV_PCM_RATE_88200, WM8731_DIR,
145 SND_SOC_DAI_BFS_DIV, 136, SND_SOC_FSBD(1)},
146
147 /* 96k */
148 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0),
149 WM8731_HIFI_BITS, SNDRV_PCM_RATE_96000, WM8731_DIR,
150 SND_SOC_DAI_BFS_DIV, 125, SND_SOC_FSBD(1)},
151
152 /* codec frame and clock slave modes */
153 {WM8731_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0),
154 WM8731_HIFI_BITS, WM8731_RATES, WM8731_DIR, SND_SOC_DAI_BFS_DIV,
155 SND_SOC_FS_ALL, SND_SOC_FSBD_ALL},
156};
157
158/*
159 * read wm8731 register cache
160 */
161static inline unsigned int wm8731_read_reg_cache(struct snd_soc_codec *codec,
162 unsigned int reg)
163{
164 u16 *cache = codec->reg_cache;
165 if (reg == WM8731_RESET)
166 return 0;
167 if (reg >= WM8731_CACHEREGNUM)
168 return -1;
169 return cache[reg];
170}
171
172/*
173 * write wm8731 register cache
174 */
175static inline void wm8731_write_reg_cache(struct snd_soc_codec *codec,
176 u16 reg, unsigned int value)
177{
178 u16 *cache = codec->reg_cache;
179 if (reg >= WM8731_CACHEREGNUM)
180 return;
181 cache[reg] = value;
182}
183
184/*
185 * write to the WM8731 register space
186 */
187static int wm8731_write(struct snd_soc_codec *codec, unsigned int reg,
188 unsigned int value)
189{
190 u8 data[2];
191
192 /* data is
193 * D15..D9 WM8731 register offset
194 * D8...D0 register data
195 */
196 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
197 data[1] = value & 0x00ff;
198
199 wm8731_write_reg_cache (codec, reg, value);
200 if (codec->hw_write(codec->control_data, data, 2) == 2)
201 return 0;
202 else
203 return -EIO;
204}
205
206#define wm8731_reset(c) wm8731_write(c, WM8731_RESET, 0)
207
208static const char *wm8731_input_select[] = {"Line In", "Mic"};
209static const char *wm8731_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
210
211static const struct soc_enum wm8731_enum[] = {
212 SOC_ENUM_SINGLE(WM8731_APANA, 2, 2, wm8731_input_select),
213 SOC_ENUM_SINGLE(WM8731_APDIGI, 1, 4, wm8731_deemph),
214};
215
216static const struct snd_kcontrol_new wm8731_snd_controls[] = {
217
218SOC_DOUBLE_R("Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V, 0, 127, 0),
219SOC_DOUBLE_R("Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V, 7, 1, 0),
220
221SOC_DOUBLE_R("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0),
222SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
223
224SOC_SINGLE("Mic Boost (+20dB)", WM8731_APANA, 0, 1, 0),
225SOC_SINGLE("Capture Mic Switch", WM8731_APANA, 1, 1, 1),
226
227SOC_SINGLE("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1),
228
229SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
230SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
231
232SOC_ENUM("Playback De-emphasis", wm8731_enum[1]),
233};
234
235/* add non dapm controls */
236static int wm8731_add_controls(struct snd_soc_codec *codec)
237{
238 int err, i;
239
240 for (i = 0; i < ARRAY_SIZE(wm8731_snd_controls); i++) {
241 if ((err = snd_ctl_add(codec->card,
242 snd_soc_cnew(&wm8731_snd_controls[i],codec, NULL))) < 0)
243 return err;
244 }
245
246 return 0;
247}
248
249/* Output Mixer */
250static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
251SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
252SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
253SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
254};
255
256/* Input mux */
257static const struct snd_kcontrol_new wm8731_input_mux_controls =
258SOC_DAPM_ENUM("Input Select", wm8731_enum[0]);
259
260static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
261SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
262 &wm8731_output_mixer_controls[0],
263 ARRAY_SIZE(wm8731_output_mixer_controls)),
264SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
265SND_SOC_DAPM_OUTPUT("LOUT"),
266SND_SOC_DAPM_OUTPUT("LHPOUT"),
267SND_SOC_DAPM_OUTPUT("ROUT"),
268SND_SOC_DAPM_OUTPUT("RHPOUT"),
269SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
270SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
271SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
272SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
273SND_SOC_DAPM_INPUT("MICIN"),
274SND_SOC_DAPM_INPUT("RLINEIN"),
275SND_SOC_DAPM_INPUT("LLINEIN"),
276};
277
278static const char *intercon[][3] = {
279 /* output mixer */
280 {"Output Mixer", "Line Bypass Switch", "Line Input"},
281 {"Output Mixer", "HiFi Playback Switch", "DAC"},
282 {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
283
284 /* outputs */
285 {"RHPOUT", NULL, "Output Mixer"},
286 {"ROUT", NULL, "Output Mixer"},
287 {"LHPOUT", NULL, "Output Mixer"},
288 {"LOUT", NULL, "Output Mixer"},
289
290 /* input mux */
291 {"Input Mux", "Line In", "Line Input"},
292 {"Input Mux", "Mic", "Mic Bias"},
293 {"ADC", NULL, "Input Mux"},
294
295 /* inputs */
296 {"Line Input", NULL, "LLINEIN"},
297 {"Line Input", NULL, "RLINEIN"},
298 {"Mic Bias", NULL, "MICIN"},
299
300 /* terminator */
301 {NULL, NULL, NULL},
302};
303
304static int wm8731_add_widgets(struct snd_soc_codec *codec)
305{
306 int i;
307
308 for(i = 0; i < ARRAY_SIZE(wm8731_dapm_widgets); i++) {
309 snd_soc_dapm_new_control(codec, &wm8731_dapm_widgets[i]);
310 }
311
312 /* set up audio path interconnects */
313 for(i = 0; intercon[i][0] != NULL; i++) {
314 snd_soc_dapm_connect_input(codec, intercon[i][0],
315 intercon[i][1], intercon[i][2]);
316 }
317
318 snd_soc_dapm_new_widgets(codec);
319 return 0;
320}
321
322struct _coeff_div {
323 u32 mclk;
324 u32 rate;
325 u16 fs;
326 u8 sr:4;
327 u8 bosr:1;
328 u8 usb:1;
329};
330
331/* codec mclk clock divider coefficients */
332static const struct _coeff_div coeff_div[] = {
333 /* 48k */
334 {12288000, 48000, 256, 0x0, 0x0, 0x0},
335 {18432000, 48000, 384, 0x0, 0x1, 0x0},
336 {12000000, 48000, 250, 0x0, 0x0, 0x1},
337
338 /* 32k */
339 {12288000, 32000, 384, 0x6, 0x0, 0x0},
340 {18432000, 32000, 576, 0x6, 0x1, 0x0},
341
342 /* 8k */
343 {12288000, 8000, 1536, 0x3, 0x0, 0x0},
344 {18432000, 8000, 2304, 0x3, 0x1, 0x0},
345 {11289600, 8000, 1408, 0xb, 0x0, 0x0},
346 {16934400, 8000, 2112, 0xb, 0x1, 0x0},
347 {12000000, 8000, 1500, 0x3, 0x0, 0x1},
348
349 /* 96k */
350 {12288000, 96000, 128, 0x7, 0x0, 0x0},
351 {18432000, 96000, 192, 0x7, 0x1, 0x0},
352 {12000000, 96000, 125, 0x7, 0x0, 0x1},
353
354 /* 44.1k */
355 {11289600, 44100, 256, 0x8, 0x0, 0x0},
356 {16934400, 44100, 384, 0x8, 0x1, 0x0},
357 {12000000, 44100, 272, 0x8, 0x1, 0x1},
358
359 /* 88.2k */
360 {11289600, 88200, 128, 0xf, 0x0, 0x0},
361 {16934400, 88200, 192, 0xf, 0x1, 0x0},
362 {12000000, 88200, 136, 0xf, 0x1, 0x1},
363};
364
365static inline int get_coeff(int mclk, int rate)
366{
367 int i;
368
369 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
370 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
371 return i;
372 }
373 return 0;
374}
375
376/* WM8731 supports numerous clocks per sample rate */
377static unsigned int wm8731_config_sysclk(struct snd_soc_codec_dai *dai,
378 struct snd_soc_clock_info *info, unsigned int clk)
379{
380 dai->mclk = 0;
381
382 /* check that the calculated FS and rate actually match a clock from
383 * the machine driver */
384 if (info->fs * info->rate == clk)
385 dai->mclk = clk;
386
387 return dai->mclk;
388}
389
390static int wm8731_pcm_prepare(struct snd_pcm_substream *substream)
391{
392 struct snd_soc_pcm_runtime *rtd = substream->private_data;
393 struct snd_soc_device *socdev = rtd->socdev;
394 struct snd_soc_codec *codec = socdev->codec;
395 u16 iface = 0, srate;
396 int i = get_coeff(rtd->codec_dai->mclk,
397 snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate));
398
399 /* set master/slave audio interface */
400 switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
401 case SND_SOC_DAIFMT_CBM_CFM:
402 iface |= 0x0040;
403 break;
404 case SND_SOC_DAIFMT_CBS_CFS:
405 break;
406 }
407 srate = (coeff_div[i].sr << 2) |
408 (coeff_div[i].bosr << 1) | coeff_div[i].usb;
409 wm8731_write(codec, WM8731_SRATE, srate);
410
411 /* interface format */
412 switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
413 case SND_SOC_DAIFMT_I2S:
414 iface |= 0x0002;
415 break;
416 case SND_SOC_DAIFMT_RIGHT_J:
417 break;
418 case SND_SOC_DAIFMT_LEFT_J:
419 iface |= 0x0001;
420 break;
421 case SND_SOC_DAIFMT_DSP_A:
422 iface |= 0x0003;
423 break;
424 case SND_SOC_DAIFMT_DSP_B:
425 iface |= 0x0013;
426 break;
427 }
428
429 /* bit size */
430 switch (rtd->codec_dai->dai_runtime.pcmfmt) {
431 case SNDRV_PCM_FMTBIT_S16_LE:
432 break;
433 case SNDRV_PCM_FMTBIT_S20_3LE:
434 iface |= 0x0004;
435 break;
436 case SNDRV_PCM_FMTBIT_S24_LE:
437 iface |= 0x0008;
438 break;
439 case SNDRV_PCM_FMTBIT_S32_LE:
440 iface |= 0x000c;
441 break;
442 }
443
444 /* clock inversion */
445 switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) {
446 case SND_SOC_DAIFMT_NB_NF:
447 break;
448 case SND_SOC_DAIFMT_IB_IF:
449 iface |= 0x0090;
450 break;
451 case SND_SOC_DAIFMT_IB_NF:
452 iface |= 0x0080;
453 break;
454 case SND_SOC_DAIFMT_NB_IF:
455 iface |= 0x0010;
456 break;
457 }
458
459 /* set iface */
460 wm8731_write(codec, WM8731_IFACE, iface);
461
462 /* set active */
463 wm8731_write(codec, WM8731_ACTIVE, 0x0001);
464 return 0;
465}
466
467static void wm8731_shutdown(struct snd_pcm_substream *substream)
468{
469 struct snd_soc_pcm_runtime *rtd = substream->private_data;
470 struct snd_soc_device *socdev = rtd->socdev;
471 struct snd_soc_codec *codec = socdev->codec;
472
473 /* deactivate */
474 if (!codec->active) {
475 udelay(50);
476 wm8731_write(codec, WM8731_ACTIVE, 0x0);
477 }
478}
479
480static int wm8731_mute(struct snd_soc_codec *codec,
481 struct snd_soc_codec_dai *dai, int mute)
482{
483 u16 mute_reg = wm8731_read_reg_cache(codec, WM8731_APDIGI) & 0xfff7;
484 if (mute)
485 wm8731_write(codec, WM8731_APDIGI, mute_reg | 0x8);
486 else
487 wm8731_write(codec, WM8731_APDIGI, mute_reg);
488 return 0;
489}
490
491static int wm8731_dapm_event(struct snd_soc_codec *codec, int event)
492{
493 u16 reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f;
494
495 switch (event) {
496 case SNDRV_CTL_POWER_D0: /* full On */
497 /* vref/mid, osc on, dac unmute */
498 wm8731_write(codec, WM8731_PWR, reg);
499 break;
500 case SNDRV_CTL_POWER_D1: /* partial On */
501 case SNDRV_CTL_POWER_D2: /* partial On */
502 break;
503 case SNDRV_CTL_POWER_D3hot: /* Off, with power */
504 /* everything off except vref/vmid, */
505 wm8731_write(codec, WM8731_PWR, reg | 0x0040);
506 break;
507 case SNDRV_CTL_POWER_D3cold: /* Off, without power */
508 /* everything off, dac mute, inactive */
509 wm8731_write(codec, WM8731_ACTIVE, 0x0);
510 wm8731_write(codec, WM8731_PWR, 0xffff);
511 break;
512 }
513 codec->dapm_state = event;
514 return 0;
515}
516
517struct snd_soc_codec_dai wm8731_dai = {
518 .name = "WM8731",
519 .playback = {
520 .stream_name = "Playback",
521 .channels_min = 1,
522 .channels_max = 2,
523 },
524 .capture = {
525 .stream_name = "Capture",
526 .channels_min = 1,
527 .channels_max = 2,
528 },
529 .config_sysclk = wm8731_config_sysclk,
530 .digital_mute = wm8731_mute,
531 .ops = {
532 .prepare = wm8731_pcm_prepare,
533 .shutdown = wm8731_shutdown,
534 },
535 .caps = {
536 .num_modes = ARRAY_SIZE(wm8731_modes),
537 .mode = wm8731_modes,
538 },
539};
540EXPORT_SYMBOL_GPL(wm8731_dai);
541
542static int wm8731_suspend(struct platform_device *pdev, pm_message_t state)
543{
544 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
545 struct snd_soc_codec *codec = socdev->codec;
546
547 wm8731_write(codec, WM8731_ACTIVE, 0x0);
548 wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
549 return 0;
550}
551
552static int wm8731_resume(struct platform_device *pdev)
553{
554 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
555 struct snd_soc_codec *codec = socdev->codec;
556 int i;
557 u8 data[2];
558 u16 *cache = codec->reg_cache;
559
560 /* Sync reg_cache with the hardware */
561 for (i = 0; i < ARRAY_SIZE(wm8731_reg); i++) {
562 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
563 data[1] = cache[i] & 0x00ff;
564 codec->hw_write(codec->control_data, data, 2);
565 }
566 wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
567 wm8731_dapm_event(codec, codec->suspend_dapm_state);
568 return 0;
569}
570
571/*
572 * initialise the WM8731 driver
573 * register the mixer and dsp interfaces with the kernel
574 */
575static int wm8731_init(struct snd_soc_device *socdev)
576{
577 struct snd_soc_codec *codec = socdev->codec;
578 int reg, ret = 0;
579
580 codec->name = "WM8731";
581 codec->owner = THIS_MODULE;
582 codec->read = wm8731_read_reg_cache;
583 codec->write = wm8731_write;
584 codec->dapm_event = wm8731_dapm_event;
585 codec->dai = &wm8731_dai;
586 codec->num_dai = 1;
587 codec->reg_cache_size = ARRAY_SIZE(wm8731_reg);
588
589 codec->reg_cache =
590 kzalloc(sizeof(u16) * ARRAY_SIZE(wm8731_reg), GFP_KERNEL);
591 if (codec->reg_cache == NULL)
592 return -ENOMEM;
593 memcpy(codec->reg_cache,
594 wm8731_reg, sizeof(u16) * ARRAY_SIZE(wm8731_reg));
595 codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8731_reg);
596
597 wm8731_reset(codec);
598
599 /* register pcms */
600 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
601 if (ret < 0) {
602 kfree(codec->reg_cache);
603 return ret;
604 }
605
606 /* power on device */
607 wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
608
609 /* set the update bits */
610 reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V);
611 wm8731_write(codec, WM8731_LOUT1V, reg | 0x0100);
612 reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V);
613 wm8731_write(codec, WM8731_ROUT1V, reg | 0x0100);
614 reg = wm8731_read_reg_cache(codec, WM8731_LINVOL);
615 wm8731_write(codec, WM8731_LINVOL, reg | 0x0100);
616 reg = wm8731_read_reg_cache(codec, WM8731_RINVOL);
617 wm8731_write(codec, WM8731_RINVOL, reg | 0x0100);
618
619 wm8731_add_controls(codec);
620 wm8731_add_widgets(codec);
621 ret = snd_soc_register_card(socdev);
622 if (ret < 0) {
623 snd_soc_free_pcms(socdev);
624 snd_soc_dapm_free(socdev);
625 }
626
627 return ret;
628}
629
630static struct snd_soc_device *wm8731_socdev;
631
632#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
633
634/*
635 * WM8731 2 wire address is determined by GPIO5
636 * state during powerup.
637 * low = 0x1a
638 * high = 0x1b
639 */
640static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
641
642/* Magic definition of all other variables and things */
643I2C_CLIENT_INSMOD;
644
645static struct i2c_driver wm8731_i2c_driver;
646static struct i2c_client client_template;
647
648/* If the i2c layer weren't so broken, we could pass this kind of data
649 around */
650
651static int wm8731_codec_probe(struct i2c_adapter *adap, int addr, int kind)
652{
653 struct snd_soc_device *socdev = wm8731_socdev;
654 struct wm8731_setup_data *setup = socdev->codec_data;
655 struct snd_soc_codec *codec = socdev->codec;
656 struct i2c_client *i2c;
657 int ret;
658
659 if (addr != setup->i2c_address)
660 return -ENODEV;
661
662 client_template.adapter = adap;
663 client_template.addr = addr;
664
665 i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
666 if (i2c == NULL) {
667 kfree(codec);
668 return -ENOMEM;
669 }
670 memcpy(i2c, &client_template, sizeof(struct i2c_client));
671 i2c_set_clientdata(i2c, codec);
672 codec->control_data = i2c;
673
674 ret = i2c_attach_client(i2c);
675 if (ret < 0) {
676 err("failed to attach codec at addr %x\n", addr);
677 goto err;
678 }
679
680 ret = wm8731_init(socdev);
681 if (ret < 0) {
682 err("failed to initialise WM8731\n");
683 goto err;
684 }
685 return ret;
686
687err:
688 kfree(codec);
689 kfree(i2c);
690 return ret;
691}
692
693static int wm8731_i2c_detach(struct i2c_client *client)
694{
695 struct snd_soc_codec* codec = i2c_get_clientdata(client);
696 i2c_detach_client(client);
697 kfree(codec->reg_cache);
698 kfree(client);
699 return 0;
700}
701
702static int wm8731_i2c_attach(struct i2c_adapter *adap)
703{
704 return i2c_probe(adap, &addr_data, wm8731_codec_probe);
705}
706
707/* corgi i2c codec control layer */
708static struct i2c_driver wm8731_i2c_driver = {
709 .driver = {
710 .name = "WM8731 I2C Codec",
711 .owner = THIS_MODULE,
712 },
713 .id = I2C_DRIVERID_WM8731,
714 .attach_adapter = wm8731_i2c_attach,
715 .detach_client = wm8731_i2c_detach,
716 .command = NULL,
717};
718
719static struct i2c_client client_template = {
720 .name = "WM8731",
721 .driver = &wm8731_i2c_driver,
722};
723#endif
724
725static int wm8731_probe(struct platform_device *pdev)
726{
727 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
728 struct wm8731_setup_data *setup;
729 struct snd_soc_codec *codec;
730 int ret = 0;
731
732 info("WM8731 Audio Codec %s", WM8731_VERSION);
733
734 setup = socdev->codec_data;
735 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
736 if (codec == NULL)
737 return -ENOMEM;
738
739 socdev->codec = codec;
740 mutex_init(&codec->mutex);
741 INIT_LIST_HEAD(&codec->dapm_widgets);
742 INIT_LIST_HEAD(&codec->dapm_paths);
743
744 wm8731_socdev = socdev;
745#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
746 if (setup->i2c_address) {
747 normal_i2c[0] = setup->i2c_address;
748 codec->hw_write = (hw_write_t)i2c_master_send;
749 ret = i2c_add_driver(&wm8731_i2c_driver);
750 if (ret != 0)
751 printk(KERN_ERR "can't add i2c driver");
752 }
753#else
754 /* Add other interfaces here */
755#endif
756 return ret;
757}
758
759/* power down chip */
760static int wm8731_remove(struct platform_device *pdev)
761{
762 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
763 struct snd_soc_codec *codec = socdev->codec;
764
765 if (codec->control_data)
766 wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
767
768 snd_soc_free_pcms(socdev);
769 snd_soc_dapm_free(socdev);
770#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
771 i2c_del_driver(&wm8731_i2c_driver);
772#endif
773 kfree(codec);
774
775 return 0;
776}
777
778struct snd_soc_codec_device soc_codec_dev_wm8731 = {
779 .probe = wm8731_probe,
780 .remove = wm8731_remove,
781 .suspend = wm8731_suspend,
782 .resume = wm8731_resume,
783};
784
785EXPORT_SYMBOL_GPL(soc_codec_dev_wm8731);
786
787MODULE_DESCRIPTION("ASoC WM8731 driver");
788MODULE_AUTHOR("Richard Purdie");
789MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/wm8731.h b/sound/soc/codecs/wm8731.h
new file mode 100644
index 000000000000..8fa0f53bef1c
--- /dev/null
+++ b/sound/soc/codecs/wm8731.h
@@ -0,0 +1,41 @@
1/*
2 * wm8731.h -- WM8731 Soc Audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on wm8753.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef _WM8731_H
16#define _WM8731_H
17
18/* WM8731 register space */
19
20#define WM8731_LINVOL 0x00
21#define WM8731_RINVOL 0x01
22#define WM8731_LOUT1V 0x02
23#define WM8731_ROUT1V 0x03
24#define WM8731_APANA 0x04
25#define WM8731_APDIGI 0x05
26#define WM8731_PWR 0x06
27#define WM8731_IFACE 0x07
28#define WM8731_SRATE 0x08
29#define WM8731_ACTIVE 0x09
30#define WM8731_RESET 0x0f
31
32#define WM8731_CACHEREGNUM 10
33
34struct wm8731_setup_data {
35 unsigned short i2c_address;
36};
37
38extern struct snd_soc_codec_dai wm8731_dai;
39extern struct snd_soc_codec_device soc_codec_dev_wm8731;
40
41#endif