1 files changed, 17 insertions, 13 deletions

diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index 46ec0e9744d4..fb0c678939bf 100644
--- a/sound/soc/codecs/wm_adsp.c
+++ b/sound/soc/codecs/wm_adsp.c
@@ -1286,6 +1286,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
                                         reg = wm_adsp_region_to_reg(mem,
                                                                     reg);
                                         reg += offset;
+                                        break;
                                 }
                         }
 
@@ -1468,19 +1469,23 @@ static int wm_adsp2_ena(struct wm_adsp *dsp)
         unsigned int val;
         int ret, count;
 
-        ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
-                                 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
+        ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
+                                       ADSP2_SYS_ENA, ADSP2_SYS_ENA);
         if (ret != 0)
                 return ret;
 
         /* Wait for the RAM to start, should be near instantaneous */
-        count = 0;
-        do {
+        for (count = 0; count < 10; ++count) {
                 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
                                   &val);
                 if (ret != 0)
                         return ret;
-        } while (!(val & ADSP2_RAM_RDY) && ++count < 10);
+
+                if (val & ADSP2_RAM_RDY)
+                        break;
+
+                msleep(1);
+        }
 
         if (!(val & ADSP2_RAM_RDY)) {
                 adsp_err(dsp, "Failed to start DSP RAM\n");
@@ -1488,7 +1493,6 @@ static int wm_adsp2_ena(struct wm_adsp *dsp)
         }
 
         adsp_dbg(dsp, "RAM ready after %d polls\n", count);
-        adsp_info(dsp, "RAM ready after %d polls\n", count);
 
         return 0;
 }
@@ -1521,9 +1525,9 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,
                 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
                         >> ARIZONA_SYSCLK_FREQ_SHIFT;
 
-                ret = regmap_update_bits(dsp->regmap,
-                                         dsp->base + ADSP2_CLOCKING,
-                                         ADSP2_CLK_SEL_MASK, val);
+                ret = regmap_update_bits_async(dsp->regmap,
+                                               dsp->base + ADSP2_CLOCKING,
+                                               ADSP2_CLK_SEL_MASK, val);
                 if (ret != 0) {
                         adsp_err(dsp, "Failed to set clock rate: %d\n",
                                  ret);
@@ -1586,10 +1590,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w,
                 if (ret != 0)
                         goto err;
 
-                ret = regmap_update_bits(dsp->regmap,
-                                         dsp->base + ADSP2_CONTROL,
-                                         ADSP2_CORE_ENA | ADSP2_START,
-                                         ADSP2_CORE_ENA | ADSP2_START);
+                ret = regmap_update_bits_async(dsp->regmap,
+                                               dsp->base + ADSP2_CONTROL,
+                                               ADSP2_CORE_ENA | ADSP2_START,
+                                               ADSP2_CORE_ENA | ADSP2_START);
                 if (ret != 0)
                         goto err;