1 files changed, 222 insertions, 54 deletions
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 50003b337722..2f9870aa0cf1 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -983,61 +983,170 @@ static bool wm8994_check_class_w_digital(struct snd_soc_codec *codec)
        return true;
 }
-static int late_enable_ev(struct snd_soc_dapm_widget *w,
+static int aif1clk_ev(struct snd_soc_dapm_widget *w,
-                          struct snd_kcontrol *kcontrol, int event)
+                      struct snd_kcontrol *kcontrol, int event)
 {
        struct snd_soc_codec *codec = w->codec;
-        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+        struct wm8994 *control = codec->control_data;
+        int mask = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA;
+        int dac;
+        int adc;
+        int val;
+        switch (control->type) {
+        case WM8994:
+        case WM8958:
+                mask |= WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA;
+                break;
+        default:
+                break;
+        }
        switch (event) {
        case SND_SOC_DAPM_PRE_PMU:
-                if (wm8994->aif1clk_enable) {
+                val = snd_soc_read(codec, WM8994_AIF1_CONTROL_1);
-                        snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
+                if ((val & WM8994_AIF1ADCL_SRC) &&
-                                            WM8994_AIF1CLK_ENA_MASK,
+                    (val & WM8994_AIF1ADCR_SRC))
-                                            WM8994_AIF1CLK_ENA);
+                        adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA;
-                        wm8994->aif1clk_enable = 0;
+                else if (!(val & WM8994_AIF1ADCL_SRC) &&
-                }
+                         !(val & WM8994_AIF1ADCR_SRC))
-                if (wm8994->aif2clk_enable) {
+                        adc = WM8994_AIF1ADC1L_ENA | WM8994_AIF1ADC2L_ENA;
-                        snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
+                else
-                                            WM8994_AIF2CLK_ENA_MASK,
+                        adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA |
-                                            WM8994_AIF2CLK_ENA);
+                                WM8994_AIF1ADC1L_ENA | WM8994_AIF1ADC2L_ENA;
-                        wm8994->aif2clk_enable = 0;
-                }
+                val = snd_soc_read(codec, WM8994_AIF1_CONTROL_2);
+                if ((val & WM8994_AIF1DACL_SRC) &&
+                    (val & WM8994_AIF1DACR_SRC))
+                        dac = WM8994_AIF1DAC1R_ENA | WM8994_AIF1DAC2R_ENA;
+                else if (!(val & WM8994_AIF1DACL_SRC) &&
+                         !(val & WM8994_AIF1DACR_SRC))
+                        dac = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC2L_ENA;
+                else
+                        dac = WM8994_AIF1DAC1R_ENA | WM8994_AIF1DAC2R_ENA |
+                                WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC2L_ENA;
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
+                                    mask, adc);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
+                                    mask, dac);
+                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
+                                    WM8994_AIF1DSPCLK_ENA |
+                                    WM8994_SYSDSPCLK_ENA,
+                                    WM8994_AIF1DSPCLK_ENA |
+                                    WM8994_SYSDSPCLK_ENA);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4, mask,
+                                    WM8994_AIF1ADC1R_ENA |
+                                    WM8994_AIF1ADC1L_ENA |
+                                    WM8994_AIF1ADC2R_ENA |
+                                    WM8994_AIF1ADC2L_ENA);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, mask,
+                                    WM8994_AIF1DAC1R_ENA |
+                                    WM8994_AIF1DAC1L_ENA |
+                                    WM8994_AIF1DAC2R_ENA |
+                                    WM8994_AIF1DAC2L_ENA);
                break;
-        }
-        /* We may also have postponed startup of DSP, handle that. */
+        case SND_SOC_DAPM_PRE_PMD:
-        wm8958_aif_ev(w, kcontrol, event);
+        case SND_SOC_DAPM_POST_PMD:
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
+                                    mask, 0);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
+                                    mask, 0);
+                val = snd_soc_read(codec, WM8994_CLOCKING_1);
+                if (val & WM8994_AIF2DSPCLK_ENA)
+                        val = WM8994_SYSDSPCLK_ENA;
+                else
+                        val = 0;
+                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
+                                    WM8994_SYSDSPCLK_ENA |
+                                    WM8994_AIF1DSPCLK_ENA, val);
+                break;
+        }
        return 0;
 }
-static int late_disable_ev(struct snd_soc_dapm_widget *w,
+static int aif2clk_ev(struct snd_soc_dapm_widget *w,
-                           struct snd_kcontrol *kcontrol, int event)
+                      struct snd_kcontrol *kcontrol, int event)
 {
        struct snd_soc_codec *codec = w->codec;
-        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+        int dac;
+        int adc;
+        int val;
        switch (event) {
+        case SND_SOC_DAPM_PRE_PMU:
+                val = snd_soc_read(codec, WM8994_AIF2_CONTROL_1);
+                if ((val & WM8994_AIF2ADCL_SRC) &&
+                    (val & WM8994_AIF2ADCR_SRC))
+                        adc = WM8994_AIF2ADCR_ENA;
+                else if (!(val & WM8994_AIF2ADCL_SRC) &&
+                         !(val & WM8994_AIF2ADCR_SRC))
+                        adc = WM8994_AIF2ADCL_ENA;
+                else
+                        adc = WM8994_AIF2ADCL_ENA | WM8994_AIF2ADCR_ENA;
+                val = snd_soc_read(codec, WM8994_AIF2_CONTROL_2);
+                if ((val & WM8994_AIF2DACL_SRC) &&
+                    (val & WM8994_AIF2DACR_SRC))
+                        dac = WM8994_AIF2DACR_ENA;
+                else if (!(val & WM8994_AIF2DACL_SRC) &&
+                         !(val & WM8994_AIF2DACR_SRC))
+                        dac = WM8994_AIF2DACL_ENA;
+                else
+                        dac = WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA;
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
+                                    WM8994_AIF2ADCL_ENA |
+                                    WM8994_AIF2ADCR_ENA, adc);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
+                                    WM8994_AIF2DACL_ENA |
+                                    WM8994_AIF2DACR_ENA, dac);
+                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
+                                    WM8994_AIF2DSPCLK_ENA |
+                                    WM8994_SYSDSPCLK_ENA,
+                                    WM8994_AIF2DSPCLK_ENA |
+                                    WM8994_SYSDSPCLK_ENA);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
+                                    WM8994_AIF2ADCL_ENA |
+                                    WM8994_AIF2ADCR_ENA,
+                                    WM8994_AIF2ADCL_ENA |
+                                    WM8994_AIF2ADCR_ENA);
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
+                                    WM8994_AIF2DACL_ENA |
+                                    WM8994_AIF2DACR_ENA,
+                                    WM8994_AIF2DACL_ENA |
+                                    WM8994_AIF2DACR_ENA);
+                break;
+        case SND_SOC_DAPM_PRE_PMD:
        case SND_SOC_DAPM_POST_PMD:
-                if (wm8994->aif1clk_disable) {
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
-                        snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
+                                    WM8994_AIF2DACL_ENA |
-                                            WM8994_AIF1CLK_ENA_MASK, 0);
+                                    WM8994_AIF2DACR_ENA, 0);
-                        wm8994->aif1clk_disable = 0;
+                snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
-                }
+                                    WM8994_AIF2ADCL_ENA |
-                if (wm8994->aif2clk_disable) {
+                                    WM8994_AIF2ADCR_ENA, 0);
-                        snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
-                                            WM8994_AIF2CLK_ENA_MASK, 0);
+                val = snd_soc_read(codec, WM8994_CLOCKING_1);
-                        wm8994->aif2clk_disable = 0;
+                if (val & WM8994_AIF1DSPCLK_ENA)
-                }
+                        val = WM8994_SYSDSPCLK_ENA;
+                else
+                        val = 0;
+                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
+                                    WM8994_SYSDSPCLK_ENA |
+                                    WM8994_AIF2DSPCLK_ENA, val);
                break;
        }
        return 0;
 }
-static int aif1clk_ev(struct snd_soc_dapm_widget *w,
+static int aif1clk_late_ev(struct snd_soc_dapm_widget *w,
-                      struct snd_kcontrol *kcontrol, int event)
+                           struct snd_kcontrol *kcontrol, int event)
 {
        struct snd_soc_codec *codec = w->codec;
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1054,8 +1163,8 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
        return 0;
 }
-static int aif2clk_ev(struct snd_soc_dapm_widget *w,
+static int aif2clk_late_ev(struct snd_soc_dapm_widget *w,
-                      struct snd_kcontrol *kcontrol, int event)
+                           struct snd_kcontrol *kcontrol, int event)
 {
        struct snd_soc_codec *codec = w->codec;
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1072,6 +1181,63 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
        return 0;
 }
+static int late_enable_ev(struct snd_soc_dapm_widget *w,
+                          struct snd_kcontrol *kcontrol, int event)
+{
+        struct snd_soc_codec *codec = w->codec;
+        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+        switch (event) {
+        case SND_SOC_DAPM_PRE_PMU:
+                if (wm8994->aif1clk_enable) {
+                        aif1clk_ev(w, kcontrol, event);
+                        snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
+                                            WM8994_AIF1CLK_ENA_MASK,
+                                            WM8994_AIF1CLK_ENA);
+                        wm8994->aif1clk_enable = 0;
+                }
+                if (wm8994->aif2clk_enable) {
+                        aif2clk_ev(w, kcontrol, event);
+                        snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
+                                            WM8994_AIF2CLK_ENA_MASK,
+                                            WM8994_AIF2CLK_ENA);
+                        wm8994->aif2clk_enable = 0;
+                }
+                break;
+        }
+        /* We may also have postponed startup of DSP, handle that. */
+        wm8958_aif_ev(w, kcontrol, event);
+        return 0;
+}
+static int late_disable_ev(struct snd_soc_dapm_widget *w,
+                           struct snd_kcontrol *kcontrol, int event)
+{
+        struct snd_soc_codec *codec = w->codec;
+        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+        switch (event) {
+        case SND_SOC_DAPM_POST_PMD:
+                if (wm8994->aif1clk_disable) {
+                        snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
+                                            WM8994_AIF1CLK_ENA_MASK, 0);
+                        aif1clk_ev(w, kcontrol, event);
+                        wm8994->aif1clk_disable = 0;
+                }
+                if (wm8994->aif2clk_disable) {
+                        snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
+                                            WM8994_AIF2CLK_ENA_MASK, 0);
+                        aif2clk_ev(w, kcontrol, event);
+                        wm8994->aif2clk_disable = 0;
+                }
+                break;
+        }
+        return 0;
+}
 static int adc_mux_ev(struct snd_soc_dapm_widget *w,
                      struct snd_kcontrol *kcontrol, int event)
 {
@@ -1329,9 +1495,9 @@ static const struct snd_kcontrol_new aif2dacr_src_mux =
        SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum);
 static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = {
-SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_ev,
+SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_late_ev,
        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
-SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_ev,
+SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_late_ev,
        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
@@ -1360,8 +1526,10 @@ SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev)
 };
 static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = {
-SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0),
+SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, aif1clk_ev,
-SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0),
+                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
+SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, aif2clk_ev,
+                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
 SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
 SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,
                   left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
@@ -1414,30 +1582,30 @@ SND_SOC_DAPM_SUPPLY("VMID", SND_SOC_NOPM, 0, 0, vmid_event,
 SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
                    SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
-SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0),
+SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM, 3, 0, NULL, 0),
-SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0),
+SND_SOC_DAPM_SUPPLY("DSP2CLK", SND_SOC_NOPM, 2, 0, NULL, 0),
-SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0),
+SND_SOC_DAPM_SUPPLY("DSPINTCLK", SND_SOC_NOPM, 1, 0, NULL, 0),
 SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL,
-                     0, WM8994_POWER_MANAGEMENT_4, 9, 0),
+                     0, SND_SOC_NOPM, 9, 0),
 SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL,
-                     0, WM8994_POWER_MANAGEMENT_4, 8, 0),
+                     0, SND_SOC_NOPM, 8, 0),
 SND_SOC_DAPM_AIF_IN_E("AIF1DAC1L", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 9, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 9, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 SND_SOC_DAPM_AIF_IN_E("AIF1DAC1R", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 8, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 8, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", NULL,
-                     0, WM8994_POWER_MANAGEMENT_4, 11, 0),
+                     0, SND_SOC_NOPM, 11, 0),
 SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", NULL,
-                     0, WM8994_POWER_MANAGEMENT_4, 10, 0),
+                     0, SND_SOC_NOPM, 10, 0),
 SND_SOC_DAPM_AIF_IN_E("AIF1DAC2L", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 11, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 11, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 SND_SOC_DAPM_AIF_IN_E("AIF1DAC2R", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 10, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 10, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,
@@ -1464,14 +1632,14 @@ SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
                   dac1r_mix, ARRAY_SIZE(dac1r_mix)),
 SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0,
-                     WM8994_POWER_MANAGEMENT_4, 13, 0),
+                     SND_SOC_NOPM, 13, 0),
 SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0,
-                     WM8994_POWER_MANAGEMENT_4, 12, 0),
+                     SND_SOC_NOPM, 12, 0),
 SND_SOC_DAPM_AIF_IN_E("AIF2DACL", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 13, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 13, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 SND_SOC_DAPM_AIF_IN_E("AIF2DACR", NULL, 0,
-                      WM8994_POWER_MANAGEMENT_5, 12, 0, wm8958_aif_ev,
+                      SND_SOC_NOPM, 12, 0, wm8958_aif_ev,
                      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 SND_SOC_DAPM_AIF_IN("AIF1DACDAT", NULL, 0, SND_SOC_NOPM, 0, 0),

diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 50003b337722..2f9870aa0cf1 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c
@@ -983,61 +983,170 @@ static bool wm8994_check_class_w_digital(struct snd_soc_codec *codec)
983	return true;	983	return true;
984	}	984	}
985		985
986	static int late_enable_ev(struct snd_soc_dapm_widget *w,	986	static int aif1clk_ev(struct snd_soc_dapm_widget *w,
987	struct snd_kcontrol *kcontrol, int event)	987	struct snd_kcontrol *kcontrol, int event)
988	{	988	{
989	struct snd_soc_codec *codec = w->codec;	989	struct snd_soc_codec *codec = w->codec;
990	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);	990	struct wm8994 *control = codec->control_data;
		991	int mask = WM8994_AIF1DAC1L_ENA \| WM8994_AIF1DAC1R_ENA;
		992	int dac;
		993	int adc;
		994	int val;
		995
		996	switch (control->type) {
		997	case WM8994:
		998	case WM8958:
		999	mask \|= WM8994_AIF1DAC2L_ENA \| WM8994_AIF1DAC2R_ENA;
		1000	break;
		1001	default:
		1002	break;
		1003	}
991		1004
992	switch (event) {	1005	switch (event) {
993	case SND_SOC_DAPM_PRE_PMU:	1006	case SND_SOC_DAPM_PRE_PMU:
994	if (wm8994->aif1clk_enable) {	1007	val = snd_soc_read(codec, WM8994_AIF1_CONTROL_1);
995	snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,	1008	if ((val & WM8994_AIF1ADCL_SRC) &&
996	WM8994_AIF1CLK_ENA_MASK,	1009	(val & WM8994_AIF1ADCR_SRC))
997	WM8994_AIF1CLK_ENA);	1010	adc = WM8994_AIF1ADC1R_ENA \| WM8994_AIF1ADC2R_ENA;
998	wm8994->aif1clk_enable = 0;	1011	else if (!(val & WM8994_AIF1ADCL_SRC) &&
999	}	1012	!(val & WM8994_AIF1ADCR_SRC))
1000	if (wm8994->aif2clk_enable) {	1013	adc = WM8994_AIF1ADC1L_ENA \| WM8994_AIF1ADC2L_ENA;
1001	snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,	1014	else
1002	WM8994_AIF2CLK_ENA_MASK,	1015	adc = WM8994_AIF1ADC1R_ENA \| WM8994_AIF1ADC2R_ENA \|
1003	WM8994_AIF2CLK_ENA);	1016	WM8994_AIF1ADC1L_ENA \| WM8994_AIF1ADC2L_ENA;
1004	wm8994->aif2clk_enable = 0;	1017
1005	}	1018	val = snd_soc_read(codec, WM8994_AIF1_CONTROL_2);
		1019	if ((val & WM8994_AIF1DACL_SRC) &&
		1020	(val & WM8994_AIF1DACR_SRC))
		1021	dac = WM8994_AIF1DAC1R_ENA \| WM8994_AIF1DAC2R_ENA;
		1022	else if (!(val & WM8994_AIF1DACL_SRC) &&
		1023	!(val & WM8994_AIF1DACR_SRC))
		1024	dac = WM8994_AIF1DAC1L_ENA \| WM8994_AIF1DAC2L_ENA;
		1025	else
		1026	dac = WM8994_AIF1DAC1R_ENA \| WM8994_AIF1DAC2R_ENA \|
		1027	WM8994_AIF1DAC1L_ENA \| WM8994_AIF1DAC2L_ENA;
		1028
		1029	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
		1030	mask, adc);
		1031	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
		1032	mask, dac);
		1033	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
		1034	WM8994_AIF1DSPCLK_ENA \|
		1035	WM8994_SYSDSPCLK_ENA,
		1036	WM8994_AIF1DSPCLK_ENA \|
		1037	WM8994_SYSDSPCLK_ENA);
		1038	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4, mask,
		1039	WM8994_AIF1ADC1R_ENA \|
		1040	WM8994_AIF1ADC1L_ENA \|
		1041	WM8994_AIF1ADC2R_ENA \|
		1042	WM8994_AIF1ADC2L_ENA);
		1043	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, mask,
		1044	WM8994_AIF1DAC1R_ENA \|
		1045	WM8994_AIF1DAC1L_ENA \|
		1046	WM8994_AIF1DAC2R_ENA \|
		1047	WM8994_AIF1DAC2L_ENA);
1006	break;	1048	break;
1007	}
1008		1049
1009	/* We may also have postponed startup of DSP, handle that. */	1050	case SND_SOC_DAPM_PRE_PMD:
1010	wm8958_aif_ev(w, kcontrol, event);	1051	case SND_SOC_DAPM_POST_PMD:
		1052	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
		1053	mask, 0);
		1054	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
		1055	mask, 0);
		1056
		1057	val = snd_soc_read(codec, WM8994_CLOCKING_1);
		1058	if (val & WM8994_AIF2DSPCLK_ENA)
		1059	val = WM8994_SYSDSPCLK_ENA;
		1060	else
		1061	val = 0;
		1062	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
		1063	WM8994_SYSDSPCLK_ENA \|
		1064	WM8994_AIF1DSPCLK_ENA, val);
		1065	break;
		1066	}
1011		1067
1012	return 0;	1068	return 0;
1013	}	1069	}
1014		1070
1015	static int late_disable_ev(struct snd_soc_dapm_widget *w,	1071	static int aif2clk_ev(struct snd_soc_dapm_widget *w,
1016	struct snd_kcontrol *kcontrol, int event)	1072	struct snd_kcontrol *kcontrol, int event)
1017	{	1073	{
1018	struct snd_soc_codec *codec = w->codec;	1074	struct snd_soc_codec *codec = w->codec;
1019	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);	1075	int dac;
		1076	int adc;
		1077	int val;
1020		1078
1021	switch (event) {	1079	switch (event) {
		1080	case SND_SOC_DAPM_PRE_PMU:
		1081	val = snd_soc_read(codec, WM8994_AIF2_CONTROL_1);
		1082	if ((val & WM8994_AIF2ADCL_SRC) &&
		1083	(val & WM8994_AIF2ADCR_SRC))
		1084	adc = WM8994_AIF2ADCR_ENA;
		1085	else if (!(val & WM8994_AIF2ADCL_SRC) &&
		1086	!(val & WM8994_AIF2ADCR_SRC))
		1087	adc = WM8994_AIF2ADCL_ENA;
		1088	else
		1089	adc = WM8994_AIF2ADCL_ENA \| WM8994_AIF2ADCR_ENA;
		1090
		1091
		1092	val = snd_soc_read(codec, WM8994_AIF2_CONTROL_2);
		1093	if ((val & WM8994_AIF2DACL_SRC) &&
		1094	(val & WM8994_AIF2DACR_SRC))
		1095	dac = WM8994_AIF2DACR_ENA;
		1096	else if (!(val & WM8994_AIF2DACL_SRC) &&
		1097	!(val & WM8994_AIF2DACR_SRC))
		1098	dac = WM8994_AIF2DACL_ENA;
		1099	else
		1100	dac = WM8994_AIF2DACL_ENA \| WM8994_AIF2DACR_ENA;
		1101
		1102	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
		1103	WM8994_AIF2ADCL_ENA \|
		1104	WM8994_AIF2ADCR_ENA, adc);
		1105	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
		1106	WM8994_AIF2DACL_ENA \|
		1107	WM8994_AIF2DACR_ENA, dac);
		1108	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
		1109	WM8994_AIF2DSPCLK_ENA \|
		1110	WM8994_SYSDSPCLK_ENA,
		1111	WM8994_AIF2DSPCLK_ENA \|
		1112	WM8994_SYSDSPCLK_ENA);
		1113	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
		1114	WM8994_AIF2ADCL_ENA \|
		1115	WM8994_AIF2ADCR_ENA,
		1116	WM8994_AIF2ADCL_ENA \|
		1117	WM8994_AIF2ADCR_ENA);
		1118	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
		1119	WM8994_AIF2DACL_ENA \|
		1120	WM8994_AIF2DACR_ENA,
		1121	WM8994_AIF2DACL_ENA \|
		1122	WM8994_AIF2DACR_ENA);
		1123	break;
		1124
		1125	case SND_SOC_DAPM_PRE_PMD:
1022	case SND_SOC_DAPM_POST_PMD:	1126	case SND_SOC_DAPM_POST_PMD:
1023	if (wm8994->aif1clk_disable) {	1127	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1024	snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,	1128	WM8994_AIF2DACL_ENA \|
1025	WM8994_AIF1CLK_ENA_MASK, 0);	1129	WM8994_AIF2DACR_ENA, 0);
1026	wm8994->aif1clk_disable = 0;	1130	snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1027	}	1131	WM8994_AIF2ADCL_ENA \|
1028	if (wm8994->aif2clk_disable) {	1132	WM8994_AIF2ADCR_ENA, 0);
1029	snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,	1133
1030	WM8994_AIF2CLK_ENA_MASK, 0);	1134	val = snd_soc_read(codec, WM8994_CLOCKING_1);
1031	wm8994->aif2clk_disable = 0;	1135	if (val & WM8994_AIF1DSPCLK_ENA)
1032	}	1136	val = WM8994_SYSDSPCLK_ENA;
		1137	else
		1138	val = 0;
		1139	snd_soc_update_bits(codec, WM8994_CLOCKING_1,
		1140	WM8994_SYSDSPCLK_ENA \|
		1141	WM8994_AIF2DSPCLK_ENA, val);
1033	break;	1142	break;
1034	}	1143	}
1035		1144
1036	return 0;	1145	return 0;
1037	}	1146	}
1038		1147
1039	static int aif1clk_ev(struct snd_soc_dapm_widget *w,	1148	static int aif1clk_late_ev(struct snd_soc_dapm_widget *w,
1040	struct snd_kcontrol *kcontrol, int event)	1149	struct snd_kcontrol *kcontrol, int event)
1041	{	1150	{
1042	struct snd_soc_codec *codec = w->codec;	1151	struct snd_soc_codec *codec = w->codec;
1043	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);	1152	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1054,8 +1163,8 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
1054	return 0;	1163	return 0;
1055	}	1164	}
1056		1165
1057	static int aif2clk_ev(struct snd_soc_dapm_widget *w,	1166	static int aif2clk_late_ev(struct snd_soc_dapm_widget *w,
1058	struct snd_kcontrol *kcontrol, int event)	1167	struct snd_kcontrol *kcontrol, int event)
1059	{	1168	{
1060	struct snd_soc_codec *codec = w->codec;	1169	struct snd_soc_codec *codec = w->codec;
1061	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);	1170	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1072,6 +1181,63 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
1072	return 0;	1181	return 0;
1073	}	1182	}
1074		1183
		1184	static int late_enable_ev(struct snd_soc_dapm_widget *w,
		1185	struct snd_kcontrol *kcontrol, int event)
		1186	{
		1187	struct snd_soc_codec *codec = w->codec;
		1188	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
		1189
		1190	switch (event) {
		1191	case SND_SOC_DAPM_PRE_PMU:
		1192	if (wm8994->aif1clk_enable) {
		1193	aif1clk_ev(w, kcontrol, event);
		1194	snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
		1195	WM8994_AIF1CLK_ENA_MASK,
		1196	WM8994_AIF1CLK_ENA);
		1197	wm8994->aif1clk_enable = 0;
		1198	}
		1199	if (wm8994->aif2clk_enable) {
		1200	aif2clk_ev(w, kcontrol, event);
		1201	snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
		1202	WM8994_AIF2CLK_ENA_MASK,
		1203	WM8994_AIF2CLK_ENA);
		1204	wm8994->aif2clk_enable = 0;
		1205	}
		1206	break;
		1207	}
		1208
		1209	/* We may also have postponed startup of DSP, handle that. */
		1210	wm8958_aif_ev(w, kcontrol, event);
		1211
		1212	return 0;
		1213	}
		1214
		1215	static int late_disable_ev(struct snd_soc_dapm_widget *w,
		1216	struct snd_kcontrol *kcontrol, int event)
		1217	{
		1218	struct snd_soc_codec *codec = w->codec;
		1219	struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
		1220
		1221	switch (event) {
		1222	case SND_SOC_DAPM_POST_PMD:
		1223	if (wm8994->aif1clk_disable) {
		1224	snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
		1225	WM8994_AIF1CLK_ENA_MASK, 0);
		1226	aif1clk_ev(w, kcontrol, event);
		1227	wm8994->aif1clk_disable = 0;
		1228	}
		1229	if (wm8994->aif2clk_disable) {
		1230	snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
		1231	WM8994_AIF2CLK_ENA_MASK, 0);
		1232	aif2clk_ev(w, kcontrol, event);
		1233	wm8994->aif2clk_disable = 0;
		1234	}
		1235	break;
		1236	}
		1237
		1238	return 0;
		1239	}
		1240
1075	static int adc_mux_ev(struct snd_soc_dapm_widget *w,	1241	static int adc_mux_ev(struct snd_soc_dapm_widget *w,
1076	struct snd_kcontrol *kcontrol, int event)	1242	struct snd_kcontrol *kcontrol, int event)
1077	{	1243	{
@@ -1329,9 +1495,9 @@ static const struct snd_kcontrol_new aif2dacr_src_mux =
1329	SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum);	1495	SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum);
1330		1496
1331	static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = {	1497	static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = {
1332	SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_ev,	1498	SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_late_ev,
1333	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),	1499	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
1334	SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_ev,	1500	SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_late_ev,
1335	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),	1501	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
1336		1502
1337	SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0,	1503	SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
@@ -1360,8 +1526,10 @@ SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev)
1360	};	1526	};
1361		1527
1362	static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = {	1528	static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = {
1363	SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0),	1529	SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, aif1clk_ev,
1364	SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0),	1530	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_PRE_PMD),
		1531	SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, aif2clk_ev,
		1532	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_PRE_PMD),
1365	SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),	1533	SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
1366	SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,	1534	SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,
1367	left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),	1535	left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
@@ -1414,30 +1582,30 @@ SND_SOC_DAPM_SUPPLY("VMID", SND_SOC_NOPM, 0, 0, vmid_event,
1414	SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,	1582	SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
1415	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),	1583	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),
1416		1584
1417	SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0),	1585	SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM, 3, 0, NULL, 0),
1418	SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0),	1586	SND_SOC_DAPM_SUPPLY("DSP2CLK", SND_SOC_NOPM, 2, 0, NULL, 0),
1419	SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0),	1587	SND_SOC_DAPM_SUPPLY("DSPINTCLK", SND_SOC_NOPM, 1, 0, NULL, 0),
1420		1588
1421	SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL,	1589	SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL,
1422	0, WM8994_POWER_MANAGEMENT_4, 9, 0),	1590	0, SND_SOC_NOPM, 9, 0),
1423	SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL,	1591	SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL,
1424	0, WM8994_POWER_MANAGEMENT_4, 8, 0),	1592	0, SND_SOC_NOPM, 8, 0),
1425	SND_SOC_DAPM_AIF_IN_E("AIF1DAC1L", NULL, 0,	1593	SND_SOC_DAPM_AIF_IN_E("AIF1DAC1L", NULL, 0,
1426	WM8994_POWER_MANAGEMENT_5, 9, 0, wm8958_aif_ev,	1594	SND_SOC_NOPM, 9, 0, wm8958_aif_ev,
1427	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),	1595	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),
1428	SND_SOC_DAPM_AIF_IN_E("AIF1DAC1R", NULL, 0,	1596	SND_SOC_DAPM_AIF_IN_E("AIF1DAC1R", NULL, 0,
1429	WM8994_POWER_MANAGEMENT_5, 8, 0, wm8958_aif_ev,	1597	SND_SOC_NOPM, 8, 0, wm8958_aif_ev,
1430	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),	1598	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),
1431		1599
1432	SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", NULL,	1600	SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", NULL,
1433	0, WM8994_POWER_MANAGEMENT_4, 11, 0),	1601	0, SND_SOC_NOPM, 11, 0),
1434	SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", NULL,	1602	SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", NULL,
1435	0, WM8994_POWER_MANAGEMENT_4, 10, 0),	1603	0, SND_SOC_NOPM, 10, 0),
1436	SND_SOC_DAPM_AIF_IN_E("AIF1DAC2L", NULL, 0,	1604	SND_SOC_DAPM_AIF_IN_E("AIF1DAC2L", NULL, 0,
1437	WM8994_POWER_MANAGEMENT_5, 11, 0, wm8958_aif_ev,	1605	SND_SOC_NOPM, 11, 0, wm8958_aif_ev,
1438	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),	1606	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),
1439	SND_SOC_DAPM_AIF_IN_E("AIF1DAC2R", NULL, 0,	1607	SND_SOC_DAPM_AIF_IN_E("AIF1DAC2R", NULL, 0,
1440	WM8994_POWER_MANAGEMENT_5, 10, 0, wm8958_aif_ev,	1608	SND_SOC_NOPM, 10, 0, wm8958_aif_ev,
1441	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),	1609	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),
1442		1610
1443	SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,	1611	SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,
@@ -1464,14 +1632,14 @@ SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
1464	dac1r_mix, ARRAY_SIZE(dac1r_mix)),	1632	dac1r_mix, ARRAY_SIZE(dac1r_mix)),
1465		1633
1466	SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0,	1634	SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0,
1467	WM8994_POWER_MANAGEMENT_4, 13, 0),	1635	SND_SOC_NOPM, 13, 0),
1468	SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0,	1636	SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0,
1469	WM8994_POWER_MANAGEMENT_4, 12, 0),	1637	SND_SOC_NOPM, 12, 0),
1470	SND_SOC_DAPM_AIF_IN_E("AIF2DACL", NULL, 0,	1638	SND_SOC_DAPM_AIF_IN_E("AIF2DACL", NULL, 0,
1471	WM8994_POWER_MANAGEMENT_5, 13, 0, wm8958_aif_ev,	1639	SND_SOC_NOPM, 13, 0, wm8958_aif_ev,
1472	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),	1640	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),
1473	SND_SOC_DAPM_AIF_IN_E("AIF2DACR", NULL, 0,	1641	SND_SOC_DAPM_AIF_IN_E("AIF2DACR", NULL, 0,
1474	WM8994_POWER_MANAGEMENT_5, 12, 0, wm8958_aif_ev,	1642	SND_SOC_NOPM, 12, 0, wm8958_aif_ev,
1475	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),	1643	SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_PRE_PMD),
1476		1644
1477	SND_SOC_DAPM_AIF_IN("AIF1DACDAT", NULL, 0, SND_SOC_NOPM, 0, 0),	1645	SND_SOC_DAPM_AIF_IN("AIF1DACDAT", NULL, 0, SND_SOC_NOPM, 0, 0),