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Diffstat (limited to 'sound/soc/codecs/wm8994.c')
-rw-r--r--sound/soc/codecs/wm8994.c276
1 files changed, 222 insertions, 54 deletions
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 7c49642af052..6c1fe3afd4b5 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -1000,61 +1000,170 @@ static void wm8994_update_class_w(struct snd_soc_codec *codec)
1000 } 1000 }
1001} 1001}
1002 1002
1003static int late_enable_ev(struct snd_soc_dapm_widget *w, 1003static int aif1clk_ev(struct snd_soc_dapm_widget *w,
1004 struct snd_kcontrol *kcontrol, int event) 1004 struct snd_kcontrol *kcontrol, int event)
1005{ 1005{
1006 struct snd_soc_codec *codec = w->codec; 1006 struct snd_soc_codec *codec = w->codec;
1007 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 1007 struct wm8994 *control = codec->control_data;
1008 int mask = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA;
1009 int dac;
1010 int adc;
1011 int val;
1012
1013 switch (control->type) {
1014 case WM8994:
1015 case WM8958:
1016 mask |= WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA;
1017 break;
1018 default:
1019 break;
1020 }
1008 1021
1009 switch (event) { 1022 switch (event) {
1010 case SND_SOC_DAPM_PRE_PMU: 1023 case SND_SOC_DAPM_PRE_PMU:
1011 if (wm8994->aif1clk_enable) { 1024 val = snd_soc_read(codec, WM8994_AIF1_CONTROL_1);
1012 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1025 if ((val & WM8994_AIF1ADCL_SRC) &&
1013 WM8994_AIF1CLK_ENA_MASK, 1026 (val & WM8994_AIF1ADCR_SRC))
1014 WM8994_AIF1CLK_ENA); 1027 adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA;
1015 wm8994->aif1clk_enable = 0; 1028 else if (!(val & WM8994_AIF1ADCL_SRC) &&
1016 } 1029 !(val & WM8994_AIF1ADCR_SRC))
1017 if (wm8994->aif2clk_enable) { 1030 adc = WM8994_AIF1ADC1L_ENA | WM8994_AIF1ADC2L_ENA;
1018 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1031 else
1019 WM8994_AIF2CLK_ENA_MASK, 1032 adc = WM8994_AIF1ADC1R_ENA | WM8994_AIF1ADC2R_ENA |
1020 WM8994_AIF2CLK_ENA); 1033 WM8994_AIF1ADC1L_ENA | WM8994_AIF1ADC2L_ENA;
1021 wm8994->aif2clk_enable = 0; 1034
1022 } 1035 val = snd_soc_read(codec, WM8994_AIF1_CONTROL_2);
1036 if ((val & WM8994_AIF1DACL_SRC) &&
1037 (val & WM8994_AIF1DACR_SRC))
1038 dac = WM8994_AIF1DAC1R_ENA | WM8994_AIF1DAC2R_ENA;
1039 else if (!(val & WM8994_AIF1DACL_SRC) &&
1040 !(val & WM8994_AIF1DACR_SRC))
1041 dac = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC2L_ENA;
1042 else
1043 dac = WM8994_AIF1DAC1R_ENA | WM8994_AIF1DAC2R_ENA |
1044 WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC2L_ENA;
1045
1046 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
1047 mask, adc);
1048 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1049 mask, dac);
1050 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
1051 WM8994_AIF1DSPCLK_ENA |
1052 WM8994_SYSDSPCLK_ENA,
1053 WM8994_AIF1DSPCLK_ENA |
1054 WM8994_SYSDSPCLK_ENA);
1055 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4, mask,
1056 WM8994_AIF1ADC1R_ENA |
1057 WM8994_AIF1ADC1L_ENA |
1058 WM8994_AIF1ADC2R_ENA |
1059 WM8994_AIF1ADC2L_ENA);
1060 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, mask,
1061 WM8994_AIF1DAC1R_ENA |
1062 WM8994_AIF1DAC1L_ENA |
1063 WM8994_AIF1DAC2R_ENA |
1064 WM8994_AIF1DAC2L_ENA);
1023 break; 1065 break;
1024 }
1025 1066
1026 /* We may also have postponed startup of DSP, handle that. */ 1067 case SND_SOC_DAPM_PRE_PMD:
1027 wm8958_aif_ev(w, kcontrol, event); 1068 case SND_SOC_DAPM_POST_PMD:
1069 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1070 mask, 0);
1071 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
1072 mask, 0);
1073
1074 val = snd_soc_read(codec, WM8994_CLOCKING_1);
1075 if (val & WM8994_AIF2DSPCLK_ENA)
1076 val = WM8994_SYSDSPCLK_ENA;
1077 else
1078 val = 0;
1079 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
1080 WM8994_SYSDSPCLK_ENA |
1081 WM8994_AIF1DSPCLK_ENA, val);
1082 break;
1083 }
1028 1084
1029 return 0; 1085 return 0;
1030} 1086}
1031 1087
1032static int late_disable_ev(struct snd_soc_dapm_widget *w, 1088static int aif2clk_ev(struct snd_soc_dapm_widget *w,
1033 struct snd_kcontrol *kcontrol, int event) 1089 struct snd_kcontrol *kcontrol, int event)
1034{ 1090{
1035 struct snd_soc_codec *codec = w->codec; 1091 struct snd_soc_codec *codec = w->codec;
1036 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 1092 int dac;
1093 int adc;
1094 int val;
1037 1095
1038 switch (event) { 1096 switch (event) {
1097 case SND_SOC_DAPM_PRE_PMU:
1098 val = snd_soc_read(codec, WM8994_AIF2_CONTROL_1);
1099 if ((val & WM8994_AIF2ADCL_SRC) &&
1100 (val & WM8994_AIF2ADCR_SRC))
1101 adc = WM8994_AIF2ADCR_ENA;
1102 else if (!(val & WM8994_AIF2ADCL_SRC) &&
1103 !(val & WM8994_AIF2ADCR_SRC))
1104 adc = WM8994_AIF2ADCL_ENA;
1105 else
1106 adc = WM8994_AIF2ADCL_ENA | WM8994_AIF2ADCR_ENA;
1107
1108
1109 val = snd_soc_read(codec, WM8994_AIF2_CONTROL_2);
1110 if ((val & WM8994_AIF2DACL_SRC) &&
1111 (val & WM8994_AIF2DACR_SRC))
1112 dac = WM8994_AIF2DACR_ENA;
1113 else if (!(val & WM8994_AIF2DACL_SRC) &&
1114 !(val & WM8994_AIF2DACR_SRC))
1115 dac = WM8994_AIF2DACL_ENA;
1116 else
1117 dac = WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA;
1118
1119 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
1120 WM8994_AIF2ADCL_ENA |
1121 WM8994_AIF2ADCR_ENA, adc);
1122 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1123 WM8994_AIF2DACL_ENA |
1124 WM8994_AIF2DACR_ENA, dac);
1125 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
1126 WM8994_AIF2DSPCLK_ENA |
1127 WM8994_SYSDSPCLK_ENA,
1128 WM8994_AIF2DSPCLK_ENA |
1129 WM8994_SYSDSPCLK_ENA);
1130 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4,
1131 WM8994_AIF2ADCL_ENA |
1132 WM8994_AIF2ADCR_ENA,
1133 WM8994_AIF2ADCL_ENA |
1134 WM8994_AIF2ADCR_ENA);
1135 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1136 WM8994_AIF2DACL_ENA |
1137 WM8994_AIF2DACR_ENA,
1138 WM8994_AIF2DACL_ENA |
1139 WM8994_AIF2DACR_ENA);
1140 break;
1141
1142 case SND_SOC_DAPM_PRE_PMD:
1039 case SND_SOC_DAPM_POST_PMD: 1143 case SND_SOC_DAPM_POST_PMD:
1040 if (wm8994->aif1clk_disable) { 1144 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1041 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1145 WM8994_AIF2DACL_ENA |
1042 WM8994_AIF1CLK_ENA_MASK, 0); 1146 WM8994_AIF2DACR_ENA, 0);
1043 wm8994->aif1clk_disable = 0; 1147 snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
1044 } 1148 WM8994_AIF2ADCL_ENA |
1045 if (wm8994->aif2clk_disable) { 1149 WM8994_AIF2ADCR_ENA, 0);
1046 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1150
1047 WM8994_AIF2CLK_ENA_MASK, 0); 1151 val = snd_soc_read(codec, WM8994_CLOCKING_1);
1048 wm8994->aif2clk_disable = 0; 1152 if (val & WM8994_AIF1DSPCLK_ENA)
1049 } 1153 val = WM8994_SYSDSPCLK_ENA;
1154 else
1155 val = 0;
1156 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
1157 WM8994_SYSDSPCLK_ENA |
1158 WM8994_AIF2DSPCLK_ENA, val);
1050 break; 1159 break;
1051 } 1160 }
1052 1161
1053 return 0; 1162 return 0;
1054} 1163}
1055 1164
1056static int aif1clk_ev(struct snd_soc_dapm_widget *w, 1165static int aif1clk_late_ev(struct snd_soc_dapm_widget *w,
1057 struct snd_kcontrol *kcontrol, int event) 1166 struct snd_kcontrol *kcontrol, int event)
1058{ 1167{
1059 struct snd_soc_codec *codec = w->codec; 1168 struct snd_soc_codec *codec = w->codec;
1060 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 1169 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1071,8 +1180,8 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
1071 return 0; 1180 return 0;
1072} 1181}
1073 1182
1074static int aif2clk_ev(struct snd_soc_dapm_widget *w, 1183static int aif2clk_late_ev(struct snd_soc_dapm_widget *w,
1075 struct snd_kcontrol *kcontrol, int event) 1184 struct snd_kcontrol *kcontrol, int event)
1076{ 1185{
1077 struct snd_soc_codec *codec = w->codec; 1186 struct snd_soc_codec *codec = w->codec;
1078 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); 1187 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
@@ -1089,6 +1198,63 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
1089 return 0; 1198 return 0;
1090} 1199}
1091 1200
1201static int late_enable_ev(struct snd_soc_dapm_widget *w,
1202 struct snd_kcontrol *kcontrol, int event)
1203{
1204 struct snd_soc_codec *codec = w->codec;
1205 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
1206
1207 switch (event) {
1208 case SND_SOC_DAPM_PRE_PMU:
1209 if (wm8994->aif1clk_enable) {
1210 aif1clk_ev(w, kcontrol, event);
1211 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
1212 WM8994_AIF1CLK_ENA_MASK,
1213 WM8994_AIF1CLK_ENA);
1214 wm8994->aif1clk_enable = 0;
1215 }
1216 if (wm8994->aif2clk_enable) {
1217 aif2clk_ev(w, kcontrol, event);
1218 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
1219 WM8994_AIF2CLK_ENA_MASK,
1220 WM8994_AIF2CLK_ENA);
1221 wm8994->aif2clk_enable = 0;
1222 }
1223 break;
1224 }
1225
1226 /* We may also have postponed startup of DSP, handle that. */
1227 wm8958_aif_ev(w, kcontrol, event);
1228
1229 return 0;
1230}
1231
1232static int late_disable_ev(struct snd_soc_dapm_widget *w,
1233 struct snd_kcontrol *kcontrol, int event)
1234{
1235 struct snd_soc_codec *codec = w->codec;
1236 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
1237
1238 switch (event) {
1239 case SND_SOC_DAPM_POST_PMD:
1240 if (wm8994->aif1clk_disable) {
1241 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
1242 WM8994_AIF1CLK_ENA_MASK, 0);
1243 aif1clk_ev(w, kcontrol, event);
1244 wm8994->aif1clk_disable = 0;
1245 }
1246 if (wm8994->aif2clk_disable) {
1247 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
1248 WM8994_AIF2CLK_ENA_MASK, 0);
1249 aif2clk_ev(w, kcontrol, event);
1250 wm8994->aif2clk_disable = 0;
1251 }
1252 break;
1253 }
1254
1255 return 0;
1256}
1257
1092static int adc_mux_ev(struct snd_soc_dapm_widget *w, 1258static int adc_mux_ev(struct snd_soc_dapm_widget *w,
1093 struct snd_kcontrol *kcontrol, int event) 1259 struct snd_kcontrol *kcontrol, int event)
1094{ 1260{
@@ -1385,9 +1551,9 @@ static const struct snd_kcontrol_new aif2dacr_src_mux =
1385 SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum); 1551 SOC_DAPM_ENUM("AIF2DACR Mux", aif2dacr_src_enum);
1386 1552
1387static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = { 1553static const struct snd_soc_dapm_widget wm8994_lateclk_revd_widgets[] = {
1388SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_ev, 1554SND_SOC_DAPM_SUPPLY("AIF1CLK", SND_SOC_NOPM, 0, 0, aif1clk_late_ev,
1389 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1555 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1390SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_ev, 1556SND_SOC_DAPM_SUPPLY("AIF2CLK", SND_SOC_NOPM, 0, 0, aif2clk_late_ev,
1391 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1557 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1392 1558
1393SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 1559SND_SOC_DAPM_PGA_E("Late DAC1L Enable PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
@@ -1416,8 +1582,10 @@ SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev)
1416}; 1582};
1417 1583
1418static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = { 1584static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = {
1419SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), 1585SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, aif1clk_ev,
1420SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0), 1586 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1587SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, aif2clk_ev,
1588 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1421SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0), 1589SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
1422SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0, 1590SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,
1423 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)), 1591 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
@@ -1470,30 +1638,30 @@ SND_SOC_DAPM_SUPPLY("VMID", SND_SOC_NOPM, 0, 0, vmid_event,
1470SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event, 1638SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
1471 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1639 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1472 1640
1473SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0), 1641SND_SOC_DAPM_SUPPLY("DSP1CLK", SND_SOC_NOPM, 3, 0, NULL, 0),
1474SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), 1642SND_SOC_DAPM_SUPPLY("DSP2CLK", SND_SOC_NOPM, 2, 0, NULL, 0),
1475SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), 1643SND_SOC_DAPM_SUPPLY("DSPINTCLK", SND_SOC_NOPM, 1, 0, NULL, 0),
1476 1644
1477SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL, 1645SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", NULL,
1478 0, WM8994_POWER_MANAGEMENT_4, 9, 0), 1646 0, SND_SOC_NOPM, 9, 0),
1479SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL, 1647SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", NULL,
1480 0, WM8994_POWER_MANAGEMENT_4, 8, 0), 1648 0, SND_SOC_NOPM, 8, 0),
1481SND_SOC_DAPM_AIF_IN_E("AIF1DAC1L", NULL, 0, 1649SND_SOC_DAPM_AIF_IN_E("AIF1DAC1L", NULL, 0,
1482 WM8994_POWER_MANAGEMENT_5, 9, 0, wm8958_aif_ev, 1650 SND_SOC_NOPM, 9, 0, wm8958_aif_ev,
1483 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1651 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1484SND_SOC_DAPM_AIF_IN_E("AIF1DAC1R", NULL, 0, 1652SND_SOC_DAPM_AIF_IN_E("AIF1DAC1R", NULL, 0,
1485 WM8994_POWER_MANAGEMENT_5, 8, 0, wm8958_aif_ev, 1653 SND_SOC_NOPM, 8, 0, wm8958_aif_ev,
1486 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1654 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1487 1655
1488SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", NULL, 1656SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", NULL,
1489 0, WM8994_POWER_MANAGEMENT_4, 11, 0), 1657 0, SND_SOC_NOPM, 11, 0),
1490SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", NULL, 1658SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", NULL,
1491 0, WM8994_POWER_MANAGEMENT_4, 10, 0), 1659 0, SND_SOC_NOPM, 10, 0),
1492SND_SOC_DAPM_AIF_IN_E("AIF1DAC2L", NULL, 0, 1660SND_SOC_DAPM_AIF_IN_E("AIF1DAC2L", NULL, 0,
1493 WM8994_POWER_MANAGEMENT_5, 11, 0, wm8958_aif_ev, 1661 SND_SOC_NOPM, 11, 0, wm8958_aif_ev,
1494 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1662 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1495SND_SOC_DAPM_AIF_IN_E("AIF1DAC2R", NULL, 0, 1663SND_SOC_DAPM_AIF_IN_E("AIF1DAC2R", NULL, 0,
1496 WM8994_POWER_MANAGEMENT_5, 10, 0, wm8958_aif_ev, 1664 SND_SOC_NOPM, 10, 0, wm8958_aif_ev,
1497 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1665 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1498 1666
1499SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0, 1667SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,
@@ -1520,14 +1688,14 @@ SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
1520 dac1r_mix, ARRAY_SIZE(dac1r_mix)), 1688 dac1r_mix, ARRAY_SIZE(dac1r_mix)),
1521 1689
1522SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0, 1690SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0,
1523 WM8994_POWER_MANAGEMENT_4, 13, 0), 1691 SND_SOC_NOPM, 13, 0),
1524SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0, 1692SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0,
1525 WM8994_POWER_MANAGEMENT_4, 12, 0), 1693 SND_SOC_NOPM, 12, 0),
1526SND_SOC_DAPM_AIF_IN_E("AIF2DACL", NULL, 0, 1694SND_SOC_DAPM_AIF_IN_E("AIF2DACL", NULL, 0,
1527 WM8994_POWER_MANAGEMENT_5, 13, 0, wm8958_aif_ev, 1695 SND_SOC_NOPM, 13, 0, wm8958_aif_ev,
1528 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1696 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1529SND_SOC_DAPM_AIF_IN_E("AIF2DACR", NULL, 0, 1697SND_SOC_DAPM_AIF_IN_E("AIF2DACR", NULL, 0,
1530 WM8994_POWER_MANAGEMENT_5, 12, 0, wm8958_aif_ev, 1698 SND_SOC_NOPM, 12, 0, wm8958_aif_ev,
1531 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1699 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1532 1700
1533SND_SOC_DAPM_AIF_IN("AIF1DACDAT", NULL, 0, SND_SOC_NOPM, 0, 0), 1701SND_SOC_DAPM_AIF_IN("AIF1DACDAT", NULL, 0, SND_SOC_NOPM, 0, 0),