diff options
Diffstat (limited to 'sound/soc/codecs/wm8903.c')
-rw-r--r-- | sound/soc/codecs/wm8903.c | 244 |
1 files changed, 86 insertions, 158 deletions
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index c9baeae3e275..fe1307b500cf 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c | |||
@@ -225,94 +225,18 @@ struct wm8903_priv { | |||
225 | struct snd_pcm_substream *slave_substream; | 225 | struct snd_pcm_substream *slave_substream; |
226 | }; | 226 | }; |
227 | 227 | ||
228 | 228 | static int wm8903_volatile_register(unsigned int reg) | |
229 | static unsigned int wm8903_read_reg_cache(struct snd_soc_codec *codec, | ||
230 | unsigned int reg) | ||
231 | { | ||
232 | u16 *cache = codec->reg_cache; | ||
233 | |||
234 | BUG_ON(reg >= ARRAY_SIZE(wm8903_reg_defaults)); | ||
235 | |||
236 | return cache[reg]; | ||
237 | } | ||
238 | |||
239 | static unsigned int wm8903_hw_read(struct snd_soc_codec *codec, u8 reg) | ||
240 | { | ||
241 | struct i2c_msg xfer[2]; | ||
242 | u16 data; | ||
243 | int ret; | ||
244 | struct i2c_client *client = codec->control_data; | ||
245 | |||
246 | /* Write register */ | ||
247 | xfer[0].addr = client->addr; | ||
248 | xfer[0].flags = 0; | ||
249 | xfer[0].len = 1; | ||
250 | xfer[0].buf = ® | ||
251 | |||
252 | /* Read data */ | ||
253 | xfer[1].addr = client->addr; | ||
254 | xfer[1].flags = I2C_M_RD; | ||
255 | xfer[1].len = 2; | ||
256 | xfer[1].buf = (u8 *)&data; | ||
257 | |||
258 | ret = i2c_transfer(client->adapter, xfer, 2); | ||
259 | if (ret != 2) { | ||
260 | pr_err("i2c_transfer returned %d\n", ret); | ||
261 | return 0; | ||
262 | } | ||
263 | |||
264 | return (data >> 8) | ((data & 0xff) << 8); | ||
265 | } | ||
266 | |||
267 | static unsigned int wm8903_read(struct snd_soc_codec *codec, | ||
268 | unsigned int reg) | ||
269 | { | 229 | { |
270 | switch (reg) { | 230 | switch (reg) { |
271 | case WM8903_SW_RESET_AND_ID: | 231 | case WM8903_SW_RESET_AND_ID: |
272 | case WM8903_REVISION_NUMBER: | 232 | case WM8903_REVISION_NUMBER: |
273 | case WM8903_INTERRUPT_STATUS_1: | 233 | case WM8903_INTERRUPT_STATUS_1: |
274 | case WM8903_WRITE_SEQUENCER_4: | 234 | case WM8903_WRITE_SEQUENCER_4: |
275 | return wm8903_hw_read(codec, reg); | 235 | return 1; |
276 | 236 | ||
277 | default: | 237 | default: |
278 | return wm8903_read_reg_cache(codec, reg); | ||
279 | } | ||
280 | } | ||
281 | |||
282 | static void wm8903_write_reg_cache(struct snd_soc_codec *codec, | ||
283 | u16 reg, unsigned int value) | ||
284 | { | ||
285 | u16 *cache = codec->reg_cache; | ||
286 | |||
287 | BUG_ON(reg >= ARRAY_SIZE(wm8903_reg_defaults)); | ||
288 | |||
289 | switch (reg) { | ||
290 | case WM8903_SW_RESET_AND_ID: | ||
291 | case WM8903_REVISION_NUMBER: | ||
292 | break; | ||
293 | |||
294 | default: | ||
295 | cache[reg] = value; | ||
296 | break; | ||
297 | } | ||
298 | } | ||
299 | |||
300 | static int wm8903_write(struct snd_soc_codec *codec, unsigned int reg, | ||
301 | unsigned int value) | ||
302 | { | ||
303 | u8 data[3]; | ||
304 | |||
305 | wm8903_write_reg_cache(codec, reg, value); | ||
306 | |||
307 | /* Data format is 1 byte of address followed by 2 bytes of data */ | ||
308 | data[0] = reg; | ||
309 | data[1] = (value >> 8) & 0xff; | ||
310 | data[2] = value & 0xff; | ||
311 | |||
312 | if (codec->hw_write(codec->control_data, data, 3) == 2) | ||
313 | return 0; | 238 | return 0; |
314 | else | 239 | } |
315 | return -EIO; | ||
316 | } | 240 | } |
317 | 241 | ||
318 | static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start) | 242 | static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start) |
@@ -323,13 +247,13 @@ static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start) | |||
323 | BUG_ON(start > 48); | 247 | BUG_ON(start > 48); |
324 | 248 | ||
325 | /* Enable the sequencer */ | 249 | /* Enable the sequencer */ |
326 | reg[0] = wm8903_read(codec, WM8903_WRITE_SEQUENCER_0); | 250 | reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0); |
327 | reg[0] |= WM8903_WSEQ_ENA; | 251 | reg[0] |= WM8903_WSEQ_ENA; |
328 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]); | 252 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]); |
329 | 253 | ||
330 | dev_dbg(&i2c->dev, "Starting sequence at %d\n", start); | 254 | dev_dbg(&i2c->dev, "Starting sequence at %d\n", start); |
331 | 255 | ||
332 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_3, | 256 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3, |
333 | start | WM8903_WSEQ_START); | 257 | start | WM8903_WSEQ_START); |
334 | 258 | ||
335 | /* Wait for it to complete. If we have the interrupt wired up then | 259 | /* Wait for it to complete. If we have the interrupt wired up then |
@@ -339,13 +263,13 @@ static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start) | |||
339 | do { | 263 | do { |
340 | msleep(10); | 264 | msleep(10); |
341 | 265 | ||
342 | reg[4] = wm8903_read(codec, WM8903_WRITE_SEQUENCER_4); | 266 | reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4); |
343 | } while (reg[4] & WM8903_WSEQ_BUSY); | 267 | } while (reg[4] & WM8903_WSEQ_BUSY); |
344 | 268 | ||
345 | dev_dbg(&i2c->dev, "Sequence complete\n"); | 269 | dev_dbg(&i2c->dev, "Sequence complete\n"); |
346 | 270 | ||
347 | /* Disable the sequencer again */ | 271 | /* Disable the sequencer again */ |
348 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_0, | 272 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, |
349 | reg[0] & ~WM8903_WSEQ_ENA); | 273 | reg[0] & ~WM8903_WSEQ_ENA); |
350 | 274 | ||
351 | return 0; | 275 | return 0; |
@@ -357,12 +281,12 @@ static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache) | |||
357 | 281 | ||
358 | /* There really ought to be something better we can do here :/ */ | 282 | /* There really ought to be something better we can do here :/ */ |
359 | for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++) | 283 | for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++) |
360 | cache[i] = wm8903_hw_read(codec, i); | 284 | cache[i] = codec->hw_read(codec, i); |
361 | } | 285 | } |
362 | 286 | ||
363 | static void wm8903_reset(struct snd_soc_codec *codec) | 287 | static void wm8903_reset(struct snd_soc_codec *codec) |
364 | { | 288 | { |
365 | wm8903_write(codec, WM8903_SW_RESET_AND_ID, 0); | 289 | snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0); |
366 | memcpy(codec->reg_cache, wm8903_reg_defaults, | 290 | memcpy(codec->reg_cache, wm8903_reg_defaults, |
367 | sizeof(wm8903_reg_defaults)); | 291 | sizeof(wm8903_reg_defaults)); |
368 | } | 292 | } |
@@ -423,52 +347,52 @@ static int wm8903_output_event(struct snd_soc_dapm_widget *w, | |||
423 | } | 347 | } |
424 | 348 | ||
425 | if (event & SND_SOC_DAPM_PRE_PMU) { | 349 | if (event & SND_SOC_DAPM_PRE_PMU) { |
426 | val = wm8903_read(codec, reg); | 350 | val = snd_soc_read(codec, reg); |
427 | 351 | ||
428 | /* Short the output */ | 352 | /* Short the output */ |
429 | val &= ~(WM8903_OUTPUT_SHORT << shift); | 353 | val &= ~(WM8903_OUTPUT_SHORT << shift); |
430 | wm8903_write(codec, reg, val); | 354 | snd_soc_write(codec, reg, val); |
431 | } | 355 | } |
432 | 356 | ||
433 | if (event & SND_SOC_DAPM_POST_PMU) { | 357 | if (event & SND_SOC_DAPM_POST_PMU) { |
434 | val = wm8903_read(codec, reg); | 358 | val = snd_soc_read(codec, reg); |
435 | 359 | ||
436 | val |= (WM8903_OUTPUT_IN << shift); | 360 | val |= (WM8903_OUTPUT_IN << shift); |
437 | wm8903_write(codec, reg, val); | 361 | snd_soc_write(codec, reg, val); |
438 | 362 | ||
439 | val |= (WM8903_OUTPUT_INT << shift); | 363 | val |= (WM8903_OUTPUT_INT << shift); |
440 | wm8903_write(codec, reg, val); | 364 | snd_soc_write(codec, reg, val); |
441 | 365 | ||
442 | /* Turn on the output ENA_OUTP */ | 366 | /* Turn on the output ENA_OUTP */ |
443 | val |= (WM8903_OUTPUT_OUT << shift); | 367 | val |= (WM8903_OUTPUT_OUT << shift); |
444 | wm8903_write(codec, reg, val); | 368 | snd_soc_write(codec, reg, val); |
445 | 369 | ||
446 | /* Enable the DC servo */ | 370 | /* Enable the DC servo */ |
447 | dcs_reg = wm8903_read(codec, WM8903_DC_SERVO_0); | 371 | dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0); |
448 | dcs_reg |= dcs_bit; | 372 | dcs_reg |= dcs_bit; |
449 | wm8903_write(codec, WM8903_DC_SERVO_0, dcs_reg); | 373 | snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg); |
450 | 374 | ||
451 | /* Remove the short */ | 375 | /* Remove the short */ |
452 | val |= (WM8903_OUTPUT_SHORT << shift); | 376 | val |= (WM8903_OUTPUT_SHORT << shift); |
453 | wm8903_write(codec, reg, val); | 377 | snd_soc_write(codec, reg, val); |
454 | } | 378 | } |
455 | 379 | ||
456 | if (event & SND_SOC_DAPM_PRE_PMD) { | 380 | if (event & SND_SOC_DAPM_PRE_PMD) { |
457 | val = wm8903_read(codec, reg); | 381 | val = snd_soc_read(codec, reg); |
458 | 382 | ||
459 | /* Short the output */ | 383 | /* Short the output */ |
460 | val &= ~(WM8903_OUTPUT_SHORT << shift); | 384 | val &= ~(WM8903_OUTPUT_SHORT << shift); |
461 | wm8903_write(codec, reg, val); | 385 | snd_soc_write(codec, reg, val); |
462 | 386 | ||
463 | /* Disable the DC servo */ | 387 | /* Disable the DC servo */ |
464 | dcs_reg = wm8903_read(codec, WM8903_DC_SERVO_0); | 388 | dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0); |
465 | dcs_reg &= ~dcs_bit; | 389 | dcs_reg &= ~dcs_bit; |
466 | wm8903_write(codec, WM8903_DC_SERVO_0, dcs_reg); | 390 | snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg); |
467 | 391 | ||
468 | /* Then disable the intermediate and output stages */ | 392 | /* Then disable the intermediate and output stages */ |
469 | val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT | | 393 | val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT | |
470 | WM8903_OUTPUT_IN) << shift); | 394 | WM8903_OUTPUT_IN) << shift); |
471 | wm8903_write(codec, reg, val); | 395 | snd_soc_write(codec, reg, val); |
472 | } | 396 | } |
473 | 397 | ||
474 | return 0; | 398 | return 0; |
@@ -492,13 +416,13 @@ static int wm8903_class_w_put(struct snd_kcontrol *kcontrol, | |||
492 | u16 reg; | 416 | u16 reg; |
493 | int ret; | 417 | int ret; |
494 | 418 | ||
495 | reg = wm8903_read(codec, WM8903_CLASS_W_0); | 419 | reg = snd_soc_read(codec, WM8903_CLASS_W_0); |
496 | 420 | ||
497 | /* Turn it off if we're about to enable bypass */ | 421 | /* Turn it off if we're about to enable bypass */ |
498 | if (ucontrol->value.integer.value[0]) { | 422 | if (ucontrol->value.integer.value[0]) { |
499 | if (wm8903->class_w_users == 0) { | 423 | if (wm8903->class_w_users == 0) { |
500 | dev_dbg(&i2c->dev, "Disabling Class W\n"); | 424 | dev_dbg(&i2c->dev, "Disabling Class W\n"); |
501 | wm8903_write(codec, WM8903_CLASS_W_0, reg & | 425 | snd_soc_write(codec, WM8903_CLASS_W_0, reg & |
502 | ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V)); | 426 | ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V)); |
503 | } | 427 | } |
504 | wm8903->class_w_users++; | 428 | wm8903->class_w_users++; |
@@ -511,7 +435,7 @@ static int wm8903_class_w_put(struct snd_kcontrol *kcontrol, | |||
511 | if (!ucontrol->value.integer.value[0]) { | 435 | if (!ucontrol->value.integer.value[0]) { |
512 | if (wm8903->class_w_users == 1) { | 436 | if (wm8903->class_w_users == 1) { |
513 | dev_dbg(&i2c->dev, "Enabling Class W\n"); | 437 | dev_dbg(&i2c->dev, "Enabling Class W\n"); |
514 | wm8903_write(codec, WM8903_CLASS_W_0, reg | | 438 | snd_soc_write(codec, WM8903_CLASS_W_0, reg | |
515 | WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V); | 439 | WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V); |
516 | } | 440 | } |
517 | wm8903->class_w_users--; | 441 | wm8903->class_w_users--; |
@@ -1009,55 +933,55 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec, | |||
1009 | switch (level) { | 933 | switch (level) { |
1010 | case SND_SOC_BIAS_ON: | 934 | case SND_SOC_BIAS_ON: |
1011 | case SND_SOC_BIAS_PREPARE: | 935 | case SND_SOC_BIAS_PREPARE: |
1012 | reg = wm8903_read(codec, WM8903_VMID_CONTROL_0); | 936 | reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0); |
1013 | reg &= ~(WM8903_VMID_RES_MASK); | 937 | reg &= ~(WM8903_VMID_RES_MASK); |
1014 | reg |= WM8903_VMID_RES_50K; | 938 | reg |= WM8903_VMID_RES_50K; |
1015 | wm8903_write(codec, WM8903_VMID_CONTROL_0, reg); | 939 | snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg); |
1016 | break; | 940 | break; |
1017 | 941 | ||
1018 | case SND_SOC_BIAS_STANDBY: | 942 | case SND_SOC_BIAS_STANDBY: |
1019 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | 943 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
1020 | wm8903_write(codec, WM8903_CLOCK_RATES_2, | 944 | snd_soc_write(codec, WM8903_CLOCK_RATES_2, |
1021 | WM8903_CLK_SYS_ENA); | 945 | WM8903_CLK_SYS_ENA); |
1022 | 946 | ||
1023 | /* Change DC servo dither level in startup sequence */ | 947 | /* Change DC servo dither level in startup sequence */ |
1024 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11); | 948 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11); |
1025 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257); | 949 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257); |
1026 | wm8903_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2); | 950 | snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2); |
1027 | 951 | ||
1028 | wm8903_run_sequence(codec, 0); | 952 | wm8903_run_sequence(codec, 0); |
1029 | wm8903_sync_reg_cache(codec, codec->reg_cache); | 953 | wm8903_sync_reg_cache(codec, codec->reg_cache); |
1030 | 954 | ||
1031 | /* Enable low impedence charge pump output */ | 955 | /* Enable low impedence charge pump output */ |
1032 | reg = wm8903_read(codec, | 956 | reg = snd_soc_read(codec, |
1033 | WM8903_CONTROL_INTERFACE_TEST_1); | 957 | WM8903_CONTROL_INTERFACE_TEST_1); |
1034 | wm8903_write(codec, WM8903_CONTROL_INTERFACE_TEST_1, | 958 | snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1, |
1035 | reg | WM8903_TEST_KEY); | 959 | reg | WM8903_TEST_KEY); |
1036 | reg2 = wm8903_read(codec, WM8903_CHARGE_PUMP_TEST_1); | 960 | reg2 = snd_soc_read(codec, WM8903_CHARGE_PUMP_TEST_1); |
1037 | wm8903_write(codec, WM8903_CHARGE_PUMP_TEST_1, | 961 | snd_soc_write(codec, WM8903_CHARGE_PUMP_TEST_1, |
1038 | reg2 | WM8903_CP_SW_KELVIN_MODE_MASK); | 962 | reg2 | WM8903_CP_SW_KELVIN_MODE_MASK); |
1039 | wm8903_write(codec, WM8903_CONTROL_INTERFACE_TEST_1, | 963 | snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1, |
1040 | reg); | 964 | reg); |
1041 | 965 | ||
1042 | /* By default no bypass paths are enabled so | 966 | /* By default no bypass paths are enabled so |
1043 | * enable Class W support. | 967 | * enable Class W support. |
1044 | */ | 968 | */ |
1045 | dev_dbg(&i2c->dev, "Enabling Class W\n"); | 969 | dev_dbg(&i2c->dev, "Enabling Class W\n"); |
1046 | wm8903_write(codec, WM8903_CLASS_W_0, reg | | 970 | snd_soc_write(codec, WM8903_CLASS_W_0, reg | |
1047 | WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V); | 971 | WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V); |
1048 | } | 972 | } |
1049 | 973 | ||
1050 | reg = wm8903_read(codec, WM8903_VMID_CONTROL_0); | 974 | reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0); |
1051 | reg &= ~(WM8903_VMID_RES_MASK); | 975 | reg &= ~(WM8903_VMID_RES_MASK); |
1052 | reg |= WM8903_VMID_RES_250K; | 976 | reg |= WM8903_VMID_RES_250K; |
1053 | wm8903_write(codec, WM8903_VMID_CONTROL_0, reg); | 977 | snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg); |
1054 | break; | 978 | break; |
1055 | 979 | ||
1056 | case SND_SOC_BIAS_OFF: | 980 | case SND_SOC_BIAS_OFF: |
1057 | wm8903_run_sequence(codec, 32); | 981 | wm8903_run_sequence(codec, 32); |
1058 | reg = wm8903_read(codec, WM8903_CLOCK_RATES_2); | 982 | reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2); |
1059 | reg &= ~WM8903_CLK_SYS_ENA; | 983 | reg &= ~WM8903_CLK_SYS_ENA; |
1060 | wm8903_write(codec, WM8903_CLOCK_RATES_2, reg); | 984 | snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg); |
1061 | break; | 985 | break; |
1062 | } | 986 | } |
1063 | 987 | ||
@@ -1081,7 +1005,7 @@ static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
1081 | unsigned int fmt) | 1005 | unsigned int fmt) |
1082 | { | 1006 | { |
1083 | struct snd_soc_codec *codec = codec_dai->codec; | 1007 | struct snd_soc_codec *codec = codec_dai->codec; |
1084 | u16 aif1 = wm8903_read(codec, WM8903_AUDIO_INTERFACE_1); | 1008 | u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1); |
1085 | 1009 | ||
1086 | aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK | | 1010 | aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK | |
1087 | WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV); | 1011 | WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV); |
@@ -1159,7 +1083,7 @@ static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
1159 | return -EINVAL; | 1083 | return -EINVAL; |
1160 | } | 1084 | } |
1161 | 1085 | ||
1162 | wm8903_write(codec, WM8903_AUDIO_INTERFACE_1, aif1); | 1086 | snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1); |
1163 | 1087 | ||
1164 | return 0; | 1088 | return 0; |
1165 | } | 1089 | } |
@@ -1169,14 +1093,14 @@ static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute) | |||
1169 | struct snd_soc_codec *codec = codec_dai->codec; | 1093 | struct snd_soc_codec *codec = codec_dai->codec; |
1170 | u16 reg; | 1094 | u16 reg; |
1171 | 1095 | ||
1172 | reg = wm8903_read(codec, WM8903_DAC_DIGITAL_1); | 1096 | reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1); |
1173 | 1097 | ||
1174 | if (mute) | 1098 | if (mute) |
1175 | reg |= WM8903_DAC_MUTE; | 1099 | reg |= WM8903_DAC_MUTE; |
1176 | else | 1100 | else |
1177 | reg &= ~WM8903_DAC_MUTE; | 1101 | reg &= ~WM8903_DAC_MUTE; |
1178 | 1102 | ||
1179 | wm8903_write(codec, WM8903_DAC_DIGITAL_1, reg); | 1103 | snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg); |
1180 | 1104 | ||
1181 | return 0; | 1105 | return 0; |
1182 | } | 1106 | } |
@@ -1366,12 +1290,12 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream, | |||
1366 | int cur_val; | 1290 | int cur_val; |
1367 | int clk_sys; | 1291 | int clk_sys; |
1368 | 1292 | ||
1369 | u16 aif1 = wm8903_read(codec, WM8903_AUDIO_INTERFACE_1); | 1293 | u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1); |
1370 | u16 aif2 = wm8903_read(codec, WM8903_AUDIO_INTERFACE_2); | 1294 | u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2); |
1371 | u16 aif3 = wm8903_read(codec, WM8903_AUDIO_INTERFACE_3); | 1295 | u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3); |
1372 | u16 clock0 = wm8903_read(codec, WM8903_CLOCK_RATES_0); | 1296 | u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0); |
1373 | u16 clock1 = wm8903_read(codec, WM8903_CLOCK_RATES_1); | 1297 | u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1); |
1374 | u16 dac_digital1 = wm8903_read(codec, WM8903_DAC_DIGITAL_1); | 1298 | u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1); |
1375 | 1299 | ||
1376 | if (substream == wm8903->slave_substream) { | 1300 | if (substream == wm8903->slave_substream) { |
1377 | dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n"); | 1301 | dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n"); |
@@ -1503,12 +1427,12 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream, | |||
1503 | aif2 |= bclk_divs[bclk_div].div; | 1427 | aif2 |= bclk_divs[bclk_div].div; |
1504 | aif3 |= bclk / fs; | 1428 | aif3 |= bclk / fs; |
1505 | 1429 | ||
1506 | wm8903_write(codec, WM8903_CLOCK_RATES_0, clock0); | 1430 | snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0); |
1507 | wm8903_write(codec, WM8903_CLOCK_RATES_1, clock1); | 1431 | snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1); |
1508 | wm8903_write(codec, WM8903_AUDIO_INTERFACE_1, aif1); | 1432 | snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1); |
1509 | wm8903_write(codec, WM8903_AUDIO_INTERFACE_2, aif2); | 1433 | snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2); |
1510 | wm8903_write(codec, WM8903_AUDIO_INTERFACE_3, aif3); | 1434 | snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3); |
1511 | wm8903_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1); | 1435 | snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1); |
1512 | 1436 | ||
1513 | return 0; | 1437 | return 0; |
1514 | } | 1438 | } |
@@ -1593,7 +1517,7 @@ static int wm8903_resume(struct platform_device *pdev) | |||
1593 | if (tmp_cache) { | 1517 | if (tmp_cache) { |
1594 | for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++) | 1518 | for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++) |
1595 | if (tmp_cache[i] != reg_cache[i]) | 1519 | if (tmp_cache[i] != reg_cache[i]) |
1596 | wm8903_write(codec, i, tmp_cache[i]); | 1520 | snd_soc_write(codec, i, tmp_cache[i]); |
1597 | } else { | 1521 | } else { |
1598 | dev_err(&i2c->dev, "Failed to allocate temporary cache\n"); | 1522 | dev_err(&i2c->dev, "Failed to allocate temporary cache\n"); |
1599 | } | 1523 | } |
@@ -1624,9 +1548,6 @@ static __devinit int wm8903_i2c_probe(struct i2c_client *i2c, | |||
1624 | codec->dev = &i2c->dev; | 1548 | codec->dev = &i2c->dev; |
1625 | codec->name = "WM8903"; | 1549 | codec->name = "WM8903"; |
1626 | codec->owner = THIS_MODULE; | 1550 | codec->owner = THIS_MODULE; |
1627 | codec->read = wm8903_read; | ||
1628 | codec->write = wm8903_write; | ||
1629 | codec->hw_write = (hw_write_t)i2c_master_send; | ||
1630 | codec->bias_level = SND_SOC_BIAS_OFF; | 1551 | codec->bias_level = SND_SOC_BIAS_OFF; |
1631 | codec->set_bias_level = wm8903_set_bias_level; | 1552 | codec->set_bias_level = wm8903_set_bias_level; |
1632 | codec->dai = &wm8903_dai; | 1553 | codec->dai = &wm8903_dai; |
@@ -1634,18 +1555,25 @@ static __devinit int wm8903_i2c_probe(struct i2c_client *i2c, | |||
1634 | codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache); | 1555 | codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache); |
1635 | codec->reg_cache = &wm8903->reg_cache[0]; | 1556 | codec->reg_cache = &wm8903->reg_cache[0]; |
1636 | codec->private_data = wm8903; | 1557 | codec->private_data = wm8903; |
1558 | codec->volatile_register = wm8903_volatile_register; | ||
1637 | 1559 | ||
1638 | i2c_set_clientdata(i2c, codec); | 1560 | i2c_set_clientdata(i2c, codec); |
1639 | codec->control_data = i2c; | 1561 | codec->control_data = i2c; |
1640 | 1562 | ||
1641 | val = wm8903_hw_read(codec, WM8903_SW_RESET_AND_ID); | 1563 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); |
1564 | if (ret != 0) { | ||
1565 | dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret); | ||
1566 | goto err; | ||
1567 | } | ||
1568 | |||
1569 | val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID); | ||
1642 | if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) { | 1570 | if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) { |
1643 | dev_err(&i2c->dev, | 1571 | dev_err(&i2c->dev, |
1644 | "Device with ID register %x is not a WM8903\n", val); | 1572 | "Device with ID register %x is not a WM8903\n", val); |
1645 | return -ENODEV; | 1573 | return -ENODEV; |
1646 | } | 1574 | } |
1647 | 1575 | ||
1648 | val = wm8903_read(codec, WM8903_REVISION_NUMBER); | 1576 | val = snd_soc_read(codec, WM8903_REVISION_NUMBER); |
1649 | dev_info(&i2c->dev, "WM8903 revision %d\n", | 1577 | dev_info(&i2c->dev, "WM8903 revision %d\n", |
1650 | val & WM8903_CHIP_REV_MASK); | 1578 | val & WM8903_CHIP_REV_MASK); |
1651 | 1579 | ||
@@ -1655,35 +1583,35 @@ static __devinit int wm8903_i2c_probe(struct i2c_client *i2c, | |||
1655 | wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1583 | wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1656 | 1584 | ||
1657 | /* Latch volume update bits */ | 1585 | /* Latch volume update bits */ |
1658 | val = wm8903_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT); | 1586 | val = snd_soc_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT); |
1659 | val |= WM8903_ADCVU; | 1587 | val |= WM8903_ADCVU; |
1660 | wm8903_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val); | 1588 | snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val); |
1661 | wm8903_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val); | 1589 | snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val); |
1662 | 1590 | ||
1663 | val = wm8903_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT); | 1591 | val = snd_soc_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT); |
1664 | val |= WM8903_DACVU; | 1592 | val |= WM8903_DACVU; |
1665 | wm8903_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val); | 1593 | snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val); |
1666 | wm8903_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val); | 1594 | snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val); |
1667 | 1595 | ||
1668 | val = wm8903_read(codec, WM8903_ANALOGUE_OUT1_LEFT); | 1596 | val = snd_soc_read(codec, WM8903_ANALOGUE_OUT1_LEFT); |
1669 | val |= WM8903_HPOUTVU; | 1597 | val |= WM8903_HPOUTVU; |
1670 | wm8903_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val); | 1598 | snd_soc_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val); |
1671 | wm8903_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val); | 1599 | snd_soc_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val); |
1672 | 1600 | ||
1673 | val = wm8903_read(codec, WM8903_ANALOGUE_OUT2_LEFT); | 1601 | val = snd_soc_read(codec, WM8903_ANALOGUE_OUT2_LEFT); |
1674 | val |= WM8903_LINEOUTVU; | 1602 | val |= WM8903_LINEOUTVU; |
1675 | wm8903_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val); | 1603 | snd_soc_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val); |
1676 | wm8903_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val); | 1604 | snd_soc_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val); |
1677 | 1605 | ||
1678 | val = wm8903_read(codec, WM8903_ANALOGUE_OUT3_LEFT); | 1606 | val = snd_soc_read(codec, WM8903_ANALOGUE_OUT3_LEFT); |
1679 | val |= WM8903_SPKVU; | 1607 | val |= WM8903_SPKVU; |
1680 | wm8903_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val); | 1608 | snd_soc_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val); |
1681 | wm8903_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val); | 1609 | snd_soc_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val); |
1682 | 1610 | ||
1683 | /* Enable DAC soft mute by default */ | 1611 | /* Enable DAC soft mute by default */ |
1684 | val = wm8903_read(codec, WM8903_DAC_DIGITAL_1); | 1612 | val = snd_soc_read(codec, WM8903_DAC_DIGITAL_1); |
1685 | val |= WM8903_DAC_MUTEMODE; | 1613 | val |= WM8903_DAC_MUTEMODE; |
1686 | wm8903_write(codec, WM8903_DAC_DIGITAL_1, val); | 1614 | snd_soc_write(codec, WM8903_DAC_DIGITAL_1, val); |
1687 | 1615 | ||
1688 | wm8903_dai.dev = &i2c->dev; | 1616 | wm8903_dai.dev = &i2c->dev; |
1689 | wm8903_codec = codec; | 1617 | wm8903_codec = codec; |