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-rw-r--r--sound/soc/codecs/wm8903.c664
1 files changed, 388 insertions, 276 deletions
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index 4ad8ebd290e3..c91fb2f99c13 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -23,8 +23,9 @@
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24#include <linux/pm.h> 24#include <linux/pm.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/platform_device.h> 26#include <linux/regmap.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/irq.h>
28#include <sound/core.h> 29#include <sound/core.h>
29#include <sound/jack.h> 30#include <sound/jack.h>
30#include <sound/pcm.h> 31#include <sound/pcm.h>
@@ -38,184 +39,85 @@
38#include "wm8903.h" 39#include "wm8903.h"
39 40
40/* Register defaults at reset */ 41/* Register defaults at reset */
41static u16 wm8903_reg_defaults[] = { 42static const struct reg_default wm8903_reg_defaults[] = {
42 0x8903, /* R0 - SW Reset and ID */ 43 { 4, 0x0018 }, /* R4 - Bias Control 0 */
43 0x0000, /* R1 - Revision Number */ 44 { 5, 0x0000 }, /* R5 - VMID Control 0 */
44 0x0000, /* R2 */ 45 { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */
45 0x0000, /* R3 */ 46 { 8, 0x0001 }, /* R8 - Analogue DAC 0 */
46 0x0018, /* R4 - Bias Control 0 */ 47 { 10, 0x0001 }, /* R10 - Analogue ADC 0 */
47 0x0000, /* R5 - VMID Control 0 */ 48 { 12, 0x0000 }, /* R12 - Power Management 0 */
48 0x0000, /* R6 - Mic Bias Control 0 */ 49 { 13, 0x0000 }, /* R13 - Power Management 1 */
49 0x0000, /* R7 */ 50 { 14, 0x0000 }, /* R14 - Power Management 2 */
50 0x0001, /* R8 - Analogue DAC 0 */ 51 { 15, 0x0000 }, /* R15 - Power Management 3 */
51 0x0000, /* R9 */ 52 { 16, 0x0000 }, /* R16 - Power Management 4 */
52 0x0001, /* R10 - Analogue ADC 0 */ 53 { 17, 0x0000 }, /* R17 - Power Management 5 */
53 0x0000, /* R11 */ 54 { 18, 0x0000 }, /* R18 - Power Management 6 */
54 0x0000, /* R12 - Power Management 0 */ 55 { 20, 0x0400 }, /* R20 - Clock Rates 0 */
55 0x0000, /* R13 - Power Management 1 */ 56 { 21, 0x0D07 }, /* R21 - Clock Rates 1 */
56 0x0000, /* R14 - Power Management 2 */ 57 { 22, 0x0000 }, /* R22 - Clock Rates 2 */
57 0x0000, /* R15 - Power Management 3 */ 58 { 24, 0x0050 }, /* R24 - Audio Interface 0 */
58 0x0000, /* R16 - Power Management 4 */ 59 { 25, 0x0242 }, /* R25 - Audio Interface 1 */
59 0x0000, /* R17 - Power Management 5 */ 60 { 26, 0x0008 }, /* R26 - Audio Interface 2 */
60 0x0000, /* R18 - Power Management 6 */ 61 { 27, 0x0022 }, /* R27 - Audio Interface 3 */
61 0x0000, /* R19 */ 62 { 30, 0x00C0 }, /* R30 - DAC Digital Volume Left */
62 0x0400, /* R20 - Clock Rates 0 */ 63 { 31, 0x00C0 }, /* R31 - DAC Digital Volume Right */
63 0x0D07, /* R21 - Clock Rates 1 */ 64 { 32, 0x0000 }, /* R32 - DAC Digital 0 */
64 0x0000, /* R22 - Clock Rates 2 */ 65 { 33, 0x0000 }, /* R33 - DAC Digital 1 */
65 0x0000, /* R23 */ 66 { 36, 0x00C0 }, /* R36 - ADC Digital Volume Left */
66 0x0050, /* R24 - Audio Interface 0 */ 67 { 37, 0x00C0 }, /* R37 - ADC Digital Volume Right */
67 0x0242, /* R25 - Audio Interface 1 */ 68 { 38, 0x0000 }, /* R38 - ADC Digital 0 */
68 0x0008, /* R26 - Audio Interface 2 */ 69 { 39, 0x0073 }, /* R39 - Digital Microphone 0 */
69 0x0022, /* R27 - Audio Interface 3 */ 70 { 40, 0x09BF }, /* R40 - DRC 0 */
70 0x0000, /* R28 */ 71 { 41, 0x3241 }, /* R41 - DRC 1 */
71 0x0000, /* R29 */ 72 { 42, 0x0020 }, /* R42 - DRC 2 */
72 0x00C0, /* R30 - DAC Digital Volume Left */ 73 { 43, 0x0000 }, /* R43 - DRC 3 */
73 0x00C0, /* R31 - DAC Digital Volume Right */ 74 { 44, 0x0085 }, /* R44 - Analogue Left Input 0 */
74 0x0000, /* R32 - DAC Digital 0 */ 75 { 45, 0x0085 }, /* R45 - Analogue Right Input 0 */
75 0x0000, /* R33 - DAC Digital 1 */ 76 { 46, 0x0044 }, /* R46 - Analogue Left Input 1 */
76 0x0000, /* R34 */ 77 { 47, 0x0044 }, /* R47 - Analogue Right Input 1 */
77 0x0000, /* R35 */ 78 { 50, 0x0008 }, /* R50 - Analogue Left Mix 0 */
78 0x00C0, /* R36 - ADC Digital Volume Left */ 79 { 51, 0x0004 }, /* R51 - Analogue Right Mix 0 */
79 0x00C0, /* R37 - ADC Digital Volume Right */ 80 { 52, 0x0000 }, /* R52 - Analogue Spk Mix Left 0 */
80 0x0000, /* R38 - ADC Digital 0 */ 81 { 53, 0x0000 }, /* R53 - Analogue Spk Mix Left 1 */
81 0x0073, /* R39 - Digital Microphone 0 */ 82 { 54, 0x0000 }, /* R54 - Analogue Spk Mix Right 0 */
82 0x09BF, /* R40 - DRC 0 */ 83 { 55, 0x0000 }, /* R55 - Analogue Spk Mix Right 1 */
83 0x3241, /* R41 - DRC 1 */ 84 { 57, 0x002D }, /* R57 - Analogue OUT1 Left */
84 0x0020, /* R42 - DRC 2 */ 85 { 58, 0x002D }, /* R58 - Analogue OUT1 Right */
85 0x0000, /* R43 - DRC 3 */ 86 { 59, 0x0039 }, /* R59 - Analogue OUT2 Left */
86 0x0085, /* R44 - Analogue Left Input 0 */ 87 { 60, 0x0039 }, /* R60 - Analogue OUT2 Right */
87 0x0085, /* R45 - Analogue Right Input 0 */ 88 { 62, 0x0139 }, /* R62 - Analogue OUT3 Left */
88 0x0044, /* R46 - Analogue Left Input 1 */ 89 { 63, 0x0139 }, /* R63 - Analogue OUT3 Right */
89 0x0044, /* R47 - Analogue Right Input 1 */ 90 { 64, 0x0000 }, /* R65 - Analogue SPK Output Control 0 */
90 0x0000, /* R48 */ 91 { 67, 0x0010 }, /* R67 - DC Servo 0 */
91 0x0000, /* R49 */ 92 { 69, 0x00A4 }, /* R69 - DC Servo 2 */
92 0x0008, /* R50 - Analogue Left Mix 0 */ 93 { 90, 0x0000 }, /* R90 - Analogue HP 0 */
93 0x0004, /* R51 - Analogue Right Mix 0 */ 94 { 94, 0x0000 }, /* R94 - Analogue Lineout 0 */
94 0x0000, /* R52 - Analogue Spk Mix Left 0 */ 95 { 98, 0x0000 }, /* R98 - Charge Pump 0 */
95 0x0000, /* R53 - Analogue Spk Mix Left 1 */ 96 { 104, 0x0000 }, /* R104 - Class W 0 */
96 0x0000, /* R54 - Analogue Spk Mix Right 0 */ 97 { 108, 0x0000 }, /* R108 - Write Sequencer 0 */
97 0x0000, /* R55 - Analogue Spk Mix Right 1 */ 98 { 109, 0x0000 }, /* R109 - Write Sequencer 1 */
98 0x0000, /* R56 */ 99 { 110, 0x0000 }, /* R110 - Write Sequencer 2 */
99 0x002D, /* R57 - Analogue OUT1 Left */ 100 { 111, 0x0000 }, /* R111 - Write Sequencer 3 */
100 0x002D, /* R58 - Analogue OUT1 Right */ 101 { 112, 0x0000 }, /* R112 - Write Sequencer 4 */
101 0x0039, /* R59 - Analogue OUT2 Left */ 102 { 114, 0x0000 }, /* R114 - Control Interface */
102 0x0039, /* R60 - Analogue OUT2 Right */ 103 { 116, 0x00A8 }, /* R116 - GPIO Control 1 */
103 0x0100, /* R61 */ 104 { 117, 0x00A8 }, /* R117 - GPIO Control 2 */
104 0x0139, /* R62 - Analogue OUT3 Left */ 105 { 118, 0x00A8 }, /* R118 - GPIO Control 3 */
105 0x0139, /* R63 - Analogue OUT3 Right */ 106 { 119, 0x0220 }, /* R119 - GPIO Control 4 */
106 0x0000, /* R64 */ 107 { 120, 0x01A0 }, /* R120 - GPIO Control 5 */
107 0x0000, /* R65 - Analogue SPK Output Control 0 */ 108 { 122, 0xFFFF }, /* R122 - Interrupt Status 1 Mask */
108 0x0000, /* R66 */ 109 { 123, 0x0000 }, /* R123 - Interrupt Polarity 1 */
109 0x0010, /* R67 - DC Servo 0 */ 110 { 126, 0x0000 }, /* R126 - Interrupt Control */
110 0x0100, /* R68 */ 111 { 129, 0x0000 }, /* R129 - Control Interface Test 1 */
111 0x00A4, /* R69 - DC Servo 2 */ 112 { 149, 0x6810 }, /* R149 - Charge Pump Test 1 */
112 0x0807, /* R70 */ 113 { 164, 0x0028 }, /* R164 - Clock Rate Test 4 */
113 0x0000, /* R71 */ 114 { 172, 0x0000 }, /* R172 - Analogue Output Bias 0 */
114 0x0000, /* R72 */
115 0x0000, /* R73 */
116 0x0000, /* R74 */
117 0x0000, /* R75 */
118 0x0000, /* R76 */
119 0x0000, /* R77 */
120 0x0000, /* R78 */
121 0x000E, /* R79 */
122 0x0000, /* R80 */
123 0x0000, /* R81 */
124 0x0000, /* R82 */
125 0x0000, /* R83 */
126 0x0000, /* R84 */
127 0x0000, /* R85 */
128 0x0000, /* R86 */
129 0x0006, /* R87 */
130 0x0000, /* R88 */
131 0x0000, /* R89 */
132 0x0000, /* R90 - Analogue HP 0 */
133 0x0060, /* R91 */
134 0x0000, /* R92 */
135 0x0000, /* R93 */
136 0x0000, /* R94 - Analogue Lineout 0 */
137 0x0060, /* R95 */
138 0x0000, /* R96 */
139 0x0000, /* R97 */
140 0x0000, /* R98 - Charge Pump 0 */
141 0x1F25, /* R99 */
142 0x2B19, /* R100 */
143 0x01C0, /* R101 */
144 0x01EF, /* R102 */
145 0x2B00, /* R103 */
146 0x0000, /* R104 - Class W 0 */
147 0x01C0, /* R105 */
148 0x1C10, /* R106 */
149 0x0000, /* R107 */
150 0x0000, /* R108 - Write Sequencer 0 */
151 0x0000, /* R109 - Write Sequencer 1 */
152 0x0000, /* R110 - Write Sequencer 2 */
153 0x0000, /* R111 - Write Sequencer 3 */
154 0x0000, /* R112 - Write Sequencer 4 */
155 0x0000, /* R113 */
156 0x0000, /* R114 - Control Interface */
157 0x0000, /* R115 */
158 0x00A8, /* R116 - GPIO Control 1 */
159 0x00A8, /* R117 - GPIO Control 2 */
160 0x00A8, /* R118 - GPIO Control 3 */
161 0x0220, /* R119 - GPIO Control 4 */
162 0x01A0, /* R120 - GPIO Control 5 */
163 0x0000, /* R121 - Interrupt Status 1 */
164 0xFFFF, /* R122 - Interrupt Status 1 Mask */
165 0x0000, /* R123 - Interrupt Polarity 1 */
166 0x0000, /* R124 */
167 0x0003, /* R125 */
168 0x0000, /* R126 - Interrupt Control */
169 0x0000, /* R127 */
170 0x0005, /* R128 */
171 0x0000, /* R129 - Control Interface Test 1 */
172 0x0000, /* R130 */
173 0x0000, /* R131 */
174 0x0000, /* R132 */
175 0x0000, /* R133 */
176 0x0000, /* R134 */
177 0x03FF, /* R135 */
178 0x0007, /* R136 */
179 0x0040, /* R137 */
180 0x0000, /* R138 */
181 0x0000, /* R139 */
182 0x0000, /* R140 */
183 0x0000, /* R141 */
184 0x0000, /* R142 */
185 0x0000, /* R143 */
186 0x0000, /* R144 */
187 0x0000, /* R145 */
188 0x0000, /* R146 */
189 0x0000, /* R147 */
190 0x4000, /* R148 */
191 0x6810, /* R149 - Charge Pump Test 1 */
192 0x0004, /* R150 */
193 0x0000, /* R151 */
194 0x0000, /* R152 */
195 0x0000, /* R153 */
196 0x0000, /* R154 */
197 0x0000, /* R155 */
198 0x0000, /* R156 */
199 0x0000, /* R157 */
200 0x0000, /* R158 */
201 0x0000, /* R159 */
202 0x0000, /* R160 */
203 0x0000, /* R161 */
204 0x0000, /* R162 */
205 0x0000, /* R163 */
206 0x0028, /* R164 - Clock Rate Test 4 */
207 0x0004, /* R165 */
208 0x0000, /* R166 */
209 0x0060, /* R167 */
210 0x0000, /* R168 */
211 0x0000, /* R169 */
212 0x0000, /* R170 */
213 0x0000, /* R171 */
214 0x0000, /* R172 - Analogue Output Bias 0 */
215}; 115};
216 116
217struct wm8903_priv { 117struct wm8903_priv {
118 struct wm8903_platform_data *pdata;
218 struct snd_soc_codec *codec; 119 struct snd_soc_codec *codec;
120 struct regmap *regmap;
219 121
220 int sysclk; 122 int sysclk;
221 int irq; 123 int irq;
@@ -240,7 +142,93 @@ struct wm8903_priv {
240#endif 142#endif
241}; 143};
242 144
243static int wm8903_volatile_register(struct snd_soc_codec *codec, unsigned int reg) 145static bool wm8903_readable_register(struct device *dev, unsigned int reg)
146{
147 switch (reg) {
148 case WM8903_SW_RESET_AND_ID:
149 case WM8903_REVISION_NUMBER:
150 case WM8903_BIAS_CONTROL_0:
151 case WM8903_VMID_CONTROL_0:
152 case WM8903_MIC_BIAS_CONTROL_0:
153 case WM8903_ANALOGUE_DAC_0:
154 case WM8903_ANALOGUE_ADC_0:
155 case WM8903_POWER_MANAGEMENT_0:
156 case WM8903_POWER_MANAGEMENT_1:
157 case WM8903_POWER_MANAGEMENT_2:
158 case WM8903_POWER_MANAGEMENT_3:
159 case WM8903_POWER_MANAGEMENT_4:
160 case WM8903_POWER_MANAGEMENT_5:
161 case WM8903_POWER_MANAGEMENT_6:
162 case WM8903_CLOCK_RATES_0:
163 case WM8903_CLOCK_RATES_1:
164 case WM8903_CLOCK_RATES_2:
165 case WM8903_AUDIO_INTERFACE_0:
166 case WM8903_AUDIO_INTERFACE_1:
167 case WM8903_AUDIO_INTERFACE_2:
168 case WM8903_AUDIO_INTERFACE_3:
169 case WM8903_DAC_DIGITAL_VOLUME_LEFT:
170 case WM8903_DAC_DIGITAL_VOLUME_RIGHT:
171 case WM8903_DAC_DIGITAL_0:
172 case WM8903_DAC_DIGITAL_1:
173 case WM8903_ADC_DIGITAL_VOLUME_LEFT:
174 case WM8903_ADC_DIGITAL_VOLUME_RIGHT:
175 case WM8903_ADC_DIGITAL_0:
176 case WM8903_DIGITAL_MICROPHONE_0:
177 case WM8903_DRC_0:
178 case WM8903_DRC_1:
179 case WM8903_DRC_2:
180 case WM8903_DRC_3:
181 case WM8903_ANALOGUE_LEFT_INPUT_0:
182 case WM8903_ANALOGUE_RIGHT_INPUT_0:
183 case WM8903_ANALOGUE_LEFT_INPUT_1:
184 case WM8903_ANALOGUE_RIGHT_INPUT_1:
185 case WM8903_ANALOGUE_LEFT_MIX_0:
186 case WM8903_ANALOGUE_RIGHT_MIX_0:
187 case WM8903_ANALOGUE_SPK_MIX_LEFT_0:
188 case WM8903_ANALOGUE_SPK_MIX_LEFT_1:
189 case WM8903_ANALOGUE_SPK_MIX_RIGHT_0:
190 case WM8903_ANALOGUE_SPK_MIX_RIGHT_1:
191 case WM8903_ANALOGUE_OUT1_LEFT:
192 case WM8903_ANALOGUE_OUT1_RIGHT:
193 case WM8903_ANALOGUE_OUT2_LEFT:
194 case WM8903_ANALOGUE_OUT2_RIGHT:
195 case WM8903_ANALOGUE_OUT3_LEFT:
196 case WM8903_ANALOGUE_OUT3_RIGHT:
197 case WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0:
198 case WM8903_DC_SERVO_0:
199 case WM8903_DC_SERVO_2:
200 case WM8903_DC_SERVO_READBACK_1:
201 case WM8903_DC_SERVO_READBACK_2:
202 case WM8903_DC_SERVO_READBACK_3:
203 case WM8903_DC_SERVO_READBACK_4:
204 case WM8903_ANALOGUE_HP_0:
205 case WM8903_ANALOGUE_LINEOUT_0:
206 case WM8903_CHARGE_PUMP_0:
207 case WM8903_CLASS_W_0:
208 case WM8903_WRITE_SEQUENCER_0:
209 case WM8903_WRITE_SEQUENCER_1:
210 case WM8903_WRITE_SEQUENCER_2:
211 case WM8903_WRITE_SEQUENCER_3:
212 case WM8903_WRITE_SEQUENCER_4:
213 case WM8903_CONTROL_INTERFACE:
214 case WM8903_GPIO_CONTROL_1:
215 case WM8903_GPIO_CONTROL_2:
216 case WM8903_GPIO_CONTROL_3:
217 case WM8903_GPIO_CONTROL_4:
218 case WM8903_GPIO_CONTROL_5:
219 case WM8903_INTERRUPT_STATUS_1:
220 case WM8903_INTERRUPT_STATUS_1_MASK:
221 case WM8903_INTERRUPT_POLARITY_1:
222 case WM8903_INTERRUPT_CONTROL:
223 case WM8903_CLOCK_RATE_TEST_4:
224 case WM8903_ANALOGUE_OUTPUT_BIAS_0:
225 return true;
226 default:
227 return false;
228 }
229}
230
231static bool wm8903_volatile_register(struct device *dev, unsigned int reg)
244{ 232{
245 switch (reg) { 233 switch (reg) {
246 case WM8903_SW_RESET_AND_ID: 234 case WM8903_SW_RESET_AND_ID:
@@ -258,13 +246,6 @@ static int wm8903_volatile_register(struct snd_soc_codec *codec, unsigned int re
258 } 246 }
259} 247}
260 248
261static void wm8903_reset(struct snd_soc_codec *codec)
262{
263 snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
264 memcpy(codec->reg_cache, wm8903_reg_defaults,
265 sizeof(wm8903_reg_defaults));
266}
267
268static int wm8903_cp_event(struct snd_soc_dapm_widget *w, 249static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
269 struct snd_kcontrol *kcontrol, int event) 250 struct snd_kcontrol *kcontrol, int event)
270{ 251{
@@ -839,7 +820,7 @@ SND_SOC_DAPM_OUTPUT("LON"),
839SND_SOC_DAPM_OUTPUT("ROP"), 820SND_SOC_DAPM_OUTPUT("ROP"),
840SND_SOC_DAPM_OUTPUT("RON"), 821SND_SOC_DAPM_OUTPUT("RON"),
841 822
842SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0, 0, 0), 823SND_SOC_DAPM_SUPPLY("MICBIAS", WM8903_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0),
843 824
844SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux), 825SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux),
845SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0, 826SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0,
@@ -948,7 +929,7 @@ SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8903_CLOCK_RATES_2, 2, 0, NULL, 0),
948static const struct snd_soc_dapm_route wm8903_intercon[] = { 929static const struct snd_soc_dapm_route wm8903_intercon[] = {
949 930
950 { "CLK_DSP", NULL, "CLK_SYS" }, 931 { "CLK_DSP", NULL, "CLK_SYS" },
951 { "Mic Bias", NULL, "CLK_SYS" }, 932 { "MICBIAS", NULL, "CLK_SYS" },
952 { "HPL_DCS", NULL, "CLK_SYS" }, 933 { "HPL_DCS", NULL, "CLK_SYS" },
953 { "HPR_DCS", NULL, "CLK_SYS" }, 934 { "HPR_DCS", NULL, "CLK_SYS" },
954 { "LINEOUTL_DCS", NULL, "CLK_SYS" }, 935 { "LINEOUTL_DCS", NULL, "CLK_SYS" },
@@ -1732,7 +1713,7 @@ static irqreturn_t wm8903_irq(int irq, void *data)
1732 SNDRV_PCM_FMTBIT_S20_3LE |\ 1713 SNDRV_PCM_FMTBIT_S20_3LE |\
1733 SNDRV_PCM_FMTBIT_S24_LE) 1714 SNDRV_PCM_FMTBIT_S24_LE)
1734 1715
1735static struct snd_soc_dai_ops wm8903_dai_ops = { 1716static const struct snd_soc_dai_ops wm8903_dai_ops = {
1736 .hw_params = wm8903_hw_params, 1717 .hw_params = wm8903_hw_params,
1737 .digital_mute = wm8903_digital_mute, 1718 .digital_mute = wm8903_digital_mute,
1738 .set_fmt = wm8903_set_dai_fmt, 1719 .set_fmt = wm8903_set_dai_fmt,
@@ -1759,7 +1740,7 @@ static struct snd_soc_dai_driver wm8903_dai = {
1759 .symmetric_rates = 1, 1740 .symmetric_rates = 1,
1760}; 1741};
1761 1742
1762static int wm8903_suspend(struct snd_soc_codec *codec, pm_message_t state) 1743static int wm8903_suspend(struct snd_soc_codec *codec)
1763{ 1744{
1764 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF); 1745 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1765 1746
@@ -1768,23 +1749,11 @@ static int wm8903_suspend(struct snd_soc_codec *codec, pm_message_t state)
1768 1749
1769static int wm8903_resume(struct snd_soc_codec *codec) 1750static int wm8903_resume(struct snd_soc_codec *codec)
1770{ 1751{
1771 int i; 1752 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1772 u16 *reg_cache = codec->reg_cache;
1773 u16 *tmp_cache = kmemdup(reg_cache, sizeof(wm8903_reg_defaults),
1774 GFP_KERNEL);
1775 1753
1776 /* Bring the codec back up to standby first to minimise pop/clicks */ 1754 regcache_sync(wm8903->regmap);
1777 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1778 1755
1779 /* Sync back everything else */ 1756 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1780 if (tmp_cache) {
1781 for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
1782 if (tmp_cache[i] != reg_cache[i])
1783 snd_soc_write(codec, i, tmp_cache[i]);
1784 kfree(tmp_cache);
1785 } else {
1786 dev_err(codec->dev, "Failed to allocate temporary cache\n");
1787 }
1788 1757
1789 return 0; 1758 return 0;
1790} 1759}
@@ -1808,13 +1777,18 @@ static int wm8903_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
1808 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1777 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip);
1809 struct snd_soc_codec *codec = wm8903->codec; 1778 struct snd_soc_codec *codec = wm8903->codec;
1810 unsigned int mask, val; 1779 unsigned int mask, val;
1780 int ret;
1811 1781
1812 mask = WM8903_GP1_FN_MASK | WM8903_GP1_DIR_MASK; 1782 mask = WM8903_GP1_FN_MASK | WM8903_GP1_DIR_MASK;
1813 val = (WM8903_GPn_FN_GPIO_INPUT << WM8903_GP1_FN_SHIFT) | 1783 val = (WM8903_GPn_FN_GPIO_INPUT << WM8903_GP1_FN_SHIFT) |
1814 WM8903_GP1_DIR; 1784 WM8903_GP1_DIR;
1815 1785
1816 return snd_soc_update_bits(codec, WM8903_GPIO_CONTROL_1 + offset, 1786 ret = snd_soc_update_bits(codec, WM8903_GPIO_CONTROL_1 + offset,
1817 mask, val); 1787 mask, val);
1788 if (ret < 0)
1789 return ret;
1790
1791 return 0;
1818} 1792}
1819 1793
1820static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset) 1794static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -1834,13 +1808,18 @@ static int wm8903_gpio_direction_out(struct gpio_chip *chip,
1834 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1808 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip);
1835 struct snd_soc_codec *codec = wm8903->codec; 1809 struct snd_soc_codec *codec = wm8903->codec;
1836 unsigned int mask, val; 1810 unsigned int mask, val;
1811 int ret;
1837 1812
1838 mask = WM8903_GP1_FN_MASK | WM8903_GP1_DIR_MASK | WM8903_GP1_LVL_MASK; 1813 mask = WM8903_GP1_FN_MASK | WM8903_GP1_DIR_MASK | WM8903_GP1_LVL_MASK;
1839 val = (WM8903_GPn_FN_GPIO_OUTPUT << WM8903_GP1_FN_SHIFT) | 1814 val = (WM8903_GPn_FN_GPIO_OUTPUT << WM8903_GP1_FN_SHIFT) |
1840 (value << WM8903_GP2_LVL_SHIFT); 1815 (value << WM8903_GP2_LVL_SHIFT);
1841 1816
1842 return snd_soc_update_bits(codec, WM8903_GPIO_CONTROL_1 + offset, 1817 ret = snd_soc_update_bits(codec, WM8903_GPIO_CONTROL_1 + offset,
1843 mask, val); 1818 mask, val);
1819 if (ret < 0)
1820 return ret;
1821
1822 return 0;
1844} 1823}
1845 1824
1846static void wm8903_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 1825static void wm8903_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -1867,14 +1846,14 @@ static struct gpio_chip wm8903_template_chip = {
1867static void wm8903_init_gpio(struct snd_soc_codec *codec) 1846static void wm8903_init_gpio(struct snd_soc_codec *codec)
1868{ 1847{
1869 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 1848 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1870 struct wm8903_platform_data *pdata = dev_get_platdata(codec->dev); 1849 struct wm8903_platform_data *pdata = wm8903->pdata;
1871 int ret; 1850 int ret;
1872 1851
1873 wm8903->gpio_chip = wm8903_template_chip; 1852 wm8903->gpio_chip = wm8903_template_chip;
1874 wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO; 1853 wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO;
1875 wm8903->gpio_chip.dev = codec->dev; 1854 wm8903->gpio_chip.dev = codec->dev;
1876 1855
1877 if (pdata && pdata->gpio_base) 1856 if (pdata->gpio_base)
1878 wm8903->gpio_chip.base = pdata->gpio_base; 1857 wm8903->gpio_chip.base = pdata->gpio_base;
1879 else 1858 else
1880 wm8903->gpio_chip.base = -1; 1859 wm8903->gpio_chip.base = -1;
@@ -1905,78 +1884,65 @@ static void wm8903_free_gpio(struct snd_soc_codec *codec)
1905 1884
1906static int wm8903_probe(struct snd_soc_codec *codec) 1885static int wm8903_probe(struct snd_soc_codec *codec)
1907{ 1886{
1908 struct wm8903_platform_data *pdata = dev_get_platdata(codec->dev);
1909 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 1887 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1888 struct wm8903_platform_data *pdata = wm8903->pdata;
1910 int ret, i; 1889 int ret, i;
1911 int trigger, irq_pol; 1890 int trigger, irq_pol;
1912 u16 val; 1891 u16 val;
1892 bool mic_gpio = false;
1913 1893
1914 wm8903->codec = codec; 1894 wm8903->codec = codec;
1895 codec->control_data = wm8903->regmap;
1915 1896
1916 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); 1897 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1917 if (ret != 0) { 1898 if (ret != 0) {
1918 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 1899 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1919 return ret; 1900 return ret;
1920 } 1901 }
1921 1902
1922 val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID); 1903 /* Set up GPIOs, detect if any are MIC detect outputs */
1923 if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) { 1904 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
1924 dev_err(codec->dev, 1905 if ((!pdata->gpio_cfg[i]) ||
1925 "Device with ID register %x is not a WM8903\n", val); 1906 (pdata->gpio_cfg[i] > WM8903_GPIO_CONFIG_ZERO))
1926 return -ENODEV; 1907 continue;
1927 }
1928
1929 val = snd_soc_read(codec, WM8903_REVISION_NUMBER);
1930 dev_info(codec->dev, "WM8903 revision %c\n",
1931 (val & WM8903_CHIP_REV_MASK) + 'A');
1932 1908
1933 wm8903_reset(codec); 1909 snd_soc_write(codec, WM8903_GPIO_CONTROL_1 + i,
1910 pdata->gpio_cfg[i] & 0x7fff);
1934 1911
1935 /* Set up GPIOs and microphone detection */ 1912 val = (pdata->gpio_cfg[i] & WM8903_GP1_FN_MASK)
1936 if (pdata) { 1913 >> WM8903_GP1_FN_SHIFT;
1937 bool mic_gpio = false;
1938 1914
1939 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) { 1915 switch (val) {
1940 if (pdata->gpio_cfg[i] == WM8903_GPIO_NO_CONFIG) 1916 case WM8903_GPn_FN_MICBIAS_CURRENT_DETECT:
1941 continue; 1917 case WM8903_GPn_FN_MICBIAS_SHORT_DETECT:
1942 1918 mic_gpio = true;
1943 snd_soc_write(codec, WM8903_GPIO_CONTROL_1 + i, 1919 break;
1944 pdata->gpio_cfg[i] & 0xffff); 1920 default:
1945 1921 break;
1946 val = (pdata->gpio_cfg[i] & WM8903_GP1_FN_MASK)
1947 >> WM8903_GP1_FN_SHIFT;
1948
1949 switch (val) {
1950 case WM8903_GPn_FN_MICBIAS_CURRENT_DETECT:
1951 case WM8903_GPn_FN_MICBIAS_SHORT_DETECT:
1952 mic_gpio = true;
1953 break;
1954 default:
1955 break;
1956 }
1957 } 1922 }
1923 }
1924
1925 /* Set up microphone detection */
1926 snd_soc_write(codec, WM8903_MIC_BIAS_CONTROL_0,
1927 pdata->micdet_cfg);
1958 1928
1959 snd_soc_write(codec, WM8903_MIC_BIAS_CONTROL_0, 1929 /* Microphone detection needs the WSEQ clock */
1960 pdata->micdet_cfg); 1930 if (pdata->micdet_cfg)
1931 snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0,
1932 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
1961 1933
1962 /* Microphone detection needs the WSEQ clock */ 1934 /* If microphone detection is enabled by pdata but
1963 if (pdata->micdet_cfg) 1935 * detected via IRQ then interrupts can be lost before
1964 snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0, 1936 * the machine driver has set up microphone detection
1965 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA); 1937 * IRQs as the IRQs are clear on read. The detection
1938 * will be enabled when the machine driver configures.
1939 */
1940 WARN_ON(!mic_gpio && (pdata->micdet_cfg & WM8903_MICDET_ENA));
1966 1941
1967 /* If microphone detection is enabled by pdata but 1942 wm8903->mic_delay = pdata->micdet_delay;
1968 * detected via IRQ then interrupts can be lost before
1969 * the machine driver has set up microphone detection
1970 * IRQs as the IRQs are clear on read. The detection
1971 * will be enabled when the machine driver configures.
1972 */
1973 WARN_ON(!mic_gpio && (pdata->micdet_cfg & WM8903_MICDET_ENA));
1974 1943
1975 wm8903->mic_delay = pdata->micdet_delay;
1976 }
1977
1978 if (wm8903->irq) { 1944 if (wm8903->irq) {
1979 if (pdata && pdata->irq_active_low) { 1945 if (pdata->irq_active_low) {
1980 trigger = IRQF_TRIGGER_LOW; 1946 trigger = IRQF_TRIGGER_LOW;
1981 irq_pol = WM8903_IRQ_POL; 1947 irq_pol = WM8903_IRQ_POL;
1982 } else { 1948 } else {
@@ -2035,9 +2001,6 @@ static int wm8903_probe(struct snd_soc_codec *codec)
2035 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE, 2001 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE,
2036 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE); 2002 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE);
2037 2003
2038 snd_soc_add_controls(codec, wm8903_snd_controls,
2039 ARRAY_SIZE(wm8903_snd_controls));
2040
2041 wm8903_init_gpio(codec); 2004 wm8903_init_gpio(codec);
2042 2005
2043 return ret; 2006 return ret;
@@ -2062,45 +2025,198 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8903 = {
2062 .suspend = wm8903_suspend, 2025 .suspend = wm8903_suspend,
2063 .resume = wm8903_resume, 2026 .resume = wm8903_resume,
2064 .set_bias_level = wm8903_set_bias_level, 2027 .set_bias_level = wm8903_set_bias_level,
2065 .reg_cache_size = ARRAY_SIZE(wm8903_reg_defaults),
2066 .reg_word_size = sizeof(u16),
2067 .reg_cache_default = wm8903_reg_defaults,
2068 .volatile_register = wm8903_volatile_register,
2069 .seq_notifier = wm8903_seq_notifier, 2028 .seq_notifier = wm8903_seq_notifier,
2029 .controls = wm8903_snd_controls,
2030 .num_controls = ARRAY_SIZE(wm8903_snd_controls),
2070 .dapm_widgets = wm8903_dapm_widgets, 2031 .dapm_widgets = wm8903_dapm_widgets,
2071 .num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets), 2032 .num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets),
2072 .dapm_routes = wm8903_intercon, 2033 .dapm_routes = wm8903_intercon,
2073 .num_dapm_routes = ARRAY_SIZE(wm8903_intercon), 2034 .num_dapm_routes = ARRAY_SIZE(wm8903_intercon),
2074}; 2035};
2075 2036
2076#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2037static const struct regmap_config wm8903_regmap = {
2038 .reg_bits = 8,
2039 .val_bits = 16,
2040
2041 .max_register = WM8903_MAX_REGISTER,
2042 .volatile_reg = wm8903_volatile_register,
2043 .readable_reg = wm8903_readable_register,
2044
2045 .cache_type = REGCACHE_RBTREE,
2046 .reg_defaults = wm8903_reg_defaults,
2047 .num_reg_defaults = ARRAY_SIZE(wm8903_reg_defaults),
2048};
2049
2050static int wm8903_set_pdata_irq_trigger(struct i2c_client *i2c,
2051 struct wm8903_platform_data *pdata)
2052{
2053 struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
2054 if (!irq_data) {
2055 dev_err(&i2c->dev, "Invalid IRQ: %d\n",
2056 i2c->irq);
2057 return -EINVAL;
2058 }
2059
2060 switch (irqd_get_trigger_type(irq_data)) {
2061 case IRQ_TYPE_NONE:
2062 default:
2063 /*
2064 * We assume the controller imposes no restrictions,
2065 * so we are able to select active-high
2066 */
2067 /* Fall-through */
2068 case IRQ_TYPE_LEVEL_HIGH:
2069 pdata->irq_active_low = false;
2070 break;
2071 case IRQ_TYPE_LEVEL_LOW:
2072 pdata->irq_active_low = true;
2073 break;
2074 }
2075
2076 return 0;
2077}
2078
2079static int wm8903_set_pdata_from_of(struct i2c_client *i2c,
2080 struct wm8903_platform_data *pdata)
2081{
2082 const struct device_node *np = i2c->dev.of_node;
2083 u32 val32;
2084 int i;
2085
2086 if (of_property_read_u32(np, "micdet-cfg", &val32) >= 0)
2087 pdata->micdet_cfg = val32;
2088
2089 if (of_property_read_u32(np, "micdet-delay", &val32) >= 0)
2090 pdata->micdet_delay = val32;
2091
2092 if (of_property_read_u32_array(np, "gpio-cfg", pdata->gpio_cfg,
2093 ARRAY_SIZE(pdata->gpio_cfg)) >= 0) {
2094 /*
2095 * In device tree: 0 means "write 0",
2096 * 0xffffffff means "don't touch".
2097 *
2098 * In platform data: 0 means "don't touch",
2099 * 0x8000 means "write 0".
2100 *
2101 * Note: WM8903_GPIO_CONFIG_ZERO == 0x8000.
2102 *
2103 * Convert from DT to pdata representation here,
2104 * so no other code needs to change.
2105 */
2106 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
2107 if (pdata->gpio_cfg[i] == 0) {
2108 pdata->gpio_cfg[i] = WM8903_GPIO_CONFIG_ZERO;
2109 } else if (pdata->gpio_cfg[i] == 0xffffffff) {
2110 pdata->gpio_cfg[i] = 0;
2111 } else if (pdata->gpio_cfg[i] > 0x7fff) {
2112 dev_err(&i2c->dev, "Invalid gpio-cfg[%d] %x\n",
2113 i, pdata->gpio_cfg[i]);
2114 return -EINVAL;
2115 }
2116 }
2117 }
2118
2119 return 0;
2120}
2121
2077static __devinit int wm8903_i2c_probe(struct i2c_client *i2c, 2122static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
2078 const struct i2c_device_id *id) 2123 const struct i2c_device_id *id)
2079{ 2124{
2125 struct wm8903_platform_data *pdata = dev_get_platdata(&i2c->dev);
2080 struct wm8903_priv *wm8903; 2126 struct wm8903_priv *wm8903;
2127 unsigned int val;
2081 int ret; 2128 int ret;
2082 2129
2083 wm8903 = kzalloc(sizeof(struct wm8903_priv), GFP_KERNEL); 2130 wm8903 = devm_kzalloc(&i2c->dev, sizeof(struct wm8903_priv),
2131 GFP_KERNEL);
2084 if (wm8903 == NULL) 2132 if (wm8903 == NULL)
2085 return -ENOMEM; 2133 return -ENOMEM;
2086 2134
2135 wm8903->regmap = regmap_init_i2c(i2c, &wm8903_regmap);
2136 if (IS_ERR(wm8903->regmap)) {
2137 ret = PTR_ERR(wm8903->regmap);
2138 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2139 ret);
2140 return ret;
2141 }
2142
2087 i2c_set_clientdata(i2c, wm8903); 2143 i2c_set_clientdata(i2c, wm8903);
2088 wm8903->irq = i2c->irq; 2144 wm8903->irq = i2c->irq;
2089 2145
2146 /* If no platform data was supplied, create storage for defaults */
2147 if (pdata) {
2148 wm8903->pdata = pdata;
2149 } else {
2150 wm8903->pdata = devm_kzalloc(&i2c->dev,
2151 sizeof(struct wm8903_platform_data),
2152 GFP_KERNEL);
2153 if (wm8903->pdata == NULL) {
2154 dev_err(&i2c->dev, "Failed to allocate pdata\n");
2155 return -ENOMEM;
2156 }
2157
2158 if (i2c->irq) {
2159 ret = wm8903_set_pdata_irq_trigger(i2c, wm8903->pdata);
2160 if (ret != 0)
2161 return ret;
2162 }
2163
2164 if (i2c->dev.of_node) {
2165 ret = wm8903_set_pdata_from_of(i2c, wm8903->pdata);
2166 if (ret != 0)
2167 return ret;
2168 }
2169 }
2170
2171 ret = regmap_read(wm8903->regmap, WM8903_SW_RESET_AND_ID, &val);
2172 if (ret != 0) {
2173 dev_err(&i2c->dev, "Failed to read chip ID: %d\n", ret);
2174 goto err;
2175 }
2176 if (val != 0x8903) {
2177 dev_err(&i2c->dev, "Device with ID %x is not a WM8903\n", val);
2178 ret = -ENODEV;
2179 goto err;
2180 }
2181
2182 ret = regmap_read(wm8903->regmap, WM8903_REVISION_NUMBER, &val);
2183 if (ret != 0) {
2184 dev_err(&i2c->dev, "Failed to read chip revision: %d\n", ret);
2185 goto err;
2186 }
2187 dev_info(&i2c->dev, "WM8903 revision %c\n",
2188 (val & WM8903_CHIP_REV_MASK) + 'A');
2189
2190 /* Reset the device */
2191 regmap_write(wm8903->regmap, WM8903_SW_RESET_AND_ID, 0x8903);
2192
2090 ret = snd_soc_register_codec(&i2c->dev, 2193 ret = snd_soc_register_codec(&i2c->dev,
2091 &soc_codec_dev_wm8903, &wm8903_dai, 1); 2194 &soc_codec_dev_wm8903, &wm8903_dai, 1);
2092 if (ret < 0) 2195 if (ret != 0)
2093 kfree(wm8903); 2196 goto err;
2197
2198 return 0;
2199err:
2200 regmap_exit(wm8903->regmap);
2094 return ret; 2201 return ret;
2095} 2202}
2096 2203
2097static __devexit int wm8903_i2c_remove(struct i2c_client *client) 2204static __devexit int wm8903_i2c_remove(struct i2c_client *client)
2098{ 2205{
2206 struct wm8903_priv *wm8903 = i2c_get_clientdata(client);
2207
2208 regmap_exit(wm8903->regmap);
2099 snd_soc_unregister_codec(&client->dev); 2209 snd_soc_unregister_codec(&client->dev);
2100 kfree(i2c_get_clientdata(client)); 2210
2101 return 0; 2211 return 0;
2102} 2212}
2103 2213
2214static const struct of_device_id wm8903_of_match[] = {
2215 { .compatible = "wlf,wm8903", },
2216 {},
2217};
2218MODULE_DEVICE_TABLE(of, wm8903_of_match);
2219
2104static const struct i2c_device_id wm8903_i2c_id[] = { 2220static const struct i2c_device_id wm8903_i2c_id[] = {
2105 { "wm8903", 0 }, 2221 { "wm8903", 0 },
2106 { } 2222 { }
@@ -2111,32 +2227,28 @@ static struct i2c_driver wm8903_i2c_driver = {
2111 .driver = { 2227 .driver = {
2112 .name = "wm8903", 2228 .name = "wm8903",
2113 .owner = THIS_MODULE, 2229 .owner = THIS_MODULE,
2230 .of_match_table = wm8903_of_match,
2114 }, 2231 },
2115 .probe = wm8903_i2c_probe, 2232 .probe = wm8903_i2c_probe,
2116 .remove = __devexit_p(wm8903_i2c_remove), 2233 .remove = __devexit_p(wm8903_i2c_remove),
2117 .id_table = wm8903_i2c_id, 2234 .id_table = wm8903_i2c_id,
2118}; 2235};
2119#endif
2120 2236
2121static int __init wm8903_modinit(void) 2237static int __init wm8903_modinit(void)
2122{ 2238{
2123 int ret = 0; 2239 int ret = 0;
2124#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
2125 ret = i2c_add_driver(&wm8903_i2c_driver); 2240 ret = i2c_add_driver(&wm8903_i2c_driver);
2126 if (ret != 0) { 2241 if (ret != 0) {
2127 printk(KERN_ERR "Failed to register wm8903 I2C driver: %d\n", 2242 printk(KERN_ERR "Failed to register wm8903 I2C driver: %d\n",
2128 ret); 2243 ret);
2129 } 2244 }
2130#endif
2131 return ret; 2245 return ret;
2132} 2246}
2133module_init(wm8903_modinit); 2247module_init(wm8903_modinit);
2134 2248
2135static void __exit wm8903_exit(void) 2249static void __exit wm8903_exit(void)
2136{ 2250{
2137#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
2138 i2c_del_driver(&wm8903_i2c_driver); 2251 i2c_del_driver(&wm8903_i2c_driver);
2139#endif
2140} 2252}
2141module_exit(wm8903_exit); 2253module_exit(wm8903_exit);
2142 2254
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-16 20:16:41 -0500