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-rw-r--r--sound/soc/codecs/wm8510.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8510.h b/sound/soc/codecs/wm8510.h
new file mode 100644
index 000000000000..f5d2e42eb3f4
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+++ b/sound/soc/codecs/wm8510.h
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1/*
2 * wm8510.h -- WM8510 Soc Audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _WM8510_H
10#define _WM8510_H
11
12/* WM8510 register space */
13
14#define WM8510_RESET 0x0
15#define WM8510_POWER1 0x1
16#define WM8510_POWER2 0x2
17#define WM8510_POWER3 0x3
18#define WM8510_IFACE 0x4
19#define WM8510_COMP 0x5
20#define WM8510_CLOCK 0x6
21#define WM8510_ADD 0x7
22#define WM8510_GPIO 0x8
23#define WM8510_DAC 0xa
24#define WM8510_DACVOL 0xb
25#define WM8510_ADC 0xe
26#define WM8510_ADCVOL 0xf
27#define WM8510_EQ1 0x12
28#define WM8510_EQ2 0x13
29#define WM8510_EQ3 0x14
30#define WM8510_EQ4 0x15
31#define WM8510_EQ5 0x16
32#define WM8510_DACLIM1 0x18
33#define WM8510_DACLIM2 0x19
34#define WM8510_NOTCH1 0x1b
35#define WM8510_NOTCH2 0x1c
36#define WM8510_NOTCH3 0x1d
37#define WM8510_NOTCH4 0x1e
38#define WM8510_ALC1 0x20
39#define WM8510_ALC2 0x21
40#define WM8510_ALC3 0x22
41#define WM8510_NGATE 0x23
42#define WM8510_PLLN 0x24
43#define WM8510_PLLK1 0x25
44#define WM8510_PLLK2 0x26
45#define WM8510_PLLK3 0x27
46#define WM8510_ATTEN 0x28
47#define WM8510_INPUT 0x2c
48#define WM8510_INPPGA 0x2d
49#define WM8510_ADCBOOST 0x2f
50#define WM8510_OUTPUT 0x31
51#define WM8510_SPKMIX 0x32
52#define WM8510_SPKVOL 0x36
53#define WM8510_MONOMIX 0x38
54
55#define WM8510_CACHEREGNUM 57
56
57/* Clock divider Id's */
58#define WM8510_OPCLKDIV 0
59#define WM8510_MCLKDIV 1
60#define WM8510_ADCCLK 2
61#define WM8510_DACCLK 3
62#define WM8510_BCLKDIV 4
63
64/* DAC clock dividers */
65#define WM8510_DACCLK_F2 (1 << 3)
66#define WM8510_DACCLK_F4 (0 << 3)
67
68/* ADC clock dividers */
69#define WM8510_ADCCLK_F2 (1 << 3)
70#define WM8510_ADCCLK_F4 (0 << 3)
71
72/* PLL Out dividers */
73#define WM8510_OPCLKDIV_1 (0 << 4)
74#define WM8510_OPCLKDIV_2 (1 << 4)
75#define WM8510_OPCLKDIV_3 (2 << 4)
76#define WM8510_OPCLKDIV_4 (3 << 4)
77
78/* BCLK clock dividers */
79#define WM8510_BCLKDIV_1 (0 << 2)
80#define WM8510_BCLKDIV_2 (1 << 2)
81#define WM8510_BCLKDIV_4 (2 << 2)
82#define WM8510_BCLKDIV_8 (3 << 2)
83#define WM8510_BCLKDIV_16 (4 << 2)
84#define WM8510_BCLKDIV_32 (5 << 2)
85
86/* MCLK clock dividers */
87#define WM8510_MCLKDIV_1 (0 << 5)
88#define WM8510_MCLKDIV_1_5 (1 << 5)
89#define WM8510_MCLKDIV_2 (2 << 5)
90#define WM8510_MCLKDIV_3 (3 << 5)
91#define WM8510_MCLKDIV_4 (4 << 5)
92#define WM8510_MCLKDIV_6 (5 << 5)
93#define WM8510_MCLKDIV_8 (6 << 5)
94#define WM8510_MCLKDIV_12 (7 << 5)
95
96struct wm8510_setup_data {
97 unsigned short i2c_address;
98};
99
100extern struct snd_soc_dai wm8510_dai;
101extern struct snd_soc_codec_device soc_codec_dev_wm8510;
102
103#endif