diff options
Diffstat (limited to 'sound/soc/codecs/twl4030.h')
-rw-r--r-- | sound/soc/codecs/twl4030.h | 43 |
1 files changed, 40 insertions, 3 deletions
diff --git a/sound/soc/codecs/twl4030.h b/sound/soc/codecs/twl4030.h index cb63765db1df..fe5f395d9e4f 100644 --- a/sound/soc/codecs/twl4030.h +++ b/sound/soc/codecs/twl4030.h | |||
@@ -92,8 +92,9 @@ | |||
92 | #define TWL4030_REG_VIBRA_PWM_SET 0x47 | 92 | #define TWL4030_REG_VIBRA_PWM_SET 0x47 |
93 | #define TWL4030_REG_ANAMIC_GAIN 0x48 | 93 | #define TWL4030_REG_ANAMIC_GAIN 0x48 |
94 | #define TWL4030_REG_MISC_SET_2 0x49 | 94 | #define TWL4030_REG_MISC_SET_2 0x49 |
95 | #define TWL4030_REG_SW_SHADOW 0x4A | ||
95 | 96 | ||
96 | #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) | 97 | #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1) |
97 | 98 | ||
98 | /* Bitfield Definitions */ | 99 | /* Bitfield Definitions */ |
99 | 100 | ||
@@ -110,9 +111,22 @@ | |||
110 | #define TWL4030_APLL_RATE_44100 0x90 | 111 | #define TWL4030_APLL_RATE_44100 0x90 |
111 | #define TWL4030_APLL_RATE_48000 0xA0 | 112 | #define TWL4030_APLL_RATE_48000 0xA0 |
112 | #define TWL4030_APLL_RATE_96000 0xE0 | 113 | #define TWL4030_APLL_RATE_96000 0xE0 |
113 | #define TWL4030_SEL_16K 0x04 | 114 | #define TWL4030_SEL_16K 0x08 |
114 | #define TWL4030_CODECPDZ 0x02 | 115 | #define TWL4030_CODECPDZ 0x02 |
115 | #define TWL4030_OPT_MODE 0x01 | 116 | #define TWL4030_OPT_MODE 0x01 |
117 | #define TWL4030_OPTION_1 (1 << 0) | ||
118 | #define TWL4030_OPTION_2 (0 << 0) | ||
119 | |||
120 | /* TWL4030_OPTION (0x02) Fields */ | ||
121 | |||
122 | #define TWL4030_ATXL1_EN (1 << 0) | ||
123 | #define TWL4030_ATXR1_EN (1 << 1) | ||
124 | #define TWL4030_ATXL2_VTXL_EN (1 << 2) | ||
125 | #define TWL4030_ATXR2_VTXR_EN (1 << 3) | ||
126 | #define TWL4030_ARXL1_VRX_EN (1 << 4) | ||
127 | #define TWL4030_ARXR1_EN (1 << 5) | ||
128 | #define TWL4030_ARXL2_EN (1 << 6) | ||
129 | #define TWL4030_ARXR2_EN (1 << 7) | ||
116 | 130 | ||
117 | /* TWL4030_REG_MICBIAS_CTL (0x04) Fields */ | 131 | /* TWL4030_REG_MICBIAS_CTL (0x04) Fields */ |
118 | 132 | ||
@@ -171,6 +185,17 @@ | |||
171 | #define TWL4030_CLK256FS_EN 0x02 | 185 | #define TWL4030_CLK256FS_EN 0x02 |
172 | #define TWL4030_AIF_EN 0x01 | 186 | #define TWL4030_AIF_EN 0x01 |
173 | 187 | ||
188 | /* VOICE_IF (0x0F) Fields */ | ||
189 | |||
190 | #define TWL4030_VIF_SLAVE_EN 0x80 | ||
191 | #define TWL4030_VIF_DIN_EN 0x40 | ||
192 | #define TWL4030_VIF_DOUT_EN 0x20 | ||
193 | #define TWL4030_VIF_SWAP 0x10 | ||
194 | #define TWL4030_VIF_FORMAT 0x08 | ||
195 | #define TWL4030_VIF_TRI_EN 0x04 | ||
196 | #define TWL4030_VIF_SUB_EN 0x02 | ||
197 | #define TWL4030_VIF_EN 0x01 | ||
198 | |||
174 | /* EAR_CTL (0x21) */ | 199 | /* EAR_CTL (0x21) */ |
175 | #define TWL4030_EAR_GAIN 0x30 | 200 | #define TWL4030_EAR_GAIN 0x30 |
176 | 201 | ||
@@ -236,7 +261,19 @@ | |||
236 | #define TWL4030_SMOOTH_ANAVOL_EN 0x02 | 261 | #define TWL4030_SMOOTH_ANAVOL_EN 0x02 |
237 | #define TWL4030_DIGMIC_LR_SWAP_EN 0x01 | 262 | #define TWL4030_DIGMIC_LR_SWAP_EN 0x01 |
238 | 263 | ||
239 | extern struct snd_soc_dai twl4030_dai; | 264 | /* TWL4030_REG_SW_SHADOW (0x4A) Fields */ |
265 | #define TWL4030_HFL_EN 0x01 | ||
266 | #define TWL4030_HFR_EN 0x02 | ||
267 | |||
268 | #define TWL4030_DAI_HIFI 0 | ||
269 | #define TWL4030_DAI_VOICE 1 | ||
270 | |||
271 | extern struct snd_soc_dai twl4030_dai[2]; | ||
240 | extern struct snd_soc_codec_device soc_codec_dev_twl4030; | 272 | extern struct snd_soc_codec_device soc_codec_dev_twl4030; |
241 | 273 | ||
274 | struct twl4030_setup_data { | ||
275 | unsigned int ramp_delay_value; | ||
276 | unsigned int sysclk; | ||
277 | }; | ||
278 | |||
242 | #endif /* End of __TWL4030_AUDIO_H__ */ | 279 | #endif /* End of __TWL4030_AUDIO_H__ */ |