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Diffstat (limited to 'sound/soc/codecs/twl4030.c')
-rw-r--r--sound/soc/codecs/twl4030.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index 8512800f6326..575238d68e5e 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -281,7 +281,7 @@ static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
281 i, val, twl4030_reg[i]); 281 i, val, twl4030_reg[i]);
282 } 282 }
283 } 283 }
284 dev_dbg(codec->dev, "Found %d non maching registers. %s\n", 284 dev_dbg(codec->dev, "Found %d non-matching registers. %s\n",
285 difference, difference ? "Not OK" : "OK"); 285 difference, difference ? "Not OK" : "OK");
286} 286}
287 287
@@ -2018,7 +2018,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream,
2018 u8 mode; 2018 u8 mode;
2019 2019
2020 /* If the system master clock is not 26MHz, the voice PCM interface is 2020 /* If the system master clock is not 26MHz, the voice PCM interface is
2021 * not avilable. 2021 * not available.
2022 */ 2022 */
2023 if (twl4030->sysclk != 26000) { 2023 if (twl4030->sysclk != 26000) {
2024 dev_err(codec->dev, "The board is configured for %u Hz, while" 2024 dev_err(codec->dev, "The board is configured for %u Hz, while"
@@ -2028,7 +2028,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream,
2028 } 2028 }
2029 2029
2030 /* If the codec mode is not option2, the voice PCM interface is not 2030 /* If the codec mode is not option2, the voice PCM interface is not
2031 * avilable. 2031 * available.
2032 */ 2032 */
2033 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) 2033 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2034 & TWL4030_OPT_MODE; 2034 & TWL4030_OPT_MODE;