diff options
Diffstat (limited to 'sound/soc/codecs/tlv320dac33.c')
-rw-r--r-- | sound/soc/codecs/tlv320dac33.c | 311 |
1 files changed, 254 insertions, 57 deletions
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c index 9c8903dbe647..f9f367d29a90 100644 --- a/sound/soc/codecs/tlv320dac33.c +++ b/sound/soc/codecs/tlv320dac33.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
31 | #include <linux/interrupt.h> | 31 | #include <linux/interrupt.h> |
32 | #include <linux/gpio.h> | 32 | #include <linux/gpio.h> |
33 | #include <linux/regulator/consumer.h> | ||
33 | #include <sound/core.h> | 34 | #include <sound/core.h> |
34 | #include <sound/pcm.h> | 35 | #include <sound/pcm.h> |
35 | #include <sound/pcm_params.h> | 36 | #include <sound/pcm_params.h> |
@@ -58,11 +59,26 @@ enum dac33_state { | |||
58 | DAC33_FLUSH, | 59 | DAC33_FLUSH, |
59 | }; | 60 | }; |
60 | 61 | ||
62 | enum dac33_fifo_modes { | ||
63 | DAC33_FIFO_BYPASS = 0, | ||
64 | DAC33_FIFO_MODE1, | ||
65 | DAC33_FIFO_MODE7, | ||
66 | DAC33_FIFO_LAST_MODE, | ||
67 | }; | ||
68 | |||
69 | #define DAC33_NUM_SUPPLIES 3 | ||
70 | static const char *dac33_supply_names[DAC33_NUM_SUPPLIES] = { | ||
71 | "AVDD", | ||
72 | "DVDD", | ||
73 | "IOVDD", | ||
74 | }; | ||
75 | |||
61 | struct tlv320dac33_priv { | 76 | struct tlv320dac33_priv { |
62 | struct mutex mutex; | 77 | struct mutex mutex; |
63 | struct workqueue_struct *dac33_wq; | 78 | struct workqueue_struct *dac33_wq; |
64 | struct work_struct work; | 79 | struct work_struct work; |
65 | struct snd_soc_codec codec; | 80 | struct snd_soc_codec codec; |
81 | struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES]; | ||
66 | int power_gpio; | 82 | int power_gpio; |
67 | int chip_power; | 83 | int chip_power; |
68 | int irq; | 84 | int irq; |
@@ -73,8 +89,9 @@ struct tlv320dac33_priv { | |||
73 | * this */ | 89 | * this */ |
74 | unsigned int nsample_max; /* nsample should not be higher than | 90 | unsigned int nsample_max; /* nsample should not be higher than |
75 | * this */ | 91 | * this */ |
76 | unsigned int nsample_switch; /* Use FIFO or bypass FIFO switch */ | 92 | enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ |
77 | unsigned int nsample; /* burst read amount from host */ | 93 | unsigned int nsample; /* burst read amount from host */ |
94 | u8 burst_bclkdiv; /* BCLK divider value in burst mode */ | ||
78 | 95 | ||
79 | enum dac33_state state; | 96 | enum dac33_state state; |
80 | }; | 97 | }; |
@@ -297,28 +314,49 @@ static inline void dac33_soft_power(struct snd_soc_codec *codec, int power) | |||
297 | dac33_write(codec, DAC33_PWR_CTRL, reg); | 314 | dac33_write(codec, DAC33_PWR_CTRL, reg); |
298 | } | 315 | } |
299 | 316 | ||
300 | static void dac33_hard_power(struct snd_soc_codec *codec, int power) | 317 | static int dac33_hard_power(struct snd_soc_codec *codec, int power) |
301 | { | 318 | { |
302 | struct tlv320dac33_priv *dac33 = codec->private_data; | 319 | struct tlv320dac33_priv *dac33 = codec->private_data; |
320 | int ret; | ||
303 | 321 | ||
304 | mutex_lock(&dac33->mutex); | 322 | mutex_lock(&dac33->mutex); |
305 | if (power) { | 323 | if (power) { |
306 | if (dac33->power_gpio >= 0) { | 324 | ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies), |
307 | gpio_set_value(dac33->power_gpio, 1); | 325 | dac33->supplies); |
308 | dac33->chip_power = 1; | 326 | if (ret != 0) { |
309 | /* Restore registers */ | 327 | dev_err(codec->dev, |
310 | dac33_restore_regs(codec); | 328 | "Failed to enable supplies: %d\n", ret); |
329 | goto exit; | ||
311 | } | 330 | } |
331 | |||
332 | if (dac33->power_gpio >= 0) | ||
333 | gpio_set_value(dac33->power_gpio, 1); | ||
334 | |||
335 | dac33->chip_power = 1; | ||
336 | |||
337 | /* Restore registers */ | ||
338 | dac33_restore_regs(codec); | ||
339 | |||
312 | dac33_soft_power(codec, 1); | 340 | dac33_soft_power(codec, 1); |
313 | } else { | 341 | } else { |
314 | dac33_soft_power(codec, 0); | 342 | dac33_soft_power(codec, 0); |
315 | if (dac33->power_gpio >= 0) { | 343 | if (dac33->power_gpio >= 0) |
316 | gpio_set_value(dac33->power_gpio, 0); | 344 | gpio_set_value(dac33->power_gpio, 0); |
317 | dac33->chip_power = 0; | 345 | |
346 | ret = regulator_bulk_disable(ARRAY_SIZE(dac33->supplies), | ||
347 | dac33->supplies); | ||
348 | if (ret != 0) { | ||
349 | dev_err(codec->dev, | ||
350 | "Failed to disable supplies: %d\n", ret); | ||
351 | goto exit; | ||
318 | } | 352 | } |
353 | |||
354 | dac33->chip_power = 0; | ||
319 | } | 355 | } |
320 | mutex_unlock(&dac33->mutex); | ||
321 | 356 | ||
357 | exit: | ||
358 | mutex_unlock(&dac33->mutex); | ||
359 | return ret; | ||
322 | } | 360 | } |
323 | 361 | ||
324 | static int dac33_get_nsample(struct snd_kcontrol *kcontrol, | 362 | static int dac33_get_nsample(struct snd_kcontrol *kcontrol, |
@@ -351,39 +389,48 @@ static int dac33_set_nsample(struct snd_kcontrol *kcontrol, | |||
351 | return ret; | 389 | return ret; |
352 | } | 390 | } |
353 | 391 | ||
354 | static int dac33_get_nsample_switch(struct snd_kcontrol *kcontrol, | 392 | static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, |
355 | struct snd_ctl_elem_value *ucontrol) | 393 | struct snd_ctl_elem_value *ucontrol) |
356 | { | 394 | { |
357 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | 395 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
358 | struct tlv320dac33_priv *dac33 = codec->private_data; | 396 | struct tlv320dac33_priv *dac33 = codec->private_data; |
359 | 397 | ||
360 | ucontrol->value.integer.value[0] = dac33->nsample_switch; | 398 | ucontrol->value.integer.value[0] = dac33->fifo_mode; |
361 | 399 | ||
362 | return 0; | 400 | return 0; |
363 | } | 401 | } |
364 | 402 | ||
365 | static int dac33_set_nsample_switch(struct snd_kcontrol *kcontrol, | 403 | static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol, |
366 | struct snd_ctl_elem_value *ucontrol) | 404 | struct snd_ctl_elem_value *ucontrol) |
367 | { | 405 | { |
368 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | 406 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
369 | struct tlv320dac33_priv *dac33 = codec->private_data; | 407 | struct tlv320dac33_priv *dac33 = codec->private_data; |
370 | int ret = 0; | 408 | int ret = 0; |
371 | 409 | ||
372 | if (dac33->nsample_switch == ucontrol->value.integer.value[0]) | 410 | if (dac33->fifo_mode == ucontrol->value.integer.value[0]) |
373 | return 0; | 411 | return 0; |
374 | /* Do not allow changes while stream is running*/ | 412 | /* Do not allow changes while stream is running*/ |
375 | if (codec->active) | 413 | if (codec->active) |
376 | return -EPERM; | 414 | return -EPERM; |
377 | 415 | ||
378 | if (ucontrol->value.integer.value[0] < 0 || | 416 | if (ucontrol->value.integer.value[0] < 0 || |
379 | ucontrol->value.integer.value[0] > 1) | 417 | ucontrol->value.integer.value[0] >= DAC33_FIFO_LAST_MODE) |
380 | ret = -EINVAL; | 418 | ret = -EINVAL; |
381 | else | 419 | else |
382 | dac33->nsample_switch = ucontrol->value.integer.value[0]; | 420 | dac33->fifo_mode = ucontrol->value.integer.value[0]; |
383 | 421 | ||
384 | return ret; | 422 | return ret; |
385 | } | 423 | } |
386 | 424 | ||
425 | /* Codec operation modes */ | ||
426 | static const char *dac33_fifo_mode_texts[] = { | ||
427 | "Bypass", "Mode 1", "Mode 7" | ||
428 | }; | ||
429 | |||
430 | static const struct soc_enum dac33_fifo_mode_enum = | ||
431 | SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(dac33_fifo_mode_texts), | ||
432 | dac33_fifo_mode_texts); | ||
433 | |||
387 | /* | 434 | /* |
388 | * DACL/R digital volume control: | 435 | * DACL/R digital volume control: |
389 | * from 0 dB to -63.5 in 0.5 dB steps | 436 | * from 0 dB to -63.5 in 0.5 dB steps |
@@ -406,8 +453,8 @@ static const struct snd_kcontrol_new dac33_snd_controls[] = { | |||
406 | static const struct snd_kcontrol_new dac33_nsample_snd_controls[] = { | 453 | static const struct snd_kcontrol_new dac33_nsample_snd_controls[] = { |
407 | SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0, | 454 | SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0, |
408 | dac33_get_nsample, dac33_set_nsample), | 455 | dac33_get_nsample, dac33_set_nsample), |
409 | SOC_SINGLE_EXT("nSample Switch", 0, 0, 1, 0, | 456 | SOC_ENUM_EXT("FIFO Mode", dac33_fifo_mode_enum, |
410 | dac33_get_nsample_switch, dac33_set_nsample_switch), | 457 | dac33_get_fifo_mode, dac33_set_fifo_mode), |
411 | }; | 458 | }; |
412 | 459 | ||
413 | /* Analog bypass */ | 460 | /* Analog bypass */ |
@@ -469,6 +516,8 @@ static int dac33_add_widgets(struct snd_soc_codec *codec) | |||
469 | static int dac33_set_bias_level(struct snd_soc_codec *codec, | 516 | static int dac33_set_bias_level(struct snd_soc_codec *codec, |
470 | enum snd_soc_bias_level level) | 517 | enum snd_soc_bias_level level) |
471 | { | 518 | { |
519 | int ret; | ||
520 | |||
472 | switch (level) { | 521 | switch (level) { |
473 | case SND_SOC_BIAS_ON: | 522 | case SND_SOC_BIAS_ON: |
474 | dac33_soft_power(codec, 1); | 523 | dac33_soft_power(codec, 1); |
@@ -476,12 +525,19 @@ static int dac33_set_bias_level(struct snd_soc_codec *codec, | |||
476 | case SND_SOC_BIAS_PREPARE: | 525 | case SND_SOC_BIAS_PREPARE: |
477 | break; | 526 | break; |
478 | case SND_SOC_BIAS_STANDBY: | 527 | case SND_SOC_BIAS_STANDBY: |
479 | if (codec->bias_level == SND_SOC_BIAS_OFF) | 528 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
480 | dac33_hard_power(codec, 1); | 529 | ret = dac33_hard_power(codec, 1); |
530 | if (ret != 0) | ||
531 | return ret; | ||
532 | } | ||
533 | |||
481 | dac33_soft_power(codec, 0); | 534 | dac33_soft_power(codec, 0); |
482 | break; | 535 | break; |
483 | case SND_SOC_BIAS_OFF: | 536 | case SND_SOC_BIAS_OFF: |
484 | dac33_hard_power(codec, 0); | 537 | ret = dac33_hard_power(codec, 0); |
538 | if (ret != 0) | ||
539 | return ret; | ||
540 | |||
485 | break; | 541 | break; |
486 | } | 542 | } |
487 | codec->bias_level = level; | 543 | codec->bias_level = level; |
@@ -489,6 +545,51 @@ static int dac33_set_bias_level(struct snd_soc_codec *codec, | |||
489 | return 0; | 545 | return 0; |
490 | } | 546 | } |
491 | 547 | ||
548 | static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33) | ||
549 | { | ||
550 | struct snd_soc_codec *codec; | ||
551 | |||
552 | codec = &dac33->codec; | ||
553 | |||
554 | switch (dac33->fifo_mode) { | ||
555 | case DAC33_FIFO_MODE1: | ||
556 | dac33_write16(codec, DAC33_NSAMPLE_MSB, | ||
557 | DAC33_THRREG(dac33->nsample)); | ||
558 | dac33_write16(codec, DAC33_PREFILL_MSB, | ||
559 | DAC33_THRREG(dac33->alarm_threshold)); | ||
560 | break; | ||
561 | case DAC33_FIFO_MODE7: | ||
562 | dac33_write16(codec, DAC33_PREFILL_MSB, | ||
563 | DAC33_THRREG(10)); | ||
564 | break; | ||
565 | default: | ||
566 | dev_warn(codec->dev, "Unhandled FIFO mode: %d\n", | ||
567 | dac33->fifo_mode); | ||
568 | break; | ||
569 | } | ||
570 | } | ||
571 | |||
572 | static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33) | ||
573 | { | ||
574 | struct snd_soc_codec *codec; | ||
575 | |||
576 | codec = &dac33->codec; | ||
577 | |||
578 | switch (dac33->fifo_mode) { | ||
579 | case DAC33_FIFO_MODE1: | ||
580 | dac33_write16(codec, DAC33_NSAMPLE_MSB, | ||
581 | DAC33_THRREG(dac33->nsample)); | ||
582 | break; | ||
583 | case DAC33_FIFO_MODE7: | ||
584 | /* At the moment we are not using interrupts in mode7 */ | ||
585 | break; | ||
586 | default: | ||
587 | dev_warn(codec->dev, "Unhandled FIFO mode: %d\n", | ||
588 | dac33->fifo_mode); | ||
589 | break; | ||
590 | } | ||
591 | } | ||
592 | |||
492 | static void dac33_work(struct work_struct *work) | 593 | static void dac33_work(struct work_struct *work) |
493 | { | 594 | { |
494 | struct snd_soc_codec *codec; | 595 | struct snd_soc_codec *codec; |
@@ -502,14 +603,10 @@ static void dac33_work(struct work_struct *work) | |||
502 | switch (dac33->state) { | 603 | switch (dac33->state) { |
503 | case DAC33_PREFILL: | 604 | case DAC33_PREFILL: |
504 | dac33->state = DAC33_PLAYBACK; | 605 | dac33->state = DAC33_PLAYBACK; |
505 | dac33_write16(codec, DAC33_NSAMPLE_MSB, | 606 | dac33_prefill_handler(dac33); |
506 | DAC33_THRREG(dac33->nsample)); | ||
507 | dac33_write16(codec, DAC33_PREFILL_MSB, | ||
508 | DAC33_THRREG(dac33->alarm_threshold)); | ||
509 | break; | 607 | break; |
510 | case DAC33_PLAYBACK: | 608 | case DAC33_PLAYBACK: |
511 | dac33_write16(codec, DAC33_NSAMPLE_MSB, | 609 | dac33_playback_handler(dac33); |
512 | DAC33_THRREG(dac33->nsample)); | ||
513 | break; | 610 | break; |
514 | case DAC33_IDLE: | 611 | case DAC33_IDLE: |
515 | break; | 612 | break; |
@@ -547,7 +644,7 @@ static void dac33_shutdown(struct snd_pcm_substream *substream, | |||
547 | unsigned int pwr_ctrl; | 644 | unsigned int pwr_ctrl; |
548 | 645 | ||
549 | /* Stop pending workqueue */ | 646 | /* Stop pending workqueue */ |
550 | if (dac33->nsample_switch) | 647 | if (dac33->fifo_mode) |
551 | cancel_work_sync(&dac33->work); | 648 | cancel_work_sync(&dac33->work); |
552 | 649 | ||
553 | mutex_lock(&dac33->mutex); | 650 | mutex_lock(&dac33->mutex); |
@@ -603,7 +700,7 @@ static int dac33_hw_params(struct snd_pcm_substream *substream, | |||
603 | } | 700 | } |
604 | 701 | ||
605 | #define CALC_OSCSET(rate, refclk) ( \ | 702 | #define CALC_OSCSET(rate, refclk) ( \ |
606 | ((((rate * 10000) / refclk) * 4096) + 5000) / 10000) | 703 | ((((rate * 10000) / refclk) * 4096) + 7000) / 10000) |
607 | #define CALC_RATIOSET(rate, refclk) ( \ | 704 | #define CALC_RATIOSET(rate, refclk) ( \ |
608 | ((((refclk * 100000) / rate) * 16384) + 50000) / 100000) | 705 | ((((refclk * 100000) / rate) * 16384) + 50000) / 100000) |
609 | 706 | ||
@@ -619,7 +716,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
619 | struct snd_soc_codec *codec = socdev->card->codec; | 716 | struct snd_soc_codec *codec = socdev->card->codec; |
620 | struct tlv320dac33_priv *dac33 = codec->private_data; | 717 | struct tlv320dac33_priv *dac33 = codec->private_data; |
621 | unsigned int oscset, ratioset, pwr_ctrl, reg_tmp; | 718 | unsigned int oscset, ratioset, pwr_ctrl, reg_tmp; |
622 | u8 aictrl_a, fifoctrl_a; | 719 | u8 aictrl_a, aictrl_b, fifoctrl_a; |
623 | 720 | ||
624 | switch (substream->runtime->rate) { | 721 | switch (substream->runtime->rate) { |
625 | case 44100: | 722 | case 44100: |
@@ -637,7 +734,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
637 | 734 | ||
638 | aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A); | 735 | aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A); |
639 | aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK); | 736 | aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK); |
737 | /* Read FIFO control A, and clear FIFO flush bit */ | ||
640 | fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A); | 738 | fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A); |
739 | fifoctrl_a &= ~DAC33_FIFOFLUSH; | ||
740 | |||
641 | fifoctrl_a &= ~DAC33_WIDTH; | 741 | fifoctrl_a &= ~DAC33_WIDTH; |
642 | switch (substream->runtime->format) { | 742 | switch (substream->runtime->format) { |
643 | case SNDRV_PCM_FORMAT_S16_LE: | 743 | case SNDRV_PCM_FORMAT_S16_LE: |
@@ -675,7 +775,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
675 | 775 | ||
676 | dac33_oscwait(codec); | 776 | dac33_oscwait(codec); |
677 | 777 | ||
678 | if (dac33->nsample_switch) { | 778 | if (dac33->fifo_mode) { |
779 | /* Generic for all FIFO modes */ | ||
679 | /* 50-51 : ASRC Control registers */ | 780 | /* 50-51 : ASRC Control registers */ |
680 | dac33_write(codec, DAC33_ASRC_CTRL_A, (1 << 4)); /* div=2 */ | 781 | dac33_write(codec, DAC33_ASRC_CTRL_A, (1 << 4)); /* div=2 */ |
681 | dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */ | 782 | dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */ |
@@ -685,38 +786,101 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
685 | 786 | ||
686 | /* Set interrupts to high active */ | 787 | /* Set interrupts to high active */ |
687 | dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH); | 788 | dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH); |
688 | |||
689 | dac33_write(codec, DAC33_FIFO_IRQ_MODE_B, | ||
690 | DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL)); | ||
691 | dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT); | ||
692 | } else { | 789 | } else { |
790 | /* FIFO bypass mode */ | ||
693 | /* 50-51 : ASRC Control registers */ | 791 | /* 50-51 : ASRC Control registers */ |
694 | dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP); | 792 | dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP); |
695 | dac33_write(codec, DAC33_ASRC_CTRL_B, 0); /* ??? */ | 793 | dac33_write(codec, DAC33_ASRC_CTRL_B, 0); /* ??? */ |
696 | } | 794 | } |
697 | 795 | ||
698 | if (dac33->nsample_switch) | 796 | /* Interrupt behaviour configuration */ |
797 | switch (dac33->fifo_mode) { | ||
798 | case DAC33_FIFO_MODE1: | ||
799 | dac33_write(codec, DAC33_FIFO_IRQ_MODE_B, | ||
800 | DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL)); | ||
801 | dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT); | ||
802 | break; | ||
803 | case DAC33_FIFO_MODE7: | ||
804 | /* Disable all interrupts */ | ||
805 | dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0); | ||
806 | break; | ||
807 | default: | ||
808 | /* in FIFO bypass mode, the interrupts are not used */ | ||
809 | break; | ||
810 | } | ||
811 | |||
812 | aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B); | ||
813 | |||
814 | switch (dac33->fifo_mode) { | ||
815 | case DAC33_FIFO_MODE1: | ||
816 | /* | ||
817 | * For mode1: | ||
818 | * Disable the FIFO bypass (Enable the use of FIFO) | ||
819 | * Select nSample mode | ||
820 | * BCLK is only running when data is needed by DAC33 | ||
821 | */ | ||
699 | fifoctrl_a &= ~DAC33_FBYPAS; | 822 | fifoctrl_a &= ~DAC33_FBYPAS; |
700 | else | 823 | fifoctrl_a &= ~DAC33_FAUTO; |
824 | aictrl_b &= ~DAC33_BCLKON; | ||
825 | break; | ||
826 | case DAC33_FIFO_MODE7: | ||
827 | /* | ||
828 | * For mode1: | ||
829 | * Disable the FIFO bypass (Enable the use of FIFO) | ||
830 | * Select Threshold mode | ||
831 | * BCLK is only running when data is needed by DAC33 | ||
832 | */ | ||
833 | fifoctrl_a &= ~DAC33_FBYPAS; | ||
834 | fifoctrl_a |= DAC33_FAUTO; | ||
835 | aictrl_b &= ~DAC33_BCLKON; | ||
836 | break; | ||
837 | default: | ||
838 | /* | ||
839 | * For FIFO bypass mode: | ||
840 | * Enable the FIFO bypass (Disable the FIFO use) | ||
841 | * Set the BCLK as continous | ||
842 | */ | ||
701 | fifoctrl_a |= DAC33_FBYPAS; | 843 | fifoctrl_a |= DAC33_FBYPAS; |
702 | dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a); | 844 | aictrl_b |= DAC33_BCLKON; |
845 | break; | ||
846 | } | ||
703 | 847 | ||
848 | dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a); | ||
704 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a); | 849 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a); |
705 | reg_tmp = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B); | 850 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b); |
706 | if (dac33->nsample_switch) | ||
707 | reg_tmp &= ~DAC33_BCLKON; | ||
708 | else | ||
709 | reg_tmp |= DAC33_BCLKON; | ||
710 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg_tmp); | ||
711 | 851 | ||
712 | if (dac33->nsample_switch) { | 852 | /* |
713 | /* 20: BCLK divide ratio */ | 853 | * BCLK divide ratio |
714 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3); | 854 | * 0: 1.5 |
855 | * 1: 1 | ||
856 | * 2: 2 | ||
857 | * ... | ||
858 | * 254: 254 | ||
859 | * 255: 255 | ||
860 | */ | ||
861 | if (dac33->fifo_mode) | ||
862 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, | ||
863 | dac33->burst_bclkdiv); | ||
864 | else | ||
865 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); | ||
715 | 866 | ||
867 | switch (dac33->fifo_mode) { | ||
868 | case DAC33_FIFO_MODE1: | ||
716 | dac33_write16(codec, DAC33_ATHR_MSB, | 869 | dac33_write16(codec, DAC33_ATHR_MSB, |
717 | DAC33_THRREG(dac33->alarm_threshold)); | 870 | DAC33_THRREG(dac33->alarm_threshold)); |
718 | } else { | 871 | break; |
719 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); | 872 | case DAC33_FIFO_MODE7: |
873 | /* | ||
874 | * Configure the threshold levels, and leave 10 sample space | ||
875 | * at the bottom, and also at the top of the FIFO | ||
876 | */ | ||
877 | dac33_write16(codec, DAC33_UTHR_MSB, | ||
878 | DAC33_THRREG(DAC33_BUFFER_SIZE_SAMPLES - 10)); | ||
879 | dac33_write16(codec, DAC33_LTHR_MSB, | ||
880 | DAC33_THRREG(10)); | ||
881 | break; | ||
882 | default: | ||
883 | break; | ||
720 | } | 884 | } |
721 | 885 | ||
722 | mutex_unlock(&dac33->mutex); | 886 | mutex_unlock(&dac33->mutex); |
@@ -789,7 +953,7 @@ static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd, | |||
789 | case SNDRV_PCM_TRIGGER_START: | 953 | case SNDRV_PCM_TRIGGER_START: |
790 | case SNDRV_PCM_TRIGGER_RESUME: | 954 | case SNDRV_PCM_TRIGGER_RESUME: |
791 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | 955 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
792 | if (dac33->nsample_switch) { | 956 | if (dac33->fifo_mode) { |
793 | dac33->state = DAC33_PREFILL; | 957 | dac33->state = DAC33_PREFILL; |
794 | queue_work(dac33->dac33_wq, &dac33->work); | 958 | queue_work(dac33->dac33_wq, &dac33->work); |
795 | } | 959 | } |
@@ -797,7 +961,7 @@ static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd, | |||
797 | case SNDRV_PCM_TRIGGER_STOP: | 961 | case SNDRV_PCM_TRIGGER_STOP: |
798 | case SNDRV_PCM_TRIGGER_SUSPEND: | 962 | case SNDRV_PCM_TRIGGER_SUSPEND: |
799 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | 963 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
800 | if (dac33->nsample_switch) { | 964 | if (dac33->fifo_mode) { |
801 | dac33->state = DAC33_FLUSH; | 965 | dac33->state = DAC33_FLUSH; |
802 | queue_work(dac33->dac33_wq, &dac33->work); | 966 | queue_work(dac33->dac33_wq, &dac33->work); |
803 | } | 967 | } |
@@ -843,6 +1007,7 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
843 | unsigned int fmt) | 1007 | unsigned int fmt) |
844 | { | 1008 | { |
845 | struct snd_soc_codec *codec = codec_dai->codec; | 1009 | struct snd_soc_codec *codec = codec_dai->codec; |
1010 | struct tlv320dac33_priv *dac33 = codec->private_data; | ||
846 | u8 aictrl_a, aictrl_b; | 1011 | u8 aictrl_a, aictrl_b; |
847 | 1012 | ||
848 | aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A); | 1013 | aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A); |
@@ -855,7 +1020,11 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
855 | break; | 1020 | break; |
856 | case SND_SOC_DAIFMT_CBS_CFS: | 1021 | case SND_SOC_DAIFMT_CBS_CFS: |
857 | /* Codec Slave */ | 1022 | /* Codec Slave */ |
858 | aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK); | 1023 | if (dac33->fifo_mode) { |
1024 | dev_err(codec->dev, "FIFO mode requires master mode\n"); | ||
1025 | return -EINVAL; | ||
1026 | } else | ||
1027 | aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK); | ||
859 | break; | 1028 | break; |
860 | default: | 1029 | default: |
861 | return -EINVAL; | 1030 | return -EINVAL; |
@@ -959,6 +1128,9 @@ static int dac33_soc_probe(struct platform_device *pdev) | |||
959 | /* power on device */ | 1128 | /* power on device */ |
960 | dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1129 | dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
961 | 1130 | ||
1131 | /* Bias level configuration has enabled regulator an extra time */ | ||
1132 | regulator_bulk_disable(ARRAY_SIZE(dac33->supplies), dac33->supplies); | ||
1133 | |||
962 | return 0; | 1134 | return 0; |
963 | 1135 | ||
964 | pcm_err: | 1136 | pcm_err: |
@@ -1033,13 +1205,13 @@ struct snd_soc_dai dac33_dai = { | |||
1033 | }; | 1205 | }; |
1034 | EXPORT_SYMBOL_GPL(dac33_dai); | 1206 | EXPORT_SYMBOL_GPL(dac33_dai); |
1035 | 1207 | ||
1036 | static int dac33_i2c_probe(struct i2c_client *client, | 1208 | static int __devinit dac33_i2c_probe(struct i2c_client *client, |
1037 | const struct i2c_device_id *id) | 1209 | const struct i2c_device_id *id) |
1038 | { | 1210 | { |
1039 | struct tlv320dac33_platform_data *pdata; | 1211 | struct tlv320dac33_platform_data *pdata; |
1040 | struct tlv320dac33_priv *dac33; | 1212 | struct tlv320dac33_priv *dac33; |
1041 | struct snd_soc_codec *codec; | 1213 | struct snd_soc_codec *codec; |
1042 | int ret = 0; | 1214 | int ret, i; |
1043 | 1215 | ||
1044 | if (client->dev.platform_data == NULL) { | 1216 | if (client->dev.platform_data == NULL) { |
1045 | dev_err(&client->dev, "Platform data not set\n"); | 1217 | dev_err(&client->dev, "Platform data not set\n"); |
@@ -1080,10 +1252,11 @@ static int dac33_i2c_probe(struct i2c_client *client, | |||
1080 | i2c_set_clientdata(client, dac33); | 1252 | i2c_set_clientdata(client, dac33); |
1081 | 1253 | ||
1082 | dac33->power_gpio = pdata->power_gpio; | 1254 | dac33->power_gpio = pdata->power_gpio; |
1255 | dac33->burst_bclkdiv = pdata->burst_bclkdiv; | ||
1083 | dac33->irq = client->irq; | 1256 | dac33->irq = client->irq; |
1084 | dac33->nsample = NSAMPLE_MAX; | 1257 | dac33->nsample = NSAMPLE_MAX; |
1085 | /* Disable FIFO use by default */ | 1258 | /* Disable FIFO use by default */ |
1086 | dac33->nsample_switch = 0; | 1259 | dac33->fifo_mode = DAC33_FIFO_BYPASS; |
1087 | 1260 | ||
1088 | tlv320dac33_codec = codec; | 1261 | tlv320dac33_codec = codec; |
1089 | 1262 | ||
@@ -1130,6 +1303,24 @@ static int dac33_i2c_probe(struct i2c_client *client, | |||
1130 | } | 1303 | } |
1131 | } | 1304 | } |
1132 | 1305 | ||
1306 | for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++) | ||
1307 | dac33->supplies[i].supply = dac33_supply_names[i]; | ||
1308 | |||
1309 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(dac33->supplies), | ||
1310 | dac33->supplies); | ||
1311 | |||
1312 | if (ret != 0) { | ||
1313 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | ||
1314 | goto err_get; | ||
1315 | } | ||
1316 | |||
1317 | ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies), | ||
1318 | dac33->supplies); | ||
1319 | if (ret != 0) { | ||
1320 | dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); | ||
1321 | goto err_enable; | ||
1322 | } | ||
1323 | |||
1133 | ret = snd_soc_register_codec(codec); | 1324 | ret = snd_soc_register_codec(codec); |
1134 | if (ret != 0) { | 1325 | if (ret != 0) { |
1135 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); | 1326 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); |
@@ -1149,6 +1340,10 @@ static int dac33_i2c_probe(struct i2c_client *client, | |||
1149 | return ret; | 1340 | return ret; |
1150 | 1341 | ||
1151 | error_codec: | 1342 | error_codec: |
1343 | regulator_bulk_disable(ARRAY_SIZE(dac33->supplies), dac33->supplies); | ||
1344 | err_enable: | ||
1345 | regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies); | ||
1346 | err_get: | ||
1152 | if (dac33->irq >= 0) { | 1347 | if (dac33->irq >= 0) { |
1153 | free_irq(dac33->irq, &dac33->codec); | 1348 | free_irq(dac33->irq, &dac33->codec); |
1154 | destroy_workqueue(dac33->dac33_wq); | 1349 | destroy_workqueue(dac33->dac33_wq); |
@@ -1165,7 +1360,7 @@ error_reg: | |||
1165 | return ret; | 1360 | return ret; |
1166 | } | 1361 | } |
1167 | 1362 | ||
1168 | static int dac33_i2c_remove(struct i2c_client *client) | 1363 | static int __devexit dac33_i2c_remove(struct i2c_client *client) |
1169 | { | 1364 | { |
1170 | struct tlv320dac33_priv *dac33; | 1365 | struct tlv320dac33_priv *dac33; |
1171 | 1366 | ||
@@ -1177,6 +1372,8 @@ static int dac33_i2c_remove(struct i2c_client *client) | |||
1177 | if (dac33->irq >= 0) | 1372 | if (dac33->irq >= 0) |
1178 | free_irq(dac33->irq, &dac33->codec); | 1373 | free_irq(dac33->irq, &dac33->codec); |
1179 | 1374 | ||
1375 | regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies); | ||
1376 | |||
1180 | destroy_workqueue(dac33->dac33_wq); | 1377 | destroy_workqueue(dac33->dac33_wq); |
1181 | snd_soc_unregister_dai(&dac33_dai); | 1378 | snd_soc_unregister_dai(&dac33_dai); |
1182 | snd_soc_unregister_codec(&dac33->codec); | 1379 | snd_soc_unregister_codec(&dac33->codec); |